PDTA143TT

DISCRETE SEMICONDUCTORS DATA SHEET PDTA143T series PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open Product data sheet Supersedes data of 2003 Sep 08 2004 Aug 04 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open FEATURES • Built-in bias resistors • Simplified circuit design • Reduction of component count • Reduced pick and place costs. APPLICATIONS • General purpose switching and amplification • Inverter and interface circuits • Circuit driver. DESCRIPTION PDTA143T series QUICK REFERENCE DATA SYMBOL VCEO IO R1 R2 PARAMETER collector-emitter voltage output current (DC) bias resistor open TYP. − − 4.7 − MAX. −50 −100 − − UNIT V mA kΩ − PNP resistor-equipped transistor (see “Simplified outline, symbol and pinning” for package details). PRODUCT OVERVIEW PACKAGE TYPE NUMBER PHILIPS PDTA143TE PDTA143TEF PDTA143TK PDTA143TM PDTA143TS PDTA143TT PDTA143TU Note 1. * = p: Made in Hong Kong. * = t: Made in Malaysia. * = W: Made in China. SOT416 SOT490 SOT346 SOT883 SOT54 (TO-92) SOT23 SOT323 EIAJ SC-75 SC-89 SC-59 SC-101 SC-43 − SC-70 39 10 45 E6 TA143T *42(1) *45(1) PDTC143TE PDTC143TEF PDTC143TK PDTC143TM PDTC143TS PDTC143TT PDTC143TU MARKING CODE NPN COMPLEMENT 2004 Aug 04 2 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open SIMPLIFIED OUTLINE, SYMBOL AND PINNING PDTA143T series PINNING TYPE NUMBER PDTA143TS SIMPLIFIED OUTLINE AND SYMBOL PIN 1 2 handbook, halfpage DESCRIPTION base collector emitter 3 2 R1 1 3 MAM352 1 2 3 PDTA143TE PDTA143TEF PDTA143TK PDTA143TT PDTA143TU 1 Top view 2 MDB272 1 2 handbook, halfpage base emitter collector 3 R1 1 3 3 2 PDTA143TM handbook, halfpage 1 2 3 R1 3 1 2 Bottom view MDB268 base emitter collector 3 2 1 2004 Aug 04 3 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VCBO VCEO VEBO IO ICM Ptot PARAMETER collector-base voltage collector-emitter voltage emitter-base voltage output current (DC) peak collector current total power dissipation SOT23 SOT54 SOT323 SOT346 SOT416 SOT490 SOT883 Tstg Tj Tamb Notes 1. Refer to standard mounting conditions. 2. Reflow soldering is the only recommended soldering method. 3. Refer to SOT883 standard mounting conditions; FR4 with 60 μm copper strip line. THERMAL CHARACTERISTICS SYMBOL Rth j-a SOT23 SOT54 SOT323 SOT346 SOT416 SOT490 SOT883 Notes 1. Refer to standard mounting conditions. 2. Reflow soldering is the only recommended soldering method. 3. Refer to SOT883 standard mounting conditions; FR4 with 60 μm copper strip line. PARAMETER thermal resistance from junction to ambient CONDITIONS in free air note 1 note 1 note 1 note 1 note 1 note 1 notes 2 and 3 storage temperature junction temperature operating ambient temperature Tamb ≤ 25 °C note 1 note 1 note 1 note 1 note 1 notes 1 and 2 notes 2 and 3 − − − − − − − −65 − −65 CONDITIONS open emitter open base open collector − − − − − PDTA143T series MIN. MAX. −50 −50 −5 −100 −100 250 500 200 250 150 250 250 +150 150 +150 V V V UNIT mA mA mW mW mW mW mW mW mW °C °C °C VALUE 500 250 625 500 833 500 500 UNIT K/W K/W K/W K/W K/W K/W K/W 2004 Aug 04 4 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open CHARACTERISTICS Tamb = 25 °C unless otherwise specified. SYMBOL ICBO ICEO IEBO hFE VCEsat R1 Cc PARAMETER collector-base cut-off current collector-emitter cut-off current emitter-base cut-off current DC current gain input resistor collector capacitance CONDITIONS VCB = −50 V; IE = 0 VCE = −30 V; IB = 0 VCE = −30 V; IB = 0; Tj = 150 °C VEB = −5 V; IC = 0 VCE = −5 V; IC = −1 mA PDTA143T series MIN. − − − − 200 − 3.3 TYP. − − − − − − 4.7 − MAX. −100 −1 −50 −100 − −150 6.1 3 UNIT nA μA μA nA mV kΩ pF collector-emitter saturation voltage IC = −5 mA; IB = −0.25 mA IE = ie = 0; VCB = −10 V; f = 1 MHz − 2004 Aug 04 5 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open PACKAGE OUTLINES Plastic surface-mounted package; 3 leads PDTA143T series SOT23 D B E A X HE vMA 3 Q A A1 1 e1 e bp 2 wMB detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.9 A1 max. 0.1 bp 0.48 0.38 c 0.15 0.09 D 3.0 2.8 E 1.4 1.2 e 1.9 e1 0.95 HE 2.5 2.1 Lp 0.45 0.15 Q 0.55 0.45 v 0.2 w 0.1 OUTLINE VERSION SOT23 REFERENCES IEC JEDEC TO-236AB JEITA EUROPEAN PROJECTION ISSUE DATE 04-11-04 06-03-16 2004 Aug 04 6 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open PDTA143T series Plastic single-ended leaded (through hole) package; 3 leads SOT54 c E d A L b 1 D 2 e1 e 3 b1 L1 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 5.2 5.0 b 0.48 0.40 b1 0.66 0.55 c 0.45 0.38 D 4.8 4.4 d 1.7 1.4 E 4.2 3.6 e 2.54 e1 1.27 L 14.5 12.7 L1(1) max. 2.5 Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION SOT54 REFERENCES IEC JEDEC TO-92 JEITA SC-43A EUROPEAN PROJECTION ISSUE DATE 04-06-28 04-11-16 2004 Aug 04 7 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open PDTA143T series Plastic surface-mounted package; 3 leads SOT323 D B E A X y HE vMA 3 Q A A1 c 1 e1 e bp 2 wM B Lp detail X 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.1 0.8 A1 max 0.1 bp 0.4 0.3 c 0.25 0.10 D 2.2 1.8 E 1.35 1.15 e 1.3 e1 0.65 HE 2.2 2.0 Lp 0.45 0.15 Q 0.23 0.13 v 0.2 w 0.2 OUTLINE VERSION SOT323 REFERENCES IEC JEDEC JEITA SC-70 EUROPEAN PROJECTION ISSUE DATE 04-11-04 06-03-16 2004 Aug 04 8 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open PDTA143T series Plastic surface-mounted package; 3 leads SOT346 E D B A X HE vMA 3 Q A A1 1 e1 e bp 2 wMB detail X Lp c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 1.3 1.0 A1 0.1 0.013 bp 0.50 0.35 c 0.26 0.10 D 3.1 2.7 E 1.7 1.3 e 1.9 e1 0.95 HE 3.0 2.5 Lp 0.6 0.2 Q 0.33 0.23 v 0.2 w 0.2 OUTLINE VERSION SOT346 REFERENCES IEC JEDEC TO-236 JEITA SC-59A EUROPEAN PROJECTION ISSUE DATE 04-11-11 06-03-16 2004 Aug 04 9 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open PDTA143T series Plastic surface-mounted package; 3 leads SOT416 D B E A X vMA HE 3 Q A 1 e1 e bp 2 wM B A1 c Lp detail X 0 0.5 scale 1 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 0.95 0.60 A1 max 0.1 bp 0.30 0.15 c 0.25 0.10 D 1.8 1.4 E 0.9 0.7 e 1 e1 0.5 HE 1.75 1.45 Lp 0.45 0.15 Q 0.23 0.13 v 0.2 w 0.2 OUTLINE VERSION SOT416 REFERENCES IEC JEDEC JEITA SC-75 EUROPEAN PROJECTION ISSUE DATE 04-11-04 06-03-16 2004 Aug 04 10 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open PDTA143T series Plastic surface-mounted package; 3 leads SOT490 D B E A X HE vMA 3 A 1 e1 e bp 2 wMB Lp detail X c 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 0.8 0.6 bp 0.33 0.23 c 0.2 0.1 D 1.7 1.5 E 0.95 0.75 e 1.0 e1 0.5 HE 1.7 1.5 Lp 0.5 0.3 v 0.1 w 0.1 OUTLINE VERSION SOT490 REFERENCES IEC JEDEC JEITA SC-89 EUROPEAN PROJECTION ISSUE DATE 05-07-28 06-03-16 2004 Aug 04 11 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open PDTA143T series Leadless ultra small plastic package; 3 solder lands; body 1.0 x 0.6 x 0.5 mm SOT883 L 2 b e L1 3 b1 1 e1 A A1 E D 0 0.5 scale 1 mm DIMENSIONS (mm are the original dimensions) UNIT mm A (1) 0.50 0.46 A1 max. 0.03 b 0.20 0.12 b1 0.55 0.47 D 0.62 0.55 E 1.02 0.95 e 0.35 e1 0.65 L 0.30 0.22 L1 0.30 0.22 Note 1. Including plating thickness OUTLINE VERSION SOT883 REFERENCES IEC JEDEC JEITA SC-101 EUROPEAN PROJECTION ISSUE DATE 03-02-05 03-04-03 2004 Aug 04 12 NXP Semiconductors Product data sheet PNP resistor-equipped transistors; R1 = 4.7 kΩ, R2 = open DATA SHEET STATUS DOCUMENT STATUS(1) Objective data sheet Preliminary data sheet Product data sheet Notes PRODUCT STATUS(2) Development Qualification Production DEFINITION PDTA143T series This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. 1. Please consult the most recently issued document before initiating or completing a design. 2. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 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Limiting values ⎯ Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale ⎯ NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license ⎯ Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control ⎯ This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Quick reference data ⎯ The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 2004 Aug 04 13 NXP Semiconductors Customer notification This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content, except for package outline drawings which were updated to the latest version. Contact information For additional information please visit: http://www.nxp.com For sales offices addresses send e-mail to: salesaddresses@nxp.com © NXP B.V. 2009 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R75/04/pp14 Date of release: 2004 Aug 04 Document order number: 9397 750 13656