NXP Semiconductors
Data Sheet: Technical Data
KEA64 Sub-Family Data
Sheet
Document Number S9KEA64P64M20SF0
Rev. 5, 05/2016
S9KEA64P64M20SF0
Supports the following:
S9KEAZN16AMLC(R),
S9KEAZN32AMLC(R),
S9KEAZN64AMLC(R),
S9KEAZN16AMLH(R),
S9KEAZN32AMLH(R), and
S9KEAZN64AMLH(R)
Key features
• Operating characteristics
– Voltage range: 2.7 to 5.5 V
– Flash write voltage range: 2.7 to 5.5 V
– Temperature range (ambient): -40 to 125°C
• Performance
– Up to 40 MHz ARM® Cortex-M0+ core and up to
20 MHz bus clock
– Single cycle 32-bit x 32-bit multiplier
– Single cycle I/O access port
• Memories and memory interfaces
– Up to 64 KB flash
– Up to 256 B EEPROM
– Up to 4 KB RAM
• Clocks
– Oscillator (OSC) - supports 32.768 kHz crystal or 4
MHz to 20 MHz crystal or ceramic resonator; choice
of low power or high gain oscillators
– Internal clock source (ICS) - internal FLL with
internal or external reference, 31.25 kHz pretrimmed internal reference for 40 MHz system and
core clock.
– Internal 1 kHz low-power oscillator (LPO)
• System peripherals
– Power management module (PMC) with three power
modes: Run, Wait, Stop
– Low-voltage detection (LVD) with reset or interrupt,
selectable trip points
– Watchdog with independent clock source (WDOG)
– Programmable cyclic redundancy check module
(CRC)
– Serial wire debug interface (SWD)
– Bit manipulation engine (BME)
• Security and integrity modules
– 64-bit unique identification (ID) number per chip
• Human-machine interface
– Up to 57 general-purpose input/output (GPIO)
– Two up to 8-bit keyboard interrupt modules (KBI)
– External interrupt (IRQ)
• Analog modules
– One up to 16-channel 12-bit SAR ADC, operation in
Stop mode, optional hardware trigger (ADC)
– Two analog comparators containing a 6-bit DAC
and programmable reference input (ACMP)
• Timers
– One 6-channel FlexTimer/PWM (FTM)
– Two 2-channel FlexTimer/PWM (FTM)
– One 2-channel periodic interrupt timer (PIT)
– One real-time clock (RTC)
• Communication interfaces
– Two SPI modules (SPI)
– Up to three UART modules (UART)
– One I2C module (I2C)
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.
© 2014–2016 NXP B.V.
• Package options
– 64-pin LQFP
– 32-pin LQFP
KEA64 Sub-Family Data Sheet, Rev. 5, 05/2016
2
NXP Semiconductors
Table of Contents
1 Ordering parts.......................................................................................4
1.1 Determining valid orderable parts............................................... 4
2 Part identification................................................................................. 4
4.2.2
FTM module timing....................................................... 16
4.3 Thermal specifications................................................................. 17
4.3.1
Thermal characteristics.................................................. 17
2.1 Description...................................................................................4
5 Peripheral operating requirements and behaviors................................ 18
2.2 Format.......................................................................................... 4
5.1 Core modules............................................................................... 18
2.3 Fields............................................................................................4
5.1.1
SWD electricals .............................................................18
2.4 Example....................................................................................... 5
5.2 External oscillator (OSC) and ICS characteristics.......................19
3 Ratings..................................................................................................5
5.3 NVM specifications..................................................................... 21
3.1 Thermal handling ratings............................................................. 5
5.4 Analog..........................................................................................23
3.2 Moisture handling ratings............................................................ 5
5.4.1
ADC characteristics....................................................... 23
3.3 ESD handling ratings................................................................... 6
5.4.2
Analog comparator (ACMP) electricals.........................25
3.4 Voltage and current operating ratings..........................................6
4 General................................................................................................. 7
4.1 Nonswitching electrical specifications........................................ 7
5.5 Communication interfaces........................................................... 26
5.5.1
SPI switching specifications.......................................... 26
6 Dimensions...........................................................................................29
4.1.1
DC characteristics.......................................................... 7
4.1.2
Supply current characteristics........................................ 13
7 Pinout................................................................................................... 29
4.1.3
EMC performance..........................................................15
7.1 Signal multiplexing and pin assignments.................................... 29
4.2 Switching specifications.............................................................. 15
8 Revision History...................................................................................30
4.2.1
6.1 Obtaining package dimensions.................................................... 29
Control timing................................................................ 15
KEA64 Sub-Family Data Sheet, Rev. 5, 05/2016
NXP Semiconductors
3
Ordering parts
1 Ordering parts
1.1 Determining valid orderable parts
Valid orderable part numbers are provided on the web. To determine the orderable part
numbers for this device, go to nxp.com and perform a part number search for the
following device numbers: KEAZN64.
2 Part identification
2.1 Description
Part numbers for the chip have fields that identify the specific part. You can use the
values of these fields to determine the specific part you have received.
2.2 Format
Part numbers for this device have the following format:
Q B KEA A C FFF M T PP N
2.3 Fields
This table lists the possible values for each field in the part number (not all combinations
are valid):
Field
Description
Values
Q
Qualification status
B
Memory type
KEA
Kinetis Auto family
A
Key attribute
• Z = M0+ core
• F = M4 W/ DSP & FPU
• C= M4 W/ AP + FPU
C
CAN availability
• N = CAN not available
• (Blank) = CAN available
• S = Automotive qualified
• P = Prequalification
• 9 = Flash
• KEA
Table continues on the next page...
KEA64 Sub-Family Data Sheet, Rev. 5, 05/2016
4
NXP Semiconductors
Ratings
Field
Description
FFF
Program flash memory size
M
Maskset revision
T
Temperature range (°C)
PP
Package identifier
N
Packaging type
Values
• 16 = 16 KB
• 32 = 32 KB
• 64 = 64 KB
• A = 1st Fab version
• B = Revision after 1st version
• C = –40 to 85
• V= –40 to 105
• M = –40 to 125
• LC = 32 LQFP (7 mm x 7 mm)
• LH = 64 LQFP (10 mm x 10 mm)
• R = Tape and reel
• (Blank) = Trays
2.4 Example
This is an example part number:
S9KEAZN64AMLH
3 Ratings
3.1 Thermal handling ratings
Symbol
Description
Min.
Max.
Unit
Notes
TSTG
Storage temperature
–55
150
°C
1
TSDR
Solder temperature, lead-free
—
260
°C
2
1. Determined according to JEDEC Standard JESD22-A103, High Temperature Storage Life.
2. Determined according to IPC/JEDEC Standard J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
3.2 Moisture handling ratings
Symbol
MSL
Description
Moisture sensitivity level
Min.
Max.
Unit
Notes
—
3
—
1
1. Determined according to IPC/JEDEC Standard J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
KEA64 Sub-Family Data Sheet, Rev. 5, 05/2016
NXP Semiconductors
5
Ratings
3.3 ESD handling ratings
Symbol
Description
Min.
Max.
Unit
Notes
VHBM
Electrostatic discharge voltage, human body model
–6000
+6000
V
1
VCDM
Electrostatic discharge voltage, charged-device model
–500
+500
V
2
Latch-up current at ambient temperature of °C
–100
+100
mA
3
ILAT
1. Determined according to JEDEC Standard JESD22-A114, Electrostatic Discharge (ESD) Sensitivity Testing Human Body
Model (HBM).
2. Determined according to JEDEC Standard JESD22-C101, Field-Induced Charged-Device Model Test Method for
Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components.
3. Determined according to JEDEC Standard JESD78D, IC Latch-up Test. The test produced the following results:
• Test was performed at 125 °C case temperature (Class II).
• I/O pins pass +100/-100 mA I-test with IDD current limit at 800 mA (VDD collapsed during positive injection).
• I/O pins pass +70/-100 mA I-test with IDD current limit at 1000 mA for VDD.
• Supply groups pass 1.5 Vccmax.
• RESET_B pin was only tested with negative I-test due to product conditioning requirement.
3.4 Voltage and current operating ratings
Absolute maximum ratings are stress ratings only, and functional operation at the
maxima is not guaranteed. Stress beyond the limits specified in the following table may
affect device reliability or cause permanent damage to the device. For functional
operating conditions, refer to the remaining tables in this document.
This device contains circuitry protecting against damage due to high static voltage or
electrical fields; however, it is advised that normal precautions be taken to avoid
application of any voltages higher than maximum-rated voltages to this high-impedance
circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate
logic voltage level (for instance, either VSS or VDD) or the programmable pullup resistor
associated with the pin is enabled.
Table 1. Voltage and current operating ratings
Symbol
Description
Min.
Max.
Unit
VDD
Digital supply voltage
–0.3
6.0
V
IDD
Maximum current into VDD
—
120
mA
VIN
ID
VDDA
0.31
Input voltage except true open drain pins
–0.3
VDD +
Input voltage of true open drain pins
–0.3
6
V
Instantaneous maximum current single pin limit (applies to all
port pins)
–25
25
mA
VDD – 0.3
VDD + 0.3
V
Analog supply voltage
V
1. Maximum rating of VDD also applies to VIN.
KEA64 Sub-Family Data Sheet, Rev. 5, 05/2016
6
NXP Semiconductors
General
4 General
4.1 Nonswitching electrical specifications
4.1.1 DC characteristics
This section includes information about power supply requirements and I/O pin
characteristics.
Table 2. DC characteristics
Min
Typical1
Max
Unit
—
2.7
—
5.5
V
5 V, Iload = –5 mA
VDD – 0.8
—
—
V
3 V, Iload = –2.5 mA
VDD – 0.8
—
—
V
High current drive pins,
high-drive strength2
5 V, Iload = –20 mA
VDD – 0.8
—
—
V
3 V, Iload = –10 mA
VDD – 0.8
—
—
V
Output
high
current
Max total IOH for all ports
5V
—
—
–100
mA
3V
—
—
–60
Output
low
voltage
All I/O pins, standard-drive
strength
5 V, Iload = 5 mA
—
—
0.8
V
3 V, Iload = 2.5 mA
—
—
0.8
V
5 V, Iload =20 mA
—
—
0.8
V
3 V, Iload = 10 mA
—
—
0.8
V
5V
—
—
100
mA
3V
—
—
60
4.5≤VDD