SPC5604EEF2MLH

NXP Semiconductors Data Sheet: Technical Data Document Number: MPC5604E Rev. 6, 11/2019 MPC5604E 100 LQFP 14 mm x 14 mm MPC5604E Microcontroller Data Sheet • • • • • • • Single issue, 32-bit CPU core complex (e200z0h) — Compliant with Power Architecture® embedded category — Variable Length Encoding (VLE) only Memory — 512 KB on-chip Code Flash with ECC and erase/program controller — additional 64 (4 × 16) KB on-chip Data Flash with ECC for EEPROM emulation — 96 KB on-chip SRAM with ECC Fail-safe protection — Programmable watchdog timer — Non-maskable interrupt — Fault collection unit Nexus 2+ interface Interrupts and events — 16-channel eDMA controller — 16 priority level controller — Up to 32 external interrupts for 100-pin LQFP1 — Upto 22 external interrupts for 64-pin LQFP — PIT implements four 32-bit timers — 120 interrupts are routed via INTC General purpose I/Os — Individually programmable as input, output or special function — 39 on LQFP64 — 71 on LQFP1001 1 general purpose eTimer unit — 6 timers each with up/down capabilities — 16-bit resolution, cascadeable counters 64 LQFP 10 mm x 10 mm • • • • • • • • • — Quadrature decode with rotation direction flag — Double buffer input capture and output compare Communications interfaces — 2 LINFlex channels (1 × Master/Slave, 1 × Master Only) — 3 DSPI controllers with automatic chip select generation (up to 2/2/4 chip selects) — 1 FlexCAN interface (2.0B Active) with 32 message buffers One 10-bit analog-to-digital converter (ADC) — 7 input channels – 4 channels routed to the pins – 3 internal connections: 1x temperature sensor, 1x core voltage, 1x IO voltage — Conversion time < 1 μ s including sampling time at full precision — 4 analog watchdogs with interrupt capability On-chip CAN/UART bootstrap loader with Boot Assist Module (BAM) On-chip TSENS 100 MBit Fast Ethernet Controller (FEC) — Supports precision timestamps — MII on 100-pin LQFP package1 — MII-lite on 64-pin LQFP package JPEG/MJPEG 8/12bit Encoder 6 x stereo channels audio interface 2x I2C controller module CRC module 1.The 100-pin package is not a production package. It is used for software development only. NXP reserves the right to change or discontinue this product without notice. Table of Contents 1 2 3 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.1 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Package pinouts and signal descriptions . . . . . . . . . . . . . . . . .6 2.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 2.2 Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.2.1 Power supply and reference voltage pins . . . . . .8 2.2.2 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 2.2.3 Pin muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 3.2 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . .21 3.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .22 3.4 Recommended operating conditions . . . . . . . . . . . . . .23 3.5 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . .24 3.5.1 General notes for specifications at maximum junction temperature . . . . . . . . . . . . . . . . . . . . .25 3.6 Electromagnetic Interference (EMI) characteristics . . .26 3.7 Electrostatic Discharge (ESD) characteristics . . . . . . .27 3.8 Power management electrical characteristics. . . . . . . .27 3.8.1 Power Management Overview. . . . . . . . . . . . . .27 3.8.2 Voltage regulator electrical characteristics . . . .30 3.8.3 Voltage monitor electrical characteristics. . . . . .31 3.9 Power Up/Down reset sequencing . . . . . . . . . . . . . . . .31 3.10 DC electrical characteristics . . . . . . . . . . . . . . . . . . . . .33 3.11 Main oscillator electrical characteristics . . . . . . . . . . . .34 3.12 FMPLL electrical characteristics . . . . . . . . . . . . . . . . . .35 3.13 16 MHz RC oscillator electrical characteristics . . . . . . .36 4 5 6 3.14 Analog-to-Digital Converter (ADC) electrical characteristics 37 3.14.1 Input impedance and ADC accuracy . . . . . . . . 37 3.14.2 ADC conversion characteristics . . . . . . . . . . . . 41 3.15 Temperature sensor electrical characteristics . . . . . . . 42 3.16 Flash memory electrical characteristics . . . . . . . . . . . 42 3.17 NMI filter functional specification . . . . . . . . . . . . . . . . . 44 3.18 AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.18.1 Pad AC specifications. . . . . . . . . . . . . . . . . . . . 44 3.19 AC timing characteristics . . . . . . . . . . . . . . . . . . . . . . . 47 3.19.1 Generic timing diagrams . . . . . . . . . . . . . . . . . 47 3.19.2 RESET pin characteristics . . . . . . . . . . . . . . . . 49 3.19.3 Nexus and JTAG timing . . . . . . . . . . . . . . . . . . 50 3.19.4 GPIO timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 3.19.5 External interrupt timing (IRQ pin) . . . . . . . . . . 53 3.19.6 FlexCAN timing . . . . . . . . . . . . . . . . . . . . . . . . 53 3.19.7 LINFlex timing . . . . . . . . . . . . . . . . . . . . . . . . . 53 3.19.8 DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 3.19.9 Video interface timing. . . . . . . . . . . . . . . . . . . . 59 3.19.10Fast ethernet interface. . . . . . . . . . . . . . . . . . . 60 3.19.11I2C timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 3.19.12SAI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 4.1 100 LQFP mechanical outline drawing . . . . . . . . . . . . 66 4.2 64 LQFP mechanical outline drawing . . . . . . . . . . . . . 70 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 MPC5604E Microcontroller Data Sheet, Rev. 6 2 NXP Semiconductors Overview 1 Overview This document provides electrical specifications, pin assignments, and package diagrams for the MPC5604E series of microcontroller units (MCUs). MPC5604E microcontrollers are members of a new family of next generation microcontrollers built on the Power Architecture. This document describes the features of the family and options available within the family members, and highlights important electrical and physical characteristics of the devices. The MPC5604E microcontroller is a gateway system designed to move data from different sources via Ethernet to a receiving system and vice versa. The supported data sources and sinks are: • • • • Video data (with 8/10/12 bits per data word) Audio data (6× stereo channels) RADAR data (2 × 12 bit with