TDA8037T/C1Y

TDA8037 Low power 3V smart card interface Rev. 1.2 — 30 June 2016 Product data sheet 1. General description The TDA8037 is the cost efficient successor of the established integrated contact smart card reader IC TDA8035. It offers a high level of security for the card performing current limitation, short circuit detection, ESD protection as well as supply supervision. Operating in 3 V supply domain, the current consumption during the shutdown mode of the contact reader is very low. It is therefore the ideal component for a power efficient contact reader. 2. Features and benefits 2.1 Protection of the contact smart card  Thermal and short-circuit protection on all card contacts  VCC regulation:  3 V  5 % on 2  220 nF multilayer ceramic capacitors with low ESR  Current spikes of 40 nA up to 20 MHz, with controlled rise and fall times, filtered overload detection approximately 120 mA  Automatic activation and deactivation sequences initiated by software or by hardware in the event of a short-circuit, card take-off, overheating, VDDhost, VREG and VDD dropping  Enhanced card-side ElectroStatic Discharge (ESD) protection of (> 8 kV)  Supply supervisor for killing spikes during power on and off:  threshold internally fixed  externally by a resistor bridge (with SO28 package only) 2.2 Easy integration into your contact reader          SW compatible to TDA8024, TDA8034 and TDA8035 3 V smart card supply Three protected half-duplex bidirectional buffered I/O lines (C4, C7 and C8) External clock input up to 20 MHz Card clock generation up to 20 MHz using pin CLKDIV with synchronous frequency changes of fCLKIN, fCLKIN/2 (with SO28 package only) Non-inverted control of pin RST using pin RSTIN Built-in debouncing on card presence contact Multiplexed status signal using pin OFFN Chip Select digital input for parallel operation of several TDA8037 ICs (with SO28 package only) TDA8037 NXP Semiconductors Low power 3V smart card interface 2.2.1 Other  TSSOP16 and SO28 package  SO28 version is footprint compatible with TDA8024T  Compliant with ISO 7816, Cisco technology and EMV 4.3 payment systems 3. Applications     Pay TV Electronic payment Identification IC card readers for banking 4. Quick reference data Table 1. Quick reference data VDDP = 3.3 V; VDD(INTF) = 3.3 V; fXtal = 10 MHz; GND = 0 V; Tamb = 25 C; unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit 3 3.3 3.6 V - 250 400 A active mode; CLK = CLKIN; no-load - - 5 mA active mode; CLK = CLKIN; ICC = 65 mA - - 70 mA 2.85 - 3.15 V Supply VDD supply voltage IDD supply current Shutdown mode; fCLKIN = stopped Supply voltage for the card: pin VCC VCC supply voltage DC ICC < 65 mA AC current spikes of 40 nA 2.76 - 3.24 V Vripple(p-p) peak-to-peak ripple voltage from 20 kHz to 200 MHz - - 150 mV ICC supply current - - 65 mA General tdeact deactivation time total sequence 35 90 250 s Ptot total power dissipation Tamb = 25 C to +85 C - - 0.1 W Tamb ambient temperature 25 - +85 C 5. Ordering information Table 2. Ordering information Type number Package Name Description Version TDA8037TT TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 TDA8037T SO28 plastic small outline package; 28 leads; body width 7.5 mm SOT136-1 TDA8037 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1.2 — June 30, 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 2 of 29 TDA8037 NXP Semiconductors Low power 3V smart card interface 6. Block diagram VDD VDDhost 10 µF PORADJ 100 nF VDD GND TEST VDD CS INTERNAL REGULATOR CMDVCCN CLKDIV LATCH input sense SUPERVISOR VCC reset and supalarm 2x 220 nF RSTIN RST BANDGAP HOST INTERFACE INTERNAL OSCILLATOR I/OUC UC AUX1UC configurations bus for smartcard THERMAL PROTECTION reader interface HZ AUX2UC interruption VDD HZ OFFN CLK ISO7816 READER INTERFACE CARD CONNECTOR c5 c1 c6 c2 c7 c3 c8 c4 AUX1 AUX2 DIGITAL SEQUENCER I/O CLOCK CIRCUITRY CLKIN TDA8037 PRESN aaa-011372 Fig 1. Block diagram TDA8037 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1.2 — June 30, 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 3 of 29 TDA8037 NXP Semiconductors Low power 3V smart card interface 7. Pinning information 7.1 Pinning AUX1UC 1 16 I/OUC AUX2UC 2 15 CLKIN VDD 3 14 OFFN PRESN 4 I/O 5 AUX2 6 AUX1 7 GND 8 13 RSTIN TDA8037TT 12 CMDVCCN 11 VCC 10 RST 9 CLK aaa-011373 Fig 2. Pin configuration TSSOP16 7.2 Pinning CLKDIV 1 28 AUX2UC n.c. 2 27 AUX1UC n.c. 3 26 I/OUC TEST 4 25 n.c. n.c. 5 24 CLKIN VDD 6 23 OFFN n.c. 7 n.c. 8 PRESN 9 TDA8037T 22 n.c. 21 CS 20 RSTIN n.c. 10 19 CMDVCCN I/O 11 18 PORADJ AUX2 12 17 VCC AUX1 13 16 RST GND 14 15 CLK aaa-011374 Fig 3. TDA8037 Product data sheet Pin configuration SO28 All information provided in this document is subject to legal disclaimers. Rev. 1.2 — June 30, 2016 © NXP Semiconductors N.V. 2016. All rights reserved. 4 of 29 TDA8037 NXP Semiconductors Low power 3V smart card interface 7.3 Pin description Table 3. Pin description Symbol Pin Pin SO28 TSSOP16 Supply Type Description AUX1UC 27 1 VDD I/O auxiliary data line to/from the host (internal 10 k pull-up resistor to VDD) AUX2UC 28 2 VDD I/O auxiliary data line to/from the host (internal 10 k pull-up resistor to VDD) VDD 6 3 VDD supply supply voltage PRESN 9 4 VDD I card presence contact input (active LOW); if PRESN is true, then the card is considered as present. A debouncing feature of 4.05 ms typ. is built in. I/O 11 5 VCC I/O data line to/from the card (C7)(internal 10 k pull up resistor to VCC) AUX2 12 6 VCC I/O auxiliary data line to/from the card (C8) (internal 10 k pull up resistor to VCC) AUX1 13 7 VCC I/O auxiliary data line to/from the card (C4) (internal 10 k pull up resistor to VCC) GND 14 8 - supply ground CLK 15 9 VCC O clock to the card (C3) RST 16 10 VCC O card reset (C2) VCC 17 11 VCC O supply for the card (C1) (decouple to GND with 2x 220 nF capacitors with ESR