INTEGRATED CIRCUITS
DATA SHEET
TDF8771A
Triple 8-bit video Digital-to-Analog
Converter (DAC)
Product specification
2003 Apr 29
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
FEATURES
GENERAL DESCRIPTION
• 8-bit resolution
The TDF8771A is a triple 8-bit video Digital-to-Analog
Converter (DAC). It converts the digital input signals into
analog voltage outputs at a maximum conversion rate of
35 MHz.
• Sampling rate up to 35 MHz
• Internal reference voltage regulator
• No deglitching circuit required
The DACs are based on resistor-string architecture with
integrated output buffers. The output voltage range is
determined by a built-in reference source.
• Large output voltage range
• 1 kΩ output load
• Power dissipation only 200 mW
The device is fabricated in a 5 V, CMOS process that
ensures high functionality with low power dissipation.
• Single 5 V power supply
• 44-pin QFP package
• Operating ambient temperature from −40 to +85 °C.
APPLICATIONS
• General purpose high-speed digital-to-analog
conversion
• Digital TV
• Graphic display
• Desktop video processing.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDDA
analog supply voltage
4.5
5.0
5.5
V
VDDD
digital supply voltage
4.5
5.0
5.5
V
IDDA
analog supply current
RL = 1 kΩ; note 1
10
30
45
mA
IDDD
digital supply current
fclk = 35 MHz
−
3
10
mA
Tamb
operating ambient
temperature
−40
−
+85
°C
INL
integral non-linearity
fclk = 35 MHz; ramp input
−
±0.3
±1
LSB
DNL
differential non-linearity
fclk = 35 MHz; ramp input
−
±0.15
±0.5
LSB
fclk(max)
maximum clock frequency
35
−
−
MHz
Ptot
total power dissipation
45
200
360
mW
RL = 1 kΩ; fclk = 35 MHz; note 1
Note
1. Minimum and maximum data of current and power consumption are measured in worse case conditions: for
minimum data, all digital inputs are at logic level 0 while for maximum data, all digital inputs are at logic level 1.
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
TDF8771AH
QFP44
2003 Apr 29
DESCRIPTION
plastic quad flat package; 44 leads (lead length 1.3 mm);
body 10 × 10 × 1.75 mm
2
VERSION
SOT307-2
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
BLOCK DIAGRAM
VDDA
handbook, full pagewidth
RED
digital inputs
(bits R0 to R3)
VDDD
32, 35, 39, 43
4
clock input
7, 27
31
12 to 9
1
reference
current input
(IREF)
44
RED
analog output
40
GREEN
analog output
36
BLUE
analog output
4
LSB
DECODER
TDF8771A
RED
digital inputs
(bits R4 to R7)
4
8
5 to 3
GREEN
digital inputs
(bits G0 to G3)
4
20 to 17
4
MSB
DECODER
RESISTOR
STRING
4
LSB
DECODER
GREEN
digital inputs
(bits G4 to G7)
4
16 to 13
BLUE
digital inputs
(bits B0 to B3)
4
30, 29
4
RESISTOR
STRING
MSB
DECODER
26, 25
4
LSB
DECODER
BLUE
digital inputs
(bits B4 to B7)
4
24 to 21
4
RESISTOR
STRING
MSB
DECODER
BANDGAP
REFERENCE
34, 37, 38, 41
33
2, 42
6, 28
MGX351
not
connected
reference voltage
decoupling input
(VREF)
Fig.1 Block diagram.
2003 Apr 29
3
VSSA
VSSD
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
PINNING
SYMBOL
PIN
DESCRIPTION
IREF
1
reference current input for output buffers
VSSA1
2
analog supply ground 1
R7
3
RED digital input data; bit 7 (MSB)
R6
4
RED digital input data; bit 6
R5
5
RED digital input data; bit 5
VSSD1
6
digital supply ground 1
VDDD1
7
digital supply voltage 1
R4
8
RED digital input data; bit 4
R3
9
RED digital input data; bit 3
R2
10
RED digital input data; bit 2
R1
11
RED digital input data; bit 1
R0
12
RED digital input data; bit 0 (LSB)
G7
13
GREEN digital input data; bit 7 (MSB)
G6
14
GREEN digital input data; bit 6
G5
15
GREEN digital input data; bit 5
G4
16
GREEN digital input data; bit 4
G3
17
GREEN digital input data; bit 3
G2
18
GREEN digital input data; bit 2
G1
19
GREEN digital input data; bit 1
G0
20
GREEN digital input data; bit 0 (LSB)
B7
21
BLUE digital input data; bit 7 (MSB)
B6
22
BLUE digital input data; bit 6
B5
23
BLUE digital input data; bit 5
B4
24
BLUE digital input data; bit 4
B3
25
BLUE digital input data; bit 3
B2
26
BLUE digital input data; bit 2
VDDD2
27
digital supply voltage 2
VSSD2
28
digital supply ground 2
B1
29
BLUE digital input data; bit 1
B0
30
BLUE digital input data; bit 0 (LSB)
CLK
31
clock input
VDDA1
32
analog supply voltage 1
VREF
33
decoupling input for reference voltage
n.c.
34
not connected
VDDA2
35
analog supply voltage 2
OUTB
36
BLUE analog output
n.c.
37
not connected
n.c.
38
not connected
VDDA3
39
analog supply voltage 3
OUTG
40
GREEN analog output
2003 Apr 29
4
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
44
RED analog output
44 OUTR
handbook, full pagewidth
IREF
1
33 VREF
VSSA1
2
32 VDDA1
R7
3
31 CLK
R6
4
30 B0
R5
5
29 B1
VSSD1
6
VDDD1
7
27 VDDD2
R4
8
26 B2
R3
9
25 B3
R2 10
24 B4
R1 11
23 B5
28 VSSD2
5
B6 22
B7 21
G0 20
G1 19
G2 18
G3 17
G4 16
G6 14
G7 13
R0 12
TDF8771A
Fig.2 Pin configuration.
2003 Apr 29
34 n.c.
OUTR
35 VDDA2
analog supply voltage 4
36 OUTB
analog supply ground 2
43
42 VSSA2
42
43 VDDA4
VSSA2
VDDA4
37 n.c.
not connected
38 n.c.
41
39 VDDA3
n.c.
40 OUTG
DESCRIPTION
41 n.c.
PIN
G5 15
SYMBOL
TDF8771A
MGX352
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VDDA
analog supply voltage
−0.5
+6.5
V
VDDD
digital supply voltage
−0.5
+6.5
V
∆VDD
supply voltage difference between VDDA and VDDD
−1.0
+1.0
V
Tstg
storage temperature
−55
+150
°C
Tamb
operating ambient temperature
−40
+85
°C
Tj
junction temperature
−
125
°C
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
thermal resistance from junction to ambient in free air
VALUE
UNIT
75
K/W
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
2003 Apr 29
6
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
CHARACTERISTICS
VDDA = VDDD = 4.5 to 5.5 V; VSSA and VSSD shorted together; VDDA − VDDD = −0.5 to +0.5 V; Tamb = −40 to +85 °C;
typical values measured at VDDA = VDDD = 5 V and Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
VDDA
analog supply voltage
4.5
5.0
5.5
V
VDDD
digital supply voltage
4.5
5.0
5.5
V
IDDA
analog supply current
RL = 1 kΩ; note 1
10
30
45
mA
IDDD
digital supply current
fclk = 35 MHz
−
3
10
mA
Inputs
CLOCK INPUT (PIN 31)
VIL
LOW level input voltage
0
−
1.2
V
VIH
HIGH level input voltage
2.0
−
VDDD
V
R, G, B DIGITAL INPUTS (PINS 12 TO 8, 5 TO 3, 20 TO 13, 30, 29 AND 26 TO 21)
VIL
LOW level input voltage
0
−
1.2
V
VIH
HIGH level input voltage
2.0
−
VDDD
V
−
0.6
0.7
mA
REFERENCE CURRENT INPUT FOR OUTPUT BUFFERS (PIN 1)
II
input current
Timing; see Fig.3
fclk(max)
maximum clock frequency
35
−
−
MHz
tCPH
clock pulse width HIGH
9
−
−
ns
tCPL
clock pulse width LOW
9
−
−
ns
tr
clock rise time
−
−
6
ns
tf
clock fall time
−
−
6
ns
tSU;DAT
input data set-up time
4
−
−
ns
tHD;DAT
input data hold time
4
−
−
ns
1.180
1.238
1.305
V
Voltage reference (pin 33, referenced to VSSA)
VVREF
reference voltage
Outputs
OUTB, OUTG, OUTR ANALOG OUTPUTS (PINS 36, 40 AND 44, REFERENCED TO VSSA) FOR 1 kΩ LOAD; see Table 1
FSR
full-scale output voltage range
2.80
3.00
3.18
V
Vos
offset of analog voltage output
−
0.33
−
V
VO(max)
maximum output voltage
data inputs = logic 1; note 2
2.95
3.30
3.52
V
VO(min)
minimum output voltage
data inputs = logic 0; note 2
0.05
0.25
0.45
V
THD
total harmonic distortion
fi = 4.43 MHz; fclk = 35 MHz
−
−47
−
dB
ZL
output load impedance
0.9
1.0
1.1
kΩ
2003 Apr 29
7
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
SYMBOL
PARAMETER
TDF8771A
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Transfer function (fclk = 35 MHz)
INL
integral non-linearity
ramp input
−
±0.3
±1
LSB
DNL
differential non-linearity
ramp input
−
±0.15
±0.5
LSB
αct
crosstalk DAC to DAC
−50
−
−
dB
MDAC
DAC to DAC matching
−
1.0
2.8
%
Switching characteristics (for 1 kΩ output load); see Fig.4
td
input to 50% output delay time
full-scale change
−
12
−
ns
ts1
settling time
10% to 90% of full-scale change
−
15
−
ns
ts2
settling time
to ±1 LSB
−
50
−
ns
−
1
−
LSB⋅ns
Output transients (glitches)
Vg
area for 1 LSB change
Notes
1. Minimum and maximum data of current and power consumption are measured in worse case conditions: for
minimum data, all digital inputs are at logic level 0 while for maximum data, all digital inputs are at logic level 1.
2. VO is directly proportional to VVREF.
Table 1
Input coding and DAC output voltages (typical values)
BINARY INPUT DATA (SYNC = BLANK = 0)
CODE
DAC OUTPUT VOLTAGES (V)
OUTB, OUTR, OUTG
RL = 1 kΩ
0000 0000
0
0.262
0000 0001
1
0.273
2003 Apr 29
to
to
to
1000 0000
128
1.731
to
to
to
1111 1110
254
3.188
1111 1111
255
3.200
8
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
TIMING
,,,,,
,,,,,
t SU; DAT
handbook, full pagewidth
,,,,,
,,,,,
t HD; DAT
V IH
data input
stable
50 %
V IL
clock input
MBB656 - 1
t CPL
t CPH
Fig.3 Input timing.
handbook, full pagewidth
clock input
input code
(example of a
full-scale input
data transition)
50 %
code 1023
code 0
1 LSB
714 mV
(code 1023)
10 %
td
50 %
Vo
90 %
54 mV
(code 0)
1 LSB
t s1
t s2
Fig.4 Switching timing.
2003 Apr 29
50 %
V IL
9
MDB320
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
INTERNAL CIRCUITRY
1/1 page = 296 mm (Datasheet)
V DDD
V DDA
DACs
resistor
string
GND
V SSA
V SSD
(a)
V DDA
27 mm
(b)
V DDA
V DDA
V DD
V DD
V DD
125 Ω
V DD
(typ.)
GND
V SSA
MBB658 - 1
(c)
(d)
(a) Digital inputs; pins 3 to 5, 8 to 26 and 29 to 31.
(b) Pin VREF (pin 33).
(c) Pin IREF (pin 1).
(d) Pins OUTB, OUTG and OUTR (pins 36, 40 and 44).
Fig.5 Internal circuitry.
2003 Apr 29
10
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
APPLICATION INFORMATION
5V
handbook, full pagewidth
5V
VSSA
OUTR
OUTG
10 nF
1
kΩ
VSSA
VDDA4 VSSA2 n.c.
44
VSSA
IREF
5V
VSSA
43
42
41
VSSA
VSSA
VDDA3 n.c.
40
OUTB
10 nF
1
kΩ
39
38
n.c.
37
10 nF
1
kΩ
VSSA
VDDA2 n.c.
36
35
34
VREF
100 nF
1
33
VSSA1
2
32
R7
3
31
CLK
R6
4
30
B0
R5
5
29
B1
VSSD1
6
28
VSSD2
VSSA
6.8 kΩ
VDDD1
5V
TDF8771A
VDDA1
5V
10 nF
27
R4
8
26
B2
R3
9
25
B3
R2
10
24
B4
R1
11
23
B5
12
13
14
15
16
17
18
19
20
21
22
R0
G7
G6
G5
G4
G3
G2
G1
G0
B7
B6
MGX353
Analog and digital supplies should be separated and decoupled.
Supplies are not connected internally.
All ground pins must be connected. One ground plane is preferred although it depends on application.
See Figs 7 and 9 for example of anti-aliasing filter.
Fig.6 Application diagram.
2003 Apr 29
VSSA
VDDD2
7
10 nF
VSSD
5V
10 nF
11
VSSD
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
handbook, full pagewidth
12 µH
TDF8771A
125 Ω
12 µH
18 pF
180 Ω
OUTR (pin 44)
and OUTG (pin 40)
and OUTB (pin 36)
56 pF
18 pF
150 pF
analog video output
(R,G or B)
56 pF
820 Ω
analog ground
2.4 V (p-p)
MGX354
Fig.7 Example of anti-aliasing filter for 2.4 V output swing.
Characteristics of Fig.8
• Order 5; adapted CHEBYSHEV
MSA693
0
1/2 page (Datasheet)
α
(dB)
• Ripple ρ ≥ 0.7 dB
22 mm
• f at −3 dB = 6.2 MHz
• fNOTCH = 10.8 MHz.
40
80
120
160
0
10
20
30
f (MHz)
40
Fig.8 Frequency response for filter shown in Fig.7.
2003 Apr 29
12
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
handbook, full pagewidth
27 µH
TDF8771A
125 Ω
27 µH
6.8 pF
500 Ω
OUTR (pin 44)
and OUTG (pin 40)
and OUTB (pin 36)
27 pF
6.8 pF
68 pF
analog ground
analog video output
(R,G or B)
27 pF
500 Ω
1.5 V (p-p)
MGX355
Fig.9 Example of anti-aliasing filter for 1.5 V output swing.
Characteristics of Fig.10
• Order 5; adapted CHEBYSHEV
MSA694
0
1/2 page (Datasheet)
α
(dB)
• Ripple ρ ≥ 0.25 dB
22 mm
• f at −3 dB = 5.6 MHz
• fNOTCH = 11.7 MHz.
40
80
120
160
0
10
20
30
40
f i (MHz)
Fig.10 Frequency response for filter shown in
Fig.9.
2003 Apr 29
13
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
PACKAGE OUTLINE
QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 10 x 10 x 1.75 mm
SOT307-2
c
y
X
A
33
23
34
22
ZE
e
E HE
A A2
wM
(A 3)
A1
θ
bp
Lp
pin 1 index
L
12
44
1
detail X
11
wM
bp
e
ZD
v M A
D
B
HD
v M B
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HD
HE
L
Lp
v
w
y
mm
2.1
0.25
0.05
1.85
1.65
0.25
0.4
0.2
0.25
0.14
10.1
9.9
10.1
9.9
0.8
12.9
12.3
12.9
12.3
1.3
0.95
0.55
0.15
0.15
0.1
Z D (1) Z E (1)
1.2
0.8
1.2
0.8
θ
o
10
0o
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
ISSUE DATE
97-08-01
03-02-25
SOT307-2
2003 Apr 29
EUROPEAN
PROJECTION
14
Philips Semiconductors
Product specification
Triple 8-bit video Digital-to-Analog
Converter (DAC)
TDF8771A
If wave soldering is used the following conditions must be
observed for optimal results:
SOLDERING
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferably be kept:
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
• below 220 °C for all the BGA packages and packages
with a thickness ≥ 2.5mm and packages with a
thickness
