TJA1042
High-speed CAN transceiver with Standby mode
Rev. 10 — 24 November 2017
Product data sheet
1. General description
The TJA1042 high-speed CAN transceiver provides an interface between a Controller
Area Network (CAN) protocol controller and the physical two-wire CAN bus. The
transceiver is designed for high-speed CAN applications in the automotive industry,
providing the differential transmit and receive capability to (a microcontroller with) a CAN
protocol controller.
The TJA1042 belongs to the third generation of high-speed CAN transceivers from NXP
Semiconductors, offering significant improvements over first- and second-generation
devices such as the TJA1040. It offers improved ElectroMagnetic Compatibility (EMC)
and ElectroStatic Discharge (ESD) performance, and also features:
• Ideal passive behavior to the CAN bus when the supply voltage is off
• A very low-current Standby mode with bus wake-up capability
• TJA1042T/3 and TJA1042TK/3 can be interfaced directly to microcontrollers with
supply voltages from 3 V to 5 V
The TJA1042 implements the CAN physical layer as defined in ISO 11898-2:2016 and
SAE J2284-1 to SAE J2284-5. This implementation enables reliable communication in the
CAN FD fast phase at data rates up to 5 Mbit/s.
These features make the TJA1042 an excellent choice for all types of HS-CAN networks,
in nodes that require a low-power mode with wake-up capability via the CAN bus.
2. Features and benefits
2.1 General
ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant
Timing guaranteed for data rates up to 5 Mbit/s in the CAN FD fast phase
Suitable for 12 V and 24 V systems
Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)
VIO input on TJA1042T/3 and TJA1042TK/3 allows for direct interfacing with 3 V to 5 V
microcontrollers
SPLIT voltage output on TJA1042T for stabilizing the recessive bus level
Available in SO8 package and leadless HVSON8 package (3.0 mm 3.0 mm) with
improved Automated Optical Inspection (AOI) capability
Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
AEC-Q100 qualified
TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
2.2 Predictable and fail-safe behavior
Very low-current Standby mode with host and bus wake-up capability
Functional behavior predictable under all supply conditions
Transceiver disengages from the bus when not powered up (zero load)
Transmit Data (TXD) dominant time-out function
Bus-dominant time-out function in Standby mode
Undervoltage detection on pins VCC and VIO
2.3 Protections
High ESD handling capability on the bus pins (8 kV)
High voltage robustness on CAN pins (58 V)
Bus pins protected against transients in automotive environments
Thermally protected
3. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Min
Typ
Max
Unit
VCC
supply voltage
4.5
-
5.5
V
VIO
supply voltage on pin VIO
2.8
-
5.5
V
Vuvd(VCC)
undervoltage detection voltage
on pin VCC
3.5
-
4.5
V
Vuvd(VIO)
undervoltage detection voltage
on pin VIO
1.3
2.0
2.7
V
ICC
supply current
Standby mode
-
10
15
A
Normal mode; bus recessive
2.5
5
10
mA
Normal mode; bus dominant
20
45
70
mA
Standby mode; VTXD = VIO
5
-
14
A
A
IIO
Conditions
supply current on pin VIO
Normal mode
recessive; VTXD = VIO
15
80
200
dominant; VTXD = 0 V
-
350
1000 A
8
-
+8
kV
VESD
electrostatic discharge voltage
VCANH
voltage on pin CANH
58
-
+58
V
VCANL
voltage on pin CANL
58
-
+58
V
Tvj
virtual junction temperature
40
-
+150 C
TJA1042
Product data sheet
IEC 61000-4-2 at pins CANH and CANL
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
2 of 26
TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
4. Ordering information
Table 2.
Ordering information
Type number[1]
TJA1042T
Package
Name
Description
Version
SO8
plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
TJA1042T/3
SO8
plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
TJA1042TK/3
HVSON8
plastic thermal enhanced very thin small outline package; no leads;
8 terminals; body 3 3 0.85 mm
SOT782-1
[1]
TJA1042T with SPLIT pin; TJA1042T/3 and TJA1042TK/3 with VIO pin.
5. Block diagram
VIO
VCC
5
3
VCC
TJA1042
TEMPERATURE
PROTECTION
VIO(1)
TXD
7
1
TIME-OUT
SLOPE
CONTROL
AND
DRIVER
MODE
CONTROL
SPLIT
6
CANH
CANL
VIO(1)
STB
RXD
8
5
SPLIT(1)
4
MUX
AND
DRIVER
WAKE-UP
FILTER
2
GND
015aaa017
(1) In a transceiver with a SPLIT pin, the VIO input is internally connected to VCC.
Fig 1.
TJA1042
Product data sheet
Block diagram
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Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
3 of 26
TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
6. Pinning information
6.1 Pinning
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Fig 2.
b. TJA1042T/3: SO8
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c. TJA1042TK/3: HVSON8
Pin configuration diagrams
6.2 Pin description
Table 3.
Symbol
Pin
Description
TXD
1
transmit data input
GND
2[1]
ground supply
VCC
3
supply voltage
RXD
4
receive data output; reads out data from the bus lines
SPLIT
5
common-mode stabilization output; in TJA1042T version only
VIO
5
supply voltage for I/O level adapter; in TJA1042T/3 and TJA1042TK/3 versions
only
CANL
6
LOW-level CAN bus line
CANH
7
HIGH-level CAN bus line
STB
8
Standby mode control input
[1]
TJA1042
Product data sheet
Pin description
HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The
GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is
recommended that the exposed center pad also be soldered to board ground.
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
4 of 26
TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
7. Functional description
The TJA1042 is a HS-CAN stand-alone transceiver with Standby mode. It combines the
functionality of the PCA82C250, PCA82C251 and TJA1040 transceivers with improved
EMC and ESD handling capability and quiescent current performance. Improved slope
control and high DC handling capability on the bus pins provide additional application
flexibility.
The TJA1042 is available in two versions, distinguished only by the function of pin 5:
• The TJA1042T is backwards compatible with the TJA1040 when used with a 5 V
microcontroller, and also covers existing PCA82C250 and PCA82C251 applications
• The TJA1042T/3 and TJA1042TK/3 allow for direct interfacing to microcontrollers with
supply voltages down to 3 V
7.1 Operating modes
The TJA1042 supports two operating modes, Normal and Standby, which are selected via
pin STB. See Table 4 for a description of the operating modes under normal supply
conditions.
Table 4.
Operating modes
Mode
Pin STB
Pin RXD
LOW
HIGH
Normal
LOW
bus dominant
bus recessive
Standby
HIGH
wake-up request
detected
no wake-up request
detected
7.1.1 Normal mode
A LOW level on pin STB selects Normal mode. In this mode, the transceiver can transmit
and receive data via the bus lines CANH and CANL (see Figure 1 for the block diagram).
The differential receiver converts the analog data on the bus lines into digital data which is
output to pin RXD. The slopes of the output signals on the bus lines are controlled
internally and are optimized in a way that guarantees the lowest possible EME.
7.1.2 Standby mode
A HIGH level on pin STB selects Standby mode. In Standby mode, the transceiver is not
able to transmit or correctly receive data via the bus lines. The transmitter and
Normal-mode receiver blocks are switched off to reduce supply current, and only a
low-power differential receiver monitors the bus lines for activity. The wake-up filter on the
output of the low-power receiver does not latch bus dominant states, but ensures that only
bus dominant and bus recessive states that persist longer than tfltr(wake)bus are reflected on
pin RXD.
In Standby mode, the bus lines are biased to ground to minimize the system supply
current. The low-power receiver is supplied by VIO, and is capable of detecting CAN bus
activity even if VIO is the only supply voltage available. When pin RXD goes LOW to signal
a wake-up request, a transition to Normal mode will not be triggered until STB is forced
LOW.
TJA1042
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
5 of 26
TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
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Fig 3.
Wake-up timing
7.2 Fail-safe features
7.2.1 TXD dominant time-out function
A ‘TXD dominant time-out’ timer is started when pin TXD is set LOW. If the LOW state on
pin TXD persists for longer than tto(dom)TXD, the transmitter is disabled, releasing the bus
lines to recessive state. This function prevents a hardware and/or software application
failure from driving the bus lines to a permanent dominant state (blocking all network
communications). The TXD dominant time-out timer is reset when pin TXD is set to HIGH.
The TXD dominant time-out time also defines the minimum possible bit rate of 40 kbit/s.
7.2.2 Bus dominant time-out function
In Standby mode a 'bus dominant time-out' timer is started when the CAN bus changes
from recessive to dominant state. If the dominant state on the bus persists for longer than
tto(dom)bus, the RXD pin is reset to HIGH. This function prevents a clamped dominant bus
(due to a bus short-circuit or a failure in one of the other nodes on the network) from
generating a permanent wake-up request. The bus dominant time-out timer is reset when
the CAN bus changes from dominant to recessive state.
7.2.3 Internal biasing of TXD and STB input pins
Pins TXD and STB have internal pull-ups to VIO to ensure a safe, defined state in case
one or both of these pins are left floating. Pull-up currents flow in these pins in all states;
both pins should be held HIGH in Standby mode to minimize standby current.
7.2.4 Undervoltage detection on pins VCC and VIO
Should VCC drop below the VCC undervoltage detection level, Vuvd(VCC), the transceiver
will switch to Standby mode. The logic state of pin STB will be ignored until VCC has
recovered.
Should VIO drop below the VIO undervoltage detection level, Vuvd(VIO), the transceiver will
switch off and disengage from the bus (zero load) until VIO has recovered.
TJA1042
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
6 of 26
TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
7.2.5 Overtemperature protection
The output drivers are protected against overtemperature conditions. If the virtual junction
temperature exceeds the shutdown junction temperature, Tj(sd), the output drivers will be
disabled until the virtual junction temperature falls below Tj(sd) and TXD becomes
recessive again. Including the TXD condition ensures that output driver oscillation due to
temperature drift is avoided.
7.3 SPLIT output pin and VIO supply pin
Two versions of the TJA1042 are available, only differing in the function of a single pin.
Pin 5 is either a SPLIT output pin or a VIO supply pin.
7.3.1 SPLIT pin
Using the SPLIT pin on the TJA1042T in conjunction with a split termination network (see
Figure 4 and Figure 7) can help to stabilize the recessive voltage level on the bus. This
will reduce EME in networks with DC leakage to ground (e.g. from deactivated nodes with
poor bus leakage performance). In Normal mode, pin SPLIT delivers a DC output voltage
of 0.5VCC. In Standby mode or when VCC is off, pin SPLIT is floating. When not used, the
SPLIT pin should be left open.
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DDD
Stabilization circuitry and application for version with SPLIT pin
7.3.2 VIO supply pin
Pin VIO on the TTJA1042T/3 and TJA1042TK/3 should be connected to the
microcontroller supply voltage (see Figure 8). This will adjust the signal levels of
pins TXD, RXD and STB to the I/O levels of the microcontroller. Pin VIO also provides the
internal supply voltage for the low-power differential receiver of the transceiver. For
applications running in low-power mode, this allows the bus lines to be monitored for
activity even if there is no supply voltage on pin VCC.
For versions of the TJA1042 without a VIO pin, the VIO input is internally connected to VCC.
This sets the signal levels of pins TXD, RXD and STB to levels compatible with 5 V
microcontrollers.
TJA1042
Product data sheet
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Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
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TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to GND.
Symbol
Parameter
x[1]
Vx
voltage on pin
V(CANH-CANL)
voltage between pin CANH
and pin CANL
Vtrt
transient voltage
Conditions
Min
Max
Unit
on pins CANH, CANL and SPLIT
58
+58
V
on any other pin
0.3
+7
V
27
+27
V
on pins CANH, CANL
[2]
pulse 1
100
-
V
pulse 2a
-
75
V
pulse 3a
150
-
V
-
100
V
8
+8
kV
8
+8
kV
4
+4
kV
300
+300
V
750
+750
V
500
+500
V
40
+150
C
55
+150
C
pulse 3b
VESD
electrostatic discharge voltage IEC 61000-4-2 (150 pF, 330 )
[3]
at pins CANH and CANL
Human Body Model (HBM); 100 pF, 1.5 k
[4]
at pins CANH and CANL
at any other pin
Machine Model (MM); 200 pF, 0.75 H, 10
[5]
at any pin
Charged Device Model (CDM); field Induced
charge; 4 pF
[6]
at corner pins
at any pin
Tvj
virtual junction temperature
Tstg
storage temperature
[7]
[1]
The device can sustain voltages up to the specified values over the product lifetime, provided applied voltages (including transients)
never exceed these values.
[2]
According to IEC TS 62228 (2007), Section 4.2.4; parameters for standard pulses defined in ISO7637 part 2: 2004-06.
[3]
According to IEC TS 62228 (2007), Section 4.3; DIN EN 61000-4-2.
[4]
According to AEC-Q100-002.
[5]
According to AEC-Q100-003.
[6]
According to AEC-Q100-011 Rev-C1. The classification level is C4B.
[7]
In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is: Tvj = Tamb + P Rth(vj-a), where Rth(vj-a) is a
fixed value to be used for the calculation of Tvj. The rating for Tvj limits the allowable combinations of power dissipation (P) and ambient
temperature (Tamb).
9. Thermal characteristics
Table 6.
Thermal characteristics
According to IEC 60747-1.
Symbol
Parameter
Conditions
Value
Unit
Rth(vj-a)
thermal resistance from virtual junction to ambient
SO8 package; in free air
145
K/W
HVSON8 package; in free air
50
K/W
TJA1042
Product data sheet
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Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
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TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
10. Static characteristics
Table 7.
Static characteristics
Tvj = 40 C to +150 C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL = 60 unless specified otherwise; All voltages are
defined with respect to ground; Positive currents flow into the IC.[2]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Supply; pin VCC
VCC
supply voltage
4.5
-
5.5
V
Vuvd(VCC)
undervoltage detection
voltage on pin VCC
3.5
-
4.5
V
ICC
supply current
TJA1042T; includes IIO; VTXD = VIO[3]
-
10
15
A
TJA1042T/3 or TJA1042TK/3
-
-
5
A
Standby mode
Normal mode
recessive; VTXD = VIO[3]
2.5
5
10
mA
dominant; VTXD = 0 V
20
45
70
mA
dominant; VTXD = 0 V;
short circuit on bus lines;
3 V VCANH = VCANL) +18 V
2.5
80
110
mA
I/O level adapter supply; pin VIO[1]
VIO
supply voltage on pin VIO
2.8
-
5.5
V
Vuvd(VIO)
undervoltage detection
voltage on pin VIO
1.3
2.0
2.7
V
IIO
supply current on pin VIO
5
-
14
A
recessive; VTXD = VIO[3]
15
80
200
A
dominant; VTXD = 0 V
-
350
1000
A
0.7VIO[3] -
VIO[3] +
0.3
V
0.3
-
0.3VIO[3] V
Standby mode; VTXD = VIO[3]
Normal mode
Standby mode control input; pin STB
[4]
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
IIH
HIGH-level input current
VSTB = VIO[3]
1
-
+1
A
IIL
LOW-level input current
VSTB = 0 V
15
-
1
A
0.7VIO[3] -
VIO[3] +
0.3
V
0.3
-
0.3VIO[3] V
5
-
+5
CAN transmit data input; pin TXD
[4]
VIH
HIGH-level input voltage
VIL
LOW-level input voltage
IIH
HIGH-level input current
VTXD = VIO[3]
IIL
LOW-level input current
VTXD = 0 V
Ci
input capacitance
A
260
150
30
A
[5]
-
5
10
pF
[3]
8
3
1
mA
2
5
12
mA
CAN receive data output; pin RXD
IOH
HIGH-level output current
VRXD = VIO 0.4 V
IOL
LOW-level output current
VRXD = 0.4 V; bus dominant
TJA1042
Product data sheet
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Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
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TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
Table 7.
Static characteristics …continued
Tvj = 40 C to +150 C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL = 60 unless specified otherwise; All voltages are
defined with respect to ground; Positive currents flow into the IC.[2]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
pin CANH; RL = 50 to 65
2.75
3.5
4.5
V
pin CANL; RL = 50 to 65
0.5
1.5
2.25
V
400
-
+400
mV
0.9VCC
-
1.1VCC
V
RL = 45 to 65
1.5
-
3
V
RL = 45 to 70
1.5
-
3.3
V
RL = 2240
1.5
-
5
V
Normal mode: VTXD = VIO[3]
50
-
+50
mV
Standby mode
0.2
-
+0.2
V
2
0.5VCC 3
V
0.1
-
+0.1
V
Bus lines; pins CANH and CANL
VO(dom)
dominant output voltage
Vdom(TX)sym transmitter dominant voltage
symmetry
VTXsym
VO(dif)
transmitter voltage symmetry
differential output voltage
VTXD = 0 V; t < tto(dom)TXD
Vdom(TX)sym = VCC VCANH VCANL
VTXsym = VCANH + VCANL;
fTXD = 250 kHz, 1 MHz and 2.5 MHz;
CSPLIT = 4.7 nF; VCC = 4.75 V to 5.25 V
[5]
[6]
dominant: Normal mode; VTXD = 0 V;
t < tto(dom)TXD; VCC = 4.75 V to 5.25 V
recessive; no load
VO(rec)
recessive output voltage
Normal mode; VTXD =
VIO[3];
no load
Standby mode; no load
Vth(RX)dif
differential receiver threshold
voltage
30 V VCANL +30 V;
30 V VCANH +30 V
Normal mode
0.5
0.7
0.9
V
0.4
0.7
1.15
V
Normal mode
4
-
0.5
V
Standby mode
4
-
0.4
V
[7]
Standby mode
Vrec(RX)
Vdom(RX)
receiver recessive voltage
receiver dominant voltage
30 V VCANL +30 V;
30 V VCANH +30 V
30 V VCANL +30 V;
30 V VCANH +30 V
Normal mode
0.9
-
9.0
V
Standby mode
1.15
-
9.0
V
50
120
200
mV
pin CANH; VCANH = 15 V to +40 V
100
70
40
mA
pin CANL; VCANL = 15 V to +40 V
40
70
100
mA
Vhys(RX)dif
differential receiver hysteresis 30 V VCANL +30 V;
voltage
30 V VCANH +30 V
IO(sc)dom
dominant short-circuit output
current
VTXD = 0 V; t < tto(dom)TXD; VCC = 5 V
IO(sc)rec
recessive short-circuit output
current
Normal mode; VTXD =
VCANH = VCANL = 27 V to +32 V
5
-
+5
mA
IL
leakage current
VCC = VIO = 0 V or VCC = VIO = shorted
to ground via 47 k;
VCANH = VCANL = 5 V
5
-
+5
A
Ri
input resistance
2 V VCANL +7 V;
2 V VCANH +7 V
9
15
28
k
TJA1042
Product data sheet
VIO[3]
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 24 November 2017
[5]
© NXP N.V. 2017. All rights reserved.
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TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
Table 7.
Static characteristics …continued
Tvj = 40 C to +150 C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL = 60 unless specified otherwise; All voltages are
defined with respect to ground; Positive currents flow into the IC.[2]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
0 V VCANL +5 V;
0 V VCANH +5 V
[5]
Ri
input resistance deviation
1
-
+1
%
Ri(dif)
differential input resistance
2 V VCANL +7 V;
2 V VCANH +7 V
[5]
19
30
52
k
Ci(cm)
common-mode input
capacitance
[5]
-
-
20
pF
Ci(dif)
differential input capacitance
[5]
-
-
10
pF
Normal mode
ISPLIT = 500 A to +500 A
0.3VCC
0.5VCC 0.7VCC
Normal mode; RL = 1 M
0.45VCC 0.5VCC 0.55VCC V
Standby mode
VSPLIT = 58 V to +58 V
5
-
+5
A
-
190
-
C
Common mode stabilization output; pin SPLIT; only for TJA1042T
output voltage
VO
leakage current
IL
V
Temperature detection
Tj(sd)
[5]
shutdown junction
temperature
[1]
Only TJA1042T/3 and TJA1042TK/3 have a VIO pin. With TJA1042T, the VIO input is internally connected to VCC.
[2]
All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to
cover the specified temperature and power supply voltage range.
[3]
VIO = VCC for the non-VIO product variant TJA1042T.
[4]
Maximum value assumes VCC < VIO; if VCC > VIO, the maximum value will be VCC + 0.3 V.
[5]
Not tested in production; guaranteed by design.
[6]
The test circuit used to measure the bus output voltage symmetry (which includes CSPLIT) is shown in Figure 10.
[7]
For TJA1042T/3 and TJA1042TK/3: values valid when VIO = 4.5 V to 5.5 V; when VIO = 2.8 V to 4.5 V, values valid when
12 V VCANL +12 V, 12 V VCANH +12 V.
11. Dynamic characteristics
Table 8.
Dynamic characteristics
Tvj = 40 C to +150 C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL = 60 unless specified otherwise. All voltages are
defined with respect to ground. Positive currents flow into the IC.[2]
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Transceiver timing; pins CANH, CANL, TXD and RXD; see Figure 5 and Figure 9
td(TXD-busdom)
delay time from TXD to bus dominant
Normal mode
-
65
-
ns
td(TXD-busrec)
delay time from TXD to bus recessive
Normal mode
-
90
-
ns
td(busdom-RXD) delay time from bus dominant to RXD
Normal mode
-
60
-
ns
td(busrec-RXD)
delay time from bus recessive to RXD
Normal mode
-
65
-
ns
td(TXDL-RXDL)
delay time from TXD LOW to RXD LOW
version with SPLIT pin;
Normal mode
60
-
220
ns
versions with VIO pin;
Normal mode
60
-
250
ns
TJA1042
Product data sheet
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NXP Semiconductors
High-speed CAN transceiver with Standby mode
Table 8.
Dynamic characteristics …continued
Tvj = 40 C to +150 C; VCC = 4.5 V to 5.5 V; VIO = 2.8 V to 5.5 V[1]; RL = 60 unless specified otherwise. All voltages are
defined with respect to ground. Positive currents flow into the IC.[2]
Symbol
Parameter
Conditions
td(TXDH-RXDH)
delay time from TXD HIGH to RXD HIGH version with SPLIT pin;
Normal mode
versions with VIO pin;
Normal mode
tbit(bus)
tbit(RXD)
transmitted recessive bit width
bit time on pin RXD
Typ
Max
Unit
60
-
220
ns
60
-
250
ns
tbit(TXD) = 500 ns
[3]
435
-
530
ns
tbit(TXD) = 200 ns
[3]
155
-
210
ns
tbit(TXD) = 500 ns
[3]
400
-
550
ns
tbit(TXD) = 200 ns
[3]
120
-
220
ns
65
-
+40
ns
trec
receiver timing symmetry
tbit(TXD) = 500 ns
tto(dom)TXD
TXD dominant time-out time
VTXD = 0 V; Normal mode
tto(dom)bus
bus dominant time-out time
tfltr(wake)bus
bus wake-up filter time
45
-
+15
ns
0.3
2
5
ms
Standby mode
0.3
2
5
ms
version with SPLIT pin
Standby mode
0.5
1
3
s
versions with VIO pin
Standby mode
0.5
1.5
5
s
7
25
47
s
tbit(TXD) = 200 ns
td(stb-norm)
Min
standby to normal mode delay time
[4]
[1]
Only TJA1042T/3 and TJA1042TK/3 have a VIO pin. With TJA1042T, the VIO input is internally connected to VCC.
[2]
All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to
cover the specified temperature and power supply voltage range.
[3]
See Figure 6.
[4]
Minimum value of 0.8 ms required according to SAE J2284; 0.3 ms is allowed according to ISO11898-2:2016 for legacy devices.
TJA1042
Product data sheet
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TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
+,*+
7;'
/2:
&$1+
&$1/
GRPLQDQW
9
92 GLI
9
UHFHVVLYH
+,*+
5;'
/2:
WG 7;'EXVGRP
WG 7;'EXVUHF
WG EXVGRP5;'
WG 7;'/5;'/
Fig 5.
WG EXVUHF5;'
WG 7;'+5;'+
DDD
CAN transceiver timing diagram
7;'
[WELW 7;'
WELW 7;'
9
92 GLI
9
WELW EXV
5;'
WELW 5;'
DDD
Fig 6.
TJA1042
Product data sheet
CAN FD timing definitions according to ISO 11898-2:2016
All information provided in this document is subject to legal disclaimers.
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TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
12. Application information
12.1 Application diagrams
9
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9&&
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63/,7
67%
7-$7
7;'
&$1/
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9''
3[[
5;'
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0,&52
&21752//(5
7;
5;
*1'
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DDD
(1) Optional, depends on regulator.
(2) Optional common mode stabilization by a voltage source of VCC/2 at pin SPLIT.
Fig 7.
Typical application with TJA1042T and a 5 V microcontroller.
%$7
9
RQRIIFRQWURO
9
9&&
9,2
&$1+
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7-$7
7-$7.
&$1/
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7;'
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*1'
3\\
7;
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9''
0,&52
&21752//(5
*1'
DDD
(1) Optional, depends on regulator.
Fig 8.
Typical application with TJA1042T/3 or TJA1042TK/3 and a 3 V microcontroller.
12.2 Application hints
Further information on the application of the TJA1042 can be found in NXP application
hints AH1014 ‘Application Hints - Standalone high speed CAN transceiver
TJA1042/TJA1043/TJA1048/TJA1051’.
TJA1042
Product data sheet
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TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
13. Test information
+5 V
47 μF
100 nF
VIO(1)
VCC
TXD
CANH
TJA1042
RL
SPLIT
RXD
100 pF
CANL
GND
STB
15 pF
015aaa024
(1) For versions with a VIO pin (TJA1042T/3 and TJA1042TK/3), the VIO pin is connected to pin VCC.
Fig 9.
Timing test circuit for CAN transceiver
9,2
9&&
7;'
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0+]RU
0+]
&$1+
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7-$
5;'
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ȍ
&$1/
*1'
DDD
Fig 10. Test circuit for measuring transceiver driver symmetry
13.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q100 Rev-G - Failure mechanism based stress test qualification for
integrated circuits, and is suitable for use in automotive applications.
TJA1042
Product data sheet
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15 of 26
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High-speed CAN transceiver with Standby mode
14. Package outline
62 SODVWLFVPDOORXWOLQHSDFNDJH OHDGV ERG\ZLGWK PP
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Fig 11. Package outline SOT96-1 (SO8)
TJA1042
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
16 of 26
TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
+9621 SODVWLFWKHUPDOHQKDQFHGYHU\WKLQVPDOORXWOLQHSDFNDJH QROHDGV
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Fig 12. Package outline SOT782-1 (HVSON8)
TJA1042
Product data sheet
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Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
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TJA1042
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High-speed CAN transceiver with Standby mode
15. Handling information
All input and output pins are protected against ElectroStatic Discharge (ESD) under
normal handling. When handling ensure that the appropriate precautions are taken as
described in JESD625-A or equivalent standards.
16. Soldering of SMD packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
16.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
16.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
•
•
•
•
•
•
Board specifications, including the board finish, solder masks and vias
Package footprints, including solder thieves and orientation
The moisture sensitivity level of the packages
Package placement
Inspection and repair
Lead-free soldering versus SnPb soldering
16.3 Wave soldering
Key characteristics in wave soldering are:
TJA1042
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High-speed CAN transceiver with Standby mode
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities
16.4 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 13) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 9 and 10
Table 9.
SnPb eutectic process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350
< 2.5
235
220
2.5
220
220
Table 10.
Lead-free process (from J-STD-020D)
Package thickness (mm)
Package reflow temperature (C)
Volume (mm3)
< 350
350 to 2000
> 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 13.
TJA1042
Product data sheet
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High-speed CAN transceiver with Standby mode
maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Fig 13. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
17. Soldering of HVSON packages
Section 16 contains a brief introduction to the techniques most commonly used to solder
Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON
leadless package ICs can found in the following application notes:
• AN10365 ‘Surface mount reflow soldering description”
• AN10366 “HVQFN application information”
TJA1042
Product data sheet
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Rev. 10 — 24 November 2017
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High-speed CAN transceiver with Standby mode
18. Appendix: ISO 11898-2:2016 parameter cross-reference list
Table 11.
ISO 11898-2:2016 to NXP data sheet parameter conversion
ISO 11898-2:2016
NXP data sheet
Parameter
Notation
Symbol
Parameter
Single ended voltage on CAN_H
VCAN_H
VO(dom)
dominant output voltage
Single ended voltage on CAN_L
VCAN_L
Differential voltage on normal bus load
VDiff
VO(dif)
differential output voltage
VSYM
VTXsym
transmitter voltage symmetry
Absolute current on CAN_H
ICAN_H
IO(sc)dom
Absolute current on CAN_L
ICAN_L
dominant short-circuit output
current
HS-PMA dominant output characteristics
Differential voltage on effective resistance during arbitration
Optional: Differential voltage on extended bus load range
HS-PMA driver symmetry
Driver symmetry
Maximum HS-PMA driver output current
HS-PMA recessive output characteristics, bus biasing active/inactive
VO(rec)
recessive output voltage
VDiff
VO(dif)
differential output voltage
tdom
tto(dom)TXD
TXD dominant time-out time
Single ended output voltage on CAN_H
VCAN_H
Single ended output voltage on CAN_L
VCAN_L
Differential output voltage
Optional HS-PMA transmit dominant timeout
Transmit dominant timeout, long
Transmit dominant timeout, short
HS-PMA static receiver input characteristics, bus biasing active/inactive
Recessive state differential input voltage range
VDiff
Vth(RX)dif
differential receiver threshold
voltage
Vrec(RX)
receiver recessive voltage
Vdom(RX)
receiver dominant voltage
Dominant state differential input voltage range
HS-PMA receiver input resistance (matching)
Differential internal resistance
RDiff
Ri(dif)
differential input resistance
Single ended internal resistance
RCAN_H
RCAN_L
Ri
input resistance
Matching of internal resistance
MR
Ri
input resistance deviation
tLoop
td(TXDH-RXDH)
delay time from TXD HIGH to
RXD HIGH
td(TXDL-RXDL)
delay time from TXD LOW to RXD
LOW
HS-PMA implementation loop delay requirement
Loop delay
Optional HS-PMA implementation data signal timing requirements for use with bit rates above 1 Mbit/s up to
2 Mbit/s and above 2 Mbit/s up to 5 Mbit/s
tBit(Bus)
tbit(bus)
transmitted recessive bit width
Received recessive bit width @ 2 Mbit/s / @ 5 Mbit/s
tBit(RXD)
tbit(RXD)
bit time on pin RXD
Receiver timing symmetry @ 2 Mbit/s / @ 5 Mbit/s
tRec
trec
receiver timing symmetry
Transmitted recessive bit width @ 2 Mbit/s / @ 5 Mbit/s,
intended
TJA1042
Product data sheet
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High-speed CAN transceiver with Standby mode
Table 11.
ISO 11898-2:2016 to NXP data sheet parameter conversion …continued
ISO 11898-2:2016
NXP data sheet
Parameter
Notation
Symbol
Parameter
VDiff
V(CANH-CANL)
voltage between pin CANH and
pin CANL
Vx
voltage on pin x
HS-PMA maximum ratings of VCAN_H, VCAN_L and VDiff
Maximum rating VDiff
General maximum rating VCAN_H and VCAN_L
VCAN_H
Optional: Extended maximum rating VCAN_H and VCAN_L VCAN_L
HS-PMA maximum leakage currents on CAN_H and CAN_L, unpowered
Leakage current on CAN_H, CAN_L
ICAN_H
ICAN_L
IL
leakage current
tFilter
twake(busdom)[1] bus dominant wake-up time
HS-PMA bus biasing control timings
CAN activity filter time, long
twake(busrec)[1]
bus recessive wake-up time
tWake
tto(wake)bus
bus wake-up time-out time
Timeout for bus inactivity
tSilence
tto(silence)
bus silence time-out time
Bus Bias reaction time
tBias
td(busact-bias)
delay time from bus active to bias
CAN activity filter time, short
Wake-up timeout, short
Wake-up timeout, long
[1]
tfltr(wake)bus - bus wake-up filter time, in devices with basic wake-up functionality
TJA1042
Product data sheet
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High-speed CAN transceiver with Standby mode
19. Revision history
Table 12.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TJA1042 v.10
20171124
Product data sheet
-
TJA1042 v.9
Modifications:
•
Updated to comply with ISO 11898-2:2016 and SAE J22884-1 through SAE J2284-5 specifications:
– Section 1: text amended (2nd last paragraph)
– Section 2.1: text amended (1st entry)
– Table 7: values changed and/or measurements conditions amended/added for parameters ICC,
VTXsym, VO(dif), Vrec(RX), Vdom(RX), IO(sc)dom, Ri, Ri and Ri(dif)
– Table 8: Table note 4 added
– Figure 5: thresholds clarified
– Figure 6: title changed
•
•
Table 7: Table note 7 revised
Figure 7, Figure 8, Figure 10: amended
TJA1042 v.9
20160523
Product data sheet
-
TJA1042 v.8
TJA1042 v.8
20150115
Product data sheet
-
TJA1042 v.7
TJA1042 v.7
20120508
Product data sheet
-
TJA1042 v.6
TJA1042 v.6
20110323
Product data sheet
-
TJA1042 v.5
TJA1042 v.5
20110118
Product data sheet
-
TJA1042 v.4
TJA1042 v.4
20091006
Product data sheet
-
TJA1042 v.3
TJA1042 v.3
20090825
Product data sheet
-
TJA1042 v.2
TJA1042 v.2
20090708
Product data sheet
-
TJA1042 v.1
TJA1042 v.1
20090309
Product data sheet
-
-
TJA1042
Product data sheet
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23 of 26
TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
20. Legal information
20.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
20.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
20.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
TJA1042
Product data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
24 of 26
TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
20.4 Trademarks
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
21. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
TJA1042
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 24 November 2017
© NXP N.V. 2017. All rights reserved.
25 of 26
TJA1042
NXP Semiconductors
High-speed CAN transceiver with Standby mode
22. Contents
1
2
2.1
2.2
2.3
3
4
5
6
6.1
6.2
7
7.1
7.1.1
7.1.2
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.3
7.3.1
7.3.2
8
9
10
11
12
12.1
12.2
13
13.1
14
15
16
16.1
16.2
16.3
16.4
17
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Predictable and fail-safe behavior . . . . . . . . . . 2
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5
Normal mode . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Standby mode. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Fail-safe features . . . . . . . . . . . . . . . . . . . . . . . 6
TXD dominant time-out function . . . . . . . . . . . . 6
Bus dominant time-out function . . . . . . . . . . . . 6
Internal biasing of TXD and STB input pins . . . 6
Undervoltage detection on pins VCC and VIO . . 6
Overtemperature protection . . . . . . . . . . . . . . . 7
SPLIT output pin and VIO supply pin . . . . . . . . 7
SPLIT pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
VIO supply pin . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal characteristics . . . . . . . . . . . . . . . . . . 8
Static characteristics. . . . . . . . . . . . . . . . . . . . . 9
Dynamic characteristics . . . . . . . . . . . . . . . . . 11
Application information. . . . . . . . . . . . . . . . . . 14
Application diagrams . . . . . . . . . . . . . . . . . . . 14
Application hints . . . . . . . . . . . . . . . . . . . . . . . 14
Test information . . . . . . . . . . . . . . . . . . . . . . . . 15
Quality information . . . . . . . . . . . . . . . . . . . . . 15
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 16
Handling information. . . . . . . . . . . . . . . . . . . . 18
Soldering of SMD packages . . . . . . . . . . . . . . 18
Introduction to soldering . . . . . . . . . . . . . . . . . 18
Wave and reflow soldering . . . . . . . . . . . . . . . 18
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 18
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 19
Soldering of HVSON packages. . . . . . . . . . . . 20
Appendix: ISO 11898-2:2016 parameter
cross-reference list . . . . . . . . . . . . . . . . . . . . . 21
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 23
20
20.1
20.2
20.3
20.4
21
22
Legal information . . . . . . . . . . . . . . . . . . . . . .
Data sheet status . . . . . . . . . . . . . . . . . . . . . .
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . .
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . .
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . .
Contact information . . . . . . . . . . . . . . . . . . . .
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
24
24
24
25
25
26
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP N.V. 2017.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 24 November 2017
Document identifier: TJA1042
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