TJA1043
High-speed CAN transceiver
Rev. 6 — 10 November 2017
Product data sheet
1. General description
The TJA1043 high-speed CAN transceiver provides an interface between a Controller
Area Network (CAN) protocol controller and the physical two-wire CAN bus. The
transceiver is designed for high-speed CAN applications in the automotive industry,
providing differential transmit and receive capability to (a microcontroller with) a CAN
protocol controller.
The TJA1043 belongs to the third generation of high-speed CAN transceivers from NXP
Semiconductors, offering significant improvements over first- and second-generation
devices such as the TJA1041A. It offers improved ElectroMagnetic Compatibility (EMC)
and ElectroStatic Discharge (ESD) performance, very low power consumption, and
passive behavior when the supply voltage is turned off. Advanced features include:
• Low-power management controls the power supply throughout the node while
supporting local and remote wake-up with wake-up source recognition
• Several protection and diagnostic functions including bus line short-circuit detection
and battery connection detection
• Can be interfaced directly to microcontrollers with supply voltages from 3 V to 5 V
The TJA1043 implements the CAN physical layer as defined in ISO 11898-2:2016 and
SAE J2284-1 to SAE J2284-5. This implementation enables reliable communication in the
CAN FD fast phase at data rates up to 5 Mbit/s.
These features make the TJA1043 the ideal choice for high speed CAN networks
containing nodes that need to be available all times, even when the internal VIO and VCC
supplies are switched off.
2. Features and benefits
2.1 General
ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant
Loop delay symmetry timing enables reliable communication at data rates up to
5 Mbit/s in the CAN FD fast phase
Suitable for 12 V and 24 V systems
Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)
VIO input allows for direct interfacing with 3 V and 5 V microcontrollers
SPLIT voltage output for stabilizing the recessive bus level
Listen-only mode for node diagnosis and failure containment
Available in SO14 and HVSON14 packages
TJA1043
NXP Semiconductors
High-speed CAN transceiver
Leadless HVSON14 package (3.0 mm 4.5 mm) with improved Automated Optical
Inspection (AOI) capability
AEC-Q100 qualified
Dark green product (halogen free and Restriction of Hazardous Substances (RoHS)
compliant)
2.2 Low-power management
Very low current Standby and Sleep modes, with local and remote wake-up
Capability to power down the entire node while supporting local, remote and host
wake-up
Wake-up source recognition
Transceiver disengages from the bus (zero load) when VBAT absent
Functional behavior predictable under all supply conditions
2.3 Protection and diagnosis (detection and signalling)
High ESD handling capability on the bus pins
Bus pins and VBAT protected against transients in automotive environments
Transmit Data (TXD) dominant time-out function with diagnosis
TXD-to-RXD short-circuit handler with diagnosis
Thermal protection with diagnosis
Undervoltage detection and recovery on pins VCC, VIO and VBAT
Bus line short-circuit diagnosis
Bus dominant clamping diagnosis
Cold start diagnosis (first battery connection)
3. Quick reference data
Table 1.
Quick reference data
Symbol
Parameter
Min
Typ Max
Unit
VCC
supply voltage
4.5
-
5.5
V
VIO
supply voltage on pin VIO
2.8
-
5.5
V
Vuvd(VCC)
undervoltage detection voltage on
pin VCC
3
3.5
4.3
V
Vuvd(VIO)
undervoltage detection voltage on
pin VIO
VBAT or VCC > 4.5 V
0.8
1.8
2.5
V
ICC
supply current
Normal mode; bus dominant
30
48
65
mA
Normal or Listen-only mode; bus recessive
3
6
9
mA
Standby or Sleep mode
0
0.75 2
A
Normal mode; VTXD = 0 V (dominant)
-
150
500
A
Normal or Listen-only mode; VTXD = VIO
(recessive)
0
1
4
A
Standby or Sleep mode
0
1
4
A
IEC 61000-4-2 at pins CANH and CANL
8
-
+8
kV
IIO
VESD
Conditions
supply current on pin VIO
electrostatic discharge voltage
TJA1043
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 10 November 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
2 of 32
TJA1043
NXP Semiconductors
High-speed CAN transceiver
Table 1.
Quick reference data …continued
Symbol
Parameter
Min
Typ Max
Unit
VCANH
voltage on pin CANH
Conditions
58
-
+58
V
VCANL
voltage on pin CANL
58
-
+58
V
Tvj
virtual junction temperature
40
-
+150 C
4. Ordering information
Table 2.
Ordering information
Type number
Package
Name
Description
Version
TJA1043T
SO14
plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
TJA1043TK
HVSON14 plastic, thermal enhanced very thin small outline package; no leads;
14 terminals; body 3 4.5 0.85 mm
TJA1043
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 10 November 2017
SOT1086-2
© NXP Semiconductors N.V. 2017. All rights reserved.
3 of 32
TJA1043
NXP Semiconductors
High-speed CAN transceiver
5. Block diagram
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Fig 1.
DDD
Block diagram
TJA1043
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 10 November 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
4 of 32
TJA1043
NXP Semiconductors
High-speed CAN transceiver
6. Pinning information
6.1 Pinning
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Fig 2.
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DDD
Pin configuration diagram: SO14
Fig 3.
Pin configuration diagram: HVSON14
6.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
TXD
1
transmit data input
GND[1]
2
ground supply
VCC
3
transceiver supply voltage
RXD
4
receive data output; reads out data from the bus lines
VIO
5
supply voltage for I/O level adaptor
EN
6
enable control input
INH
7
inhibit output for switching external voltage regulators
ERR_N
8
error and power-on indication output (active LOW)
WAKE
9
local wake-up input
VBAT
10
battery supply voltage
SPLIT
11
common-mode stabilization output
CANL
12
LOW-level CAN bus line
CANH
13
HIGH-level CAN bus line
STB_N
14
standby control input (active LOW)
[1]
HVSON14 package die supply ground is connected to both the GND pin and the exposed center pad. The
GND pin must be soldered to board ground. For enhanced thermal and electrical performance, it is
recommended that the exposed center pad also be soldered to board ground.
7. Functional description
The TJA1043 is a stand-alone high-speed CAN transceiver with a number of operating
modes, fail-safe features and diagnostic features that offer enhanced system reliability
and advanced power management. The transceiver combines the functionality of the
TJA1043
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 10 November 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
5 of 32
TJA1043
NXP Semiconductors
High-speed CAN transceiver
TJA1041A with improved EMC and ESD capability and quiescent current performance.
Improved slope control and high DC handling capability on the bus pins provide additional
application flexibility.
7.1 Operating modes
The TJA1043 supports five operating modes. Control pins STB_N and EN are used to
select the operating mode. Switching between modes allows access to a number of
diagnostics flags via pin ERR_N. Table 4 describes how to switch between modes.
Figure 4 illustrates the mode transitions when VCC, VIO and VBAT are valid.
Table 4.
Operating mode selection
Internal flags
UVNOM[1]
Control pins
UVBAT
Wake[2]
STB_N[3]
Operating mode
Pin INH
EN
From Normal, Listen-only, Standby and Go-to-Sleep modes
set
X
X
X
X
Sleep mode
floating
cleared
set
X
HIGH
X
Standby mode
HIGH
cleared
X
set
LOW
X
Standby mode
HIGH
cleared
X
cleared
LOW
LOW
Standby mode
HIGH
cleared
X
cleared
LOW
HIGH
Go-to-Sleep mode[4]
HIGH[4]
cleared
cleared
X
HIGH
LOW
Listen-only mode
HIGH
cleared
cleared
X
HIGH
HIGH
Normal mode
HIGH
From Sleep mode
TJA1043
Product data sheet
set
X
X
X
X
Sleep mode
floating
cleared
set
X
HIGH
X
Standby mode
HIGH
cleared
X
set
LOW
X
Standby mode
HIGH
cleared
X
cleared
LOW
X
Sleep mode
floating
cleared
cleared
X
HIGH
LOW
Listen-only mode
HIGH
cleared
cleared
X
HIGH
HIGH
Normal mode
HIGH
[1]
Setting the UVNOM flag will clear the WAKE flag.
[2]
Setting the Wake flag will clear the UVNOM flag.
[3]
A LOW-to-HIGH transition on pin STB_N will clear the UVNOM flag
[4]
After the minimum hold time, in Go-to-Sleep mode, th(min), the transceiver will enter Sleep mode and pin
INH will be set floating.
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 10 November 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
6 of 32
TJA1043
NXP Semiconductors
High-speed CAN transceiver
67%B1 +
DQG
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