UM11758
UJA1169A evaluation boards
Rev. 1 — 19 April 2022
Revision history
Rev
Date
v.1
20220419
User manual
Description
Initial version
IMPORTANT NOTICE
For engineering development or evaluation purposes only
NXP provides the product under the following conditions:
This evaluation kit is for use of ENGINEERING DEVELOPMENT OR
EVALUATION PURPOSES ONLY. It is provided as a sample IC presoldered to a printed-circuit board to make it easier to access inputs,
outputs and supply terminals. This evaluation board may be used with any
development system or other source of I/O signals by connecting it to the
host MCU computer board via off-the-shelf cables. This evaluation board
is not a Reference Design and is not intended to represent a final design
recommendation for any particular application. Final device in an application
heavily depends on proper printed-circuit board layout and heat sinking
design as well as attention to supply filtering, transient suppression, and I/O
signal quality.
The product provided may not be complete in terms of required design,
marketing, and or manufacturing related protective considerations, including
product safety measures typically found in the end device incorporating the
product. Due to the open construction of the product, it is the responsibility of
the user to take all appropriate precautions for electric discharge. In order to
minimize risks associated with the customers’ applications, adequate design
and operating safeguards must be provided by the customer to minimize
inherent or procedural hazards. For any safety concerns, contact NXP sales
and technical support services.
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UJA1169A evaluation boards
1
Introduction
This document is the user guide for the UJA1169A evaluation boards. It is intended
for engineers involved in the evaluation, design, implementation and validation of the
UJA1169A product family. This guide discusses power supply requirements and the MCU
and CAN bus interfaces, and describes how to connect the boards into an ECU/CAN
network.
The UJA1169A evaluation boards are designed to facilitate the testing and evaluation of
UJA1169A product features in a variety of microcontroller IO interface environments. All
MCU interface signals can be accessed in two ways: at a header row on the top side and
also at header rows on the bottom side that can be plugged directly into many NXP MCU
evaluation boards. The UJA1169A evaluation boards are designed to be compatible
with the S32K1xx evaluation board series from NXP and to support the use of standard
software development tools and drivers.
The UJA1169A evaluation board family consists of three variant boards as detailed
in Table 1. The entire UJA1169A product family can be evaluated using these three
boards, and not just the onboard devices. For example, the UJA1169AF-EVB board
(with a UJA1169ATK/F device) can be used to evaluate the UJA1169ATK by setting
bit CPNC = 0 in the CAN control register. In the same way, the UJA1169ATK/X and
UJA1169ATK/3 devices can be evaluated using the the UJA1169AXF-EVB and
UJA1169AF3-EVB boards, respectively.
Table 1. UJA1169A evaluation boards and device overview
UJA1169AF3-EVB
UJA1169ATK/F/3
●
●
●
User manual
●
●
●
●
HVSON20
●
CAN FD passive
●
CAN partial networking
●
Non-volatile memory
UJA11692ATK/X/F
Limp pin
UJA1169AXF-EVB
●
Local WAKE pin
●
Watchdog
●
RSTN: reset pin
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
●
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 April 2022
Package
SPI: for control and diagnosis
V1: 5 V, μC only
●
VEXT: 5 V, external loads
Reset mode
UJA1169ATK/F
V2: 5 V, CAN + onboard loads
Sleep mode
UJA1169AF-EVB
V1: 3.3 V, µC only
On-board device
V1: 5 V, μC and CAN
Evaluation board
UM11758
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interface Additional features
Supplies
Normal + Standby modes
Modes
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2
Overview of boards
Top and bottom views of the UJA1169AXF-EVB board are illustrated in Figure 1. Unless
otherwise stated, the information in this section applies to all UJA1169A evaluation
boards.
Board dimensions are 58.5 mm × 81.1 mm. Only components needed to support basic
UJA1169A functionality are included. All boards contain circuitry for reverse polarityprotected battery supply, status LEDs for BAT, V1, V2/VEXT and LIMP signals, external
PNP transistor for thermal management, local wake-up and CAN bus termination. The
boards also provide several header rows (2.54 mm pitch) for connecting MCU interface
and application signals. The headers on the bottom are compatible with the Arduino
Uno pinout order, allowing the board to be connected directly to a variety of NXP MCU
evaluation boards.
Figure 1. UJA1169AXF-EVB top and bottom views
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2.1 Ground connections
All ground pins are connected to the ground plane.
Table 2. Ground connections
Ground connections
J2-02
J3-07/12
J4-13
J5-11/13
J6-02/03
J9-02
2.2 Power supply connections
2.2.1 Battery connections
An external power supply must be connected to either power jack J6 or 2-pin header J2,
as illustrated in Figure 2.
Table 3. BAT/VIN connections
UJA1169A
UJA1169Ax-EVB
BAT (pin 14)
J2-01 or J6-01: connect to 12 V battery supply; pin BAT on the device is
connected via Schottky diode D1.
J5-01 and J5-15: pin VIN on the UJA1169Ax-EVB board is connected,
by default, to the battery supply via jumper J8; remove jumper J8 to
disconnect VIN on J5 from the battery supply.
Both supply circuits are routed via polarity protection Schottky diode D1 in order to block
reverse currents. Decoupling capacitors C1 and C2 are provided to stabilize the input
voltage and remove noise on the battery connection.
Green LED D2 lights up once the 12 V power supply has been connected.
By default, the UJA1169Ax-EVB evaluation board battery supply is routed to the MCU
board via pin VIN on the Arduino connector, allowing the supply to the entire module to
be managed via the UJA1169Ax-EVB board. This feature can be disabled by removing
jumper J8, disconnecting the battery supply from pin VIN.
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VIN
J8
J5
J2
D1
12 V
BAT (p14)
Schottky
diode
C1
100 µF
C2
0.1 µF
R1
1 kΩ
UJA1169A
D2
LED
GND
(p1,4,16,19)
GND
J6
aaa-045442
Figure 2. 12 V power supply connection options
2.2.2 V1/PNP connections
The V1 supply voltage is generated by the internal 5 V or 3.3 V regulator, depending
on the UJA1169A variant, and is intended to supply the external microcontroller. It also
determines the IO reference level.
The V1 output voltage can be accessed at pin 8 on connector J3. Decoupling capacitor
C8 is provided to stabilize the output voltage and remove noise. LED D5, connected
via resistor R9, indicates the status of V1 (on when V1 active). Jumper J7 can be used
to connect V1 to J5-03 if needed as an MCU IO reference voltage. PNP pins can be
accessed at connector J9 (see Figure 7).
Table 4. V1/PNP connections
UJA1169A
UJA1169Ax-EVB
V1 (pin 5)
J3-08 provides 3.3 V (UJA1169AF3-EVB only) or 5 V for MCU
supply
J5-03: pin V1 is connected to the IOREF signal on header J5 via
jumper J7, e.g. for the MCU IO supply
VEXCTRL (pin 15)
TP4
VEXCC (pin 6)
J9-01: connected to the collector of the onboard PNP transistor
PNP
UJA1169Ax-EVB
B (pin 4)
J9-03: connected to the base of the onboard PNP transistor
C (pin 5)
J9-01: connected to the collector of the onboard PNP transistor
E (pin 1,2,3)
J9-04: connected indirectly via R4, 0 Ω to emitter of the onboard
PNP transistor
The internal V1 voltage regulator on the UJA1169A can deliver up to 250 mA without
the need for an external PNP transistor. However, if critical thermal requirements need
to be satisfied, it is possible to connect one or more external PNP transistors to share
the total V1 load current, and therefore also share the thermal dissipation. The PNP
transistor switches on when the load current exceeds the selected PNP activation
threshold, Ith(act)PNP, while the battery supply voltage is above the PNP activation
threshold, Vth(act)PNP. The main regulation loop inside the UJA1169A continues to handle
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all dynamic load changes within the package while the external PNP delivers additional
supply current to the application.
Detailed information on the functionality and operation of the UJA1169A can be found in
the data sheet and application hints (see Section 7).
2.2.2.1 UJA1169A with one PNP
By default, all UJA1169Ax-EVB boards are delivered with an onboard PNP (e.g.
PHPT61003PY from Nexperia). A simplified circuit diagram is shown in Figure 3.
Shunt resistor R13 is used to limit the current delivered by the external PNP transistor
and to protect the PNP transistor against a V1 short-circuit to GND.
Pull-up resistor R15 is used to pull up the PNP base voltage to prevent it floating (e.g. if
R10 has been removed) and therefore ensure that the PNP is turned OFF.
Filter capacitor C9 is needed to protect V1 against an overvoltage during RF-injection on
the battery line. For EMI optimization, C9 is placed close to the PNP emitter.
R4 and R10 are provided to allow the PNP to be easily disconnected.
BAT
BAT
R4
0Ω
J3
VEXCTRL (p15)
R10
0Ω
J9
C9
10 nF
R15
100 k
PNP_B
PNP_C
VEXCC (p6)
UJA1169A
V1 (p5)
GND
(p1, 4, 16, 19)
GND
PNP
R13
1.6 Ω
V1
C8
6.8 F
GND
J7
R9
1k
VDD
J5
GND
D5
LED
aaa-045443
Figure 3. Simplified schematic of UJA1169Ax-EVB with one PNP.
Figure 4. UJA1169Ax-EVB PCB configured to operate with one PNP.
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2.2.2.2 UJA1169A without an external PNP
As already discussed, the UJA1169Ax-EVB can operate using only the V1 regulator in
applications where thermal considerations are not critical. For this option, resistors R4
and R10 must be removed, as illustrated in Figure 5 and Figure 6.
BAT
BAT
R4
0Ω
J3
VEXCTRL (p15)
R10
0Ω
J9
C9
10 nF
R15
100 k
PNP_B
PNP_C
VEXCC (p6)
UJA1169A
V1 (p5)
GND
(p1, 4, 16, 19)
GND
PNP
R13
1.6 Ω
V1
C8
6.8 F
GND
J7
R9
1k
VDD
J5
GND
D5
LED
aaa-045490
Figure 5. UJA1169Ax-EVB PCB configured to operate without a PNP.
Figure 6. UJA1169Ax-EVB PCB configured to operate without a PNP.
2.2.2.3 UJA1169Ax-EVB with multiple external PNPs
If thermal dissipation is so high that it needs to be distributed over a number of
components, multiple PNPs can be connected in parallel. A single onboard PNP is
included. Additional PNPs can be connected via header J9, as illustrated in Figure 7.
An emitter resistor is needed for each PNP to balance the current between the devices
(e.g. 10 Ω). Make sure the resistor selected can handle the expected power dissipation.
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additional PNP(s)
BAT
BAT
R4
10 Ω
J3
VEXCTRL (p15)
R10
0Ω
C9
10 nF
R15
100 k
C9
10 nF
R4
10 Ω
C9
10 nF
R15
100 k
PNP
R15
100 k
PNP
PNP_B
PNP_C
UJA1169A
R13
1.6 Ω
V1
GND
(p1, 4, 16, 19)
GND
PNP
VEXCC (p6)
V1 (p5)
R4
10 Ω
J9
C8
6.8 F
GND
J7
R9
1k
VDD
J5
GND
D5
LED
aaa-045491
Figure 7. Simplified schematic of UJA1169Ax-EVB with multiple PNPs.
Figure 8. UJA1169Ax-EVB PCB configured to operate with multiple PNPs.
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2.2.3 V2/VEXT connection
UJA1169A devices contain a second on-chip 5 V regulator. On the UJA1169ATK,
UJA1169ATK/F, UJA1169ATK/3 and UJA1169ATK/F/3 variants, this regulator (V2)
supplies the internal CAN transceiver and/or additional onboard hardware. On the
UJA1169ATK/X and UJA1169ATK/X/F variants, the second regulator (VEXT) is intended
to supply off-board components such as sensors.
Both V2 and VEXT can deliver up to 100 mA. A decoupling capacitor (C10) is connected
between the pin and ground on the board. LED D6 lights up when the V2/VEXT output is
active.
The V2 (UJA1169AF-EVB and UJA1169AF3-EVB) or VEXT (UJA1169AXF-EVB) output
voltage is accessible on connector J3 (pin 10).
Table 5. VEXT connection
UJA1169A
UJA1169Ax-EVB
V2/VEXT (pin 13)
J3-10: provides 5 V supply for internal ECU/external loads
J3
V2/VEXT
V2/VEXT(p13)
R8
1 kΩ
UJA1169A
GND(p1,4,16,19)
D6
LED
C10
6.8 µF
GND
aaa-045535
Figure 9. V2/VEXT supply connections
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2.3 CAN communication circuitry
The UJA1169Ax-EVB evaluation boards contain typical CAN communication circuitry.
The CANH and CANL bus signals are output on connector J1.
Table 6. CAN bus line connections
UJA1169A
UJA1169Ax-EVB
CANH (pin 18)
J1-01: connect to HIGH-level CAN bus line
CANL (pin 17)
J1-02: connect to LOW-level CAN bus line
Equipped with termination resistors R2 and R3, the UJA1169Ax-EVB evaluation boards
are configured to be used as termination nodes in a CAN network. If the CAN network
is already terminated at both ends, it is recommended to remove R2 and R3 or replace
them with higher value resistors to ensure that the impedance on the bus meets the CAN
bus load specification, typically 60 Ω.
J1
CANH
CANH(p18)
R3
62 Ω
UJA1169A
L1
100 µH
C4
4.7 nF
R2
62 Ω
CANL(p17)
common-mode
choke
D3
PESD1CAN
split
termination
CANL
ESD protection diodes
aaa-045540
Figure 10. CAN bus interface circuitry (relevant for the entire UJA1169A-EVB family)
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2.4 Wake-up options
All UJA1169A variants support a Sleep mode for use in energy-sensitive applications.
Once in Sleep mode, the device will remain in this low-power mode until a wake-up
request is received. A wake-up event can be triggered remotely via a standard pattern or
dedicated wake-up frame on the CAN bus, or locally via the WAKE pin (details of wakeup functionality can be found in the data sheet and application hints; see Section 7).
Table 7. WAKE connections
UJA1169A
UJA1169Ax-EVB
WAKE (pin 12)
J3-11: connect to wake-up signal
All three UJA1169A evaluation boards feature local wake-up test circuitry. The WAKE pin
is pulled HIGH by default via 10 kΩ resistors R6 and R7. When switch SW1 is pressed,
the WAKE pin is pulled LOW. To test local wake-up functionality, local wake-up must first
be enabled via the UJA1169A register map (as described in the UJA1169A data sheet
[1]).
Regulator V1 on the UJA1169A is intended to supply the MCU. V1 is off in Sleep mode
and switches on automatically when a wake-up event is detected.
The WAKE pin can be accessed via header J3 on the top of the board.
J3
WAKE
WAKE(p12)
BAT
R7, 10 kΩ
R6, 10 kΩ
UJA1169A
SW1
C7
10 nF
GND
GND
(p1,4,16,19)
aaa-045551
Figure 11. Local wake-up circuitry
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2.5 LIMP output
The LIMP pin can be accessed on top-side connector J3. It is targeted at applications
that need a ‘limp home’ feature in the event of serious ECU failure. LIMP is an open-drain
low-side output. It can be biased to an application-specific voltage level, such as via a
pull-up resistor to BAT in the evaluation setup.
Red LED D4, connected in series with resistor R5, turns on when LIMP is triggered.
Table 8. VEXT connection
UJA1169A
UJA1169Ax-EVB
LIMP (pin 11)
J3-14: connect to limp home signal
BAT
J3
R5
1 kΩ
UJA1169A
LIMP(p11)
D4
LED
LIMP
aaa-045552
Figure 12. LIMP circuitry
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2.6 MCU interface
The digital interface pins are located on the top side connector J3, as well as on the
bottom side connector J4. Two of these pins, TXD and RXD, are used for CAN data
communication with the MCU. The remaining four pins are used for SPI communication
with the MCU.
A bidirectional reset signal (connected to the RSTN pin on the UJA1169A) is also
accessible on J3 and J5.
Table 9. TXD, RXD and SPI connections
UJA1169A
UJA1169Ax-EVB
TXD (pin 2)
J3-01 or J4-18
RXD (pin 7)
J3-02 or J4-20
SDO (pin 9)
J3-03 or J4-09
SDI (pin 3)
J3-04 or J4-07
SCK (pin 10)
J3-05 or J4-11
SCSN (pin 20)
J3-06 or J4-05
J4
TXD(p2)
TXD
RXD(p7)
UJA1169A
RXD
SDO(p9)
SDO
SDI(p3)
SDI
SCK(p10)
SCK
SCSN(p20)
SCSN
J3
aaa-045565
Figure 13. MCU interface
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2.7 Reset connection
The reset connection is a bidirectional signal between the RSTN pin on the SBC and the
MCU. It is used to initiate a system reset.
A 10 kΩ pull-up resistor is connected between RSTN and V1 on the evaluation boards.
A reset event is triggered by a LOW level on RSTN. Details of reset functionality can be
found in the UJA1169A data sheet [1] and application hints [2].
Table 10. RSTN connection
UJA1169A
UJA1169Ax-EVB
RSTN (pin 8)
J3-09 or J5-05: connect MCU reset signal
V1(p5)
UJA1169A
J5
R14
10 kΩ
RSTN
RSTN(p8)
J3
aaa-045566
Figure 14. Reset connection
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3
Connecting the UJA1169Ax-EVB into a CAN network
The following conditions must be met before powering up the system with a 12 V supply.
• Connect all boards in the ECU to a common GND
• Connect SPI pins to the MCU SPI master:
– SDO (J3-03, J4-09) → MISO
– SDI (J3-04, J4-07) → MOSI
– SCK (J3-05, J4-11) → SCK
– SCSN (J3-06, J4-05) → CS
• Connect TXD/RXD (J3-01/J3-02, J4-18/J4-20) pins to the MCU CAN controller TXD/
RXD pins
• Connect RSTN (J3-09/J5-05) to the MCU CAN controller reset pin
• Connect CANH and CANL (J1-01/J1-02) to the CAN bus twisted-pair cables
• Connect V1(J3-08, J5-03) to the MCU supply unit
• For the UJA1169AXF-EVB, connect VEXT (J3-10) to the peripheral loads that need a
5 V supply (optional)
Once the above steps have been completed, the ECU/EVB can be powered up using an
external battery supply. The UJA1169A starts up in Forced Normal mode (if MTP is not
configured) or Standby mode (if MTP configured), awaiting commands from the MCU via
the SPI interface.
An example showing how to connect the UJA1169AXF-EVB between an MCU and the
CAN bus is shown in Figure 15.
GND 12 V
ECU A
PNP
VEXCTRL/VEXCC
V1
CANH
CANL
VEXT
RST
TXD/RXD
MCU
ECU B
UJA1169AXF-EVB
SPI
LIMP
WAKE
GND
ECU N
ECU X
aaa-045590
Figure 15. Connecting the UJA1169AXF-EVB into an ECU/CAN bus network
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4
Schematic diagrams
LAYOUT NOTE: PLACE R10, R13 CLOSE TO J9
J9
12 V
SILK=PNP_C
SILK=GND
SILK=PNP_B
SILK=BAT
1
2
HDR_1X2
R4
TP4
R7
10 k
U1
LIMP_LED
R6
10 k
PB_WAKE
A
LED RED
SILK=BAT
6
L1
100 µH
LIMP
11
20
9
WAKE
3
12
10
2
7
1
CANL
CANH
GND1
1
4
3
4
V1_LED
A
13
16 19 21
C
LED_GRN
SILK=V1
R14
10 k
V1
D5
RSTN
RST
SCS
SCSN
SDO
SDO
SDI
SDI
SCK
SCK
TXD
TXD
RXD
RXD
V2
V2
R8
1k
V2_LED
A
C10
6.8 µF
UJA1169ATK/F
D6
C
LED_GRN
SILK=V2
2
3
C5(1)
51 pF
C6(1)
51 pF
R3
62
CAN_T
C4
4700 pF
USER INTERFACE
VIN
ARDUINO INTERFACE
TXD
RXD
SDO
SDI
SCK
SCSN
RSTN
V2
WAKE
V1
1
3
5
7
9
11
13
15
17
19
SCSN
SILK=SCSN
SDI
SILK=SDI
SDO
SILK=SDO
SCK
SILK=SCK
SILK=GND
BAT
J4
2
4
6
8
10
12
14
16
18
20
TXD
SILK=TXD
RXD
SILK=RXD
16
14
12
10
8
6
4
2
J5
15
13
11
9
7
5
3
1
SILK=VIN
SILK=GND
SILK=VIN
HDR_2X10
J8
LIMP
J7
12 V
HDR_2X8
SILK=V1
HDR 1X2
JUMPER (DEFAULT) = ON
SILK=12 V
HDR_1X2
JUMPER (DEFAULT) = ON
HDR_1X14
V1
SILK=RST
SILK=IOREF
RSTN
IOREF
1
2
R2
62
1
2
D3
PESD1CAN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
5
14
CANL
17
CANH
18
SW SPST TH
SILK = WAKE
2
2 PORT_CANL
1 PORT_CANH
J3
R9
1k
C8
6.8 µF
8
C
SW1
3 1
SILK=TXD
SILK=RXD
SILK=SDO
SILK=SDI
SILK=SCK
SILK=SCSN
SILK=GND
SILK=V1
SILK=RSTN
SILK=V2
SILK=WAKE
SILK=GND
SILK=BAT
SILK=LIMP
V1
D4
R5
10 k
C7
0.01 µF
1
15
A
BAT
4 2
HDR_1X2
SILK=CAN
R13
1.6
R10
VEXCTRL
C
D2
LED_GRN
SILK=BAT
BAT
SILK=L
100 k
BAT_LED
SH1
SH2
R1
1k
VEXCC
C2
0.1 µF
R15
EP
PMEG3020EH
TP2
J1
PHPT61003PY
Q1 5
4
C
C1
100 µF
TP1
SILK=H
3
2
PNP_E 1
GND4
D1
LAYOUT NOTE: PLACE C9 CLOSE TO Q1
VEXCTRL
A
C9
0.01 µF
GND3
3
2
PNP_C
GND
PNP_B
RHDR_1X4(1)
BAT
CON PWR 3
1
J6
1
2
3
4
GND2
J2
SILK=12 V
SILK=GND
aaa-045591
(1) Component not populated.
Figure 16. UJA1169AF-EVB schematic diagram
UM11758
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 April 2022
© NXP B.V. 2022. All rights reserved.
16 / 39
UM11758
NXP Semiconductors
UJA1169A evaluation boards
LAYOUT NOTE: PLACE R10, R13 CLOSE TO J9
J9
12 V
SILK=PNP_C
SILK=GND
SILK=PNP_B
SILK=BAT
1
2
HDR_1X2
R4
TP4
R7
10 k
15
A
R5
10 k
R6
10 k
PB_WAKE
A
LED RED
SILK=BAT
14
4
LIMP
11
20
9
WAKE
3
12
10
2
7
1
CANL
CANH
GND1
1
L1
100 µH
3
4
A
13
16 19 21
R14
10 k
V1
D5
C
LED_GRN
SILK=V1
RSTN
RST
SCS
SCSN
SDO
SDO
SDI
SDI
SCK
SCK
TXD
TXD
RXD
RXD
V2
V2
R8
1k
V2_LED
A
C10
6.8 µF
UJA1169ATK/F/3
D6
C
LED_GRN
SILK=V2
C6(1)
51 pF
C4
4700 pF
USER INTERFACE
VIN
ARDUINO INTERFACE
TXD
RXD
SDO
SDI
SCK
SCSN
RSTN
V2
WAKE
V1
1
3
5
7
9
11
13
15
17
19
SCSN
SILK=SCSN
SDI
SILK=SDI
SDO
SILK=SDO
SCK
SILK=SCK
SILK=GND
BAT
J4
2
4
6
8
10
12
14
16
18
20
TXD
SILK=TXD
RXD
SILK=RXD
16
14
12
10
8
6
4
2
J5
15
13
11
9
7
5
3
1
SILK=VIN
SILK=GND
SILK=VIN
HDR_2X10
J8
LIMP
J7
12 V
HDR_2X8
SILK=V1
HDR 1X2
JUMPER (DEFAULT) = ON
SILK=12 V
HDR_1X2
JUMPER (DEFAULT) = ON
HDR_1X14
V1
SILK=RST
SILK=IOREF
RSTN
IOREF
1
2
C5(1)
51 pF
R3
62
CAN_T
1
2
R2
62
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
V1_LED
2
D3
PESD1CAN
J3
5
CANL
17
CANH
18
SW SPST TH
SILK = WAKE
2
2 PORT_CANL
1 PORT_CANH
6
8
C
SW1
3 1
SILK=TXD
SILK=RXD
SILK=SDO
SILK=SDI
SILK=SCK
SILK=SCSN
SILK=GND
SILK=V1
SILK=RSTN
SILK=V2
SILK=WAKE
SILK=GND
SILK=BAT
SILK=LIMP
R9
1k
C8
6.8 µF
D4
LIMP_LED
4 2
1
V1
VEXCC
U1
BAT
C7
0.01 µF
HDR_1X2
SILK=CAN
R13
1.6
R10
VEXCTRL
C
D2
LED_GRN
SILK=BAT
BAT
SILK=L
100 k
BAT_LED
SH1
SH2
R1
1k
R15
EP
C2
0.1 µF
TP2
J1
PHPT61003PY
Q1 5
4
C
PMEG3020EH
C1
100 µF
TP1
SILK=H
3
2
PNP_E 1
GND4
D1
LAYOUT NOTE: PLACE C9 CLOSE TO Q1
VEXCTRL
A
C9
0.01 µF
GND3
3
2
PNP_C
GND
PNP_B
RHDR_1X4(1)
BAT
CON PWR 3
1
J6
1
2
3
4
GND2
J2
SILK=12 V
SILK=GND
aaa-045593
(1) Component not populated.
Figure 17. UJA1169AF3-EVB schematic diagram
UM11758
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 April 2022
© NXP B.V. 2022. All rights reserved.
17 / 39
UM11758
NXP Semiconductors
UJA1169A evaluation boards
LAYOUT NOTE: PLACE R10, R13 CLOSE TO J9
J9
12 V
SILK=PNP_C
SILK=GND
SILK=PNP_B
SILK=BAT
1
2
HDR_1X2
R4
R1
1k
TP4
R7
10 k
15
A
LIMP_LED
R6
10 k
PB_WAKE
A
LED RED
SILK=BAT
14
4
LIMP
11
20
9
WAKE
3
12
10
2
7
1
CANL
CANH
GND1
1
L1
100 µH
3
4
A
13
16 19 21
R14
10 k
V1
D5
C
LED_GRN
SILK=V1
RSTN
RST
SCS
SCSN
SDO
SDO
SDI
SDI
SCK
SCK
TXD
TXD
RXD
RXD
VEXT
VEXT
R8
1k
VEXT_LED
C10
6.8 µF
UJA1169ATK/X/F
A
D6
C
LED_GRN
SILK=VEXT
C6(1)
51 pF
C4
4700 pF
USER INTERFACE
VIN
ARDUINO INTERFACE
TXD
RXD
SDO
SDI
SCK
SCSN
RSTN
VEXT
WAKE
V1
1
3
5
7
9
11
13
15
17
19
SCSN
SILK=SCSN
SDI
SILK=SDI
SDO
SILK=SDO
SCK
SILK=SCK
SILK=GND
BAT
J4
2
4
6
8
10
12
14
16
18
20
TXD
SILK=TXD
RXD
SILK=RXD
16
14
12
10
8
6
4
2
J5
15
13
11
9
7
5
3
1
SILK=VIN
SILK=GND
SILK=VIN
HDR_2X10
J8
LIMP
J7
12 V
HDR_2X8
SILK=V1
HDR 1X2
JUMPER (DEFAULT) = ON
SILK=12 V
HDR_1X2
JUMPER (DEFAULT) = ON
HDR_1X14
V1
SILK=RST
SILK=IOREF
RSTN
IOREF
1
2
C5(1)
51 pF
R3
62
CAN_T
1
2
R2
62
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
V1_LED
2
D3
PESD1CAN
J3
5
CANL
17
CANH
18
SW SPST TH
SILK = WAKE
2
2 PORT_CANL
1 PORT_CANH
6
8
C
SW1
3 1
SILK=TXD
SILK=RXD
SILK=SDO
SILK=SDI
SILK=SCK
SILK=SCSN
SILK=GND
SILK=V1
SILK=RSTN
SILK=VEXT
SILK=WAKE
SILK=GND
SILK=BAT
SILK=LIMP
R9
1k
C8
6.8 µF
D4
R5
10 k
4 2
1
V1
VEXCC
U1
BAT
C7
0.01 µF
HDR_1X2
SILK=CAN
R13
1.6
R10
VEXCTRL
C
D2
LED_GRN
SILK=BAT
BAT
SILK=L
100 k
BAT_LED
SH1
SH2
R15
EP
C2
0.1 µF
TP2
J1
PHPT61003PY
Q1 5
4
C
PMEG3020EH
C1
100 µF
TP1
SILK=H
3
2
PNP_E 1
GND4
D1
LAYOUT NOTE: PLACE C9 CLOSE TO Q1
VEXCTRL
A
C9
0.01 µF
GND3
3
2
PNP_C
GND
PNP_B
RHDR_1X4(1)
BAT
CON PWR 3
1
J6
1
2
3
4
GND2
J2
SILK=12 V
SILK=GND
aaa-045594
(1) Component not populated.
Figure 18. UJA1169AXF-EVB schematic diagram
UM11758
User manual
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 April 2022
© NXP B.V. 2022. All rights reserved.
18 / 39
UM11758
NXP Semiconductors
UJA1169A evaluation boards
5
Bills of Materials
Table 11. Bill of Materials - UJA1169AF-EVB
NXP does not assume liability, endorse, or warrant components from external manufacturers referenced in circuit drawings or tables. While NXP offers component recommendations in this configuration, it is the responsibility
of the customer to validate their application.
For critical components, it is vital to use the manufacturer listed.
Item
Quantity
number
Schematic
label
Value
Description
Part number
Manufacturer name
U1
UJA1169ATK/F
IC SBC XCVR CAN 5 V AEC-Q100 HVSON20
UJA1169ATK/X
NXP SEMICONDUCTORS
Active components
1
1
Capacitors
2
1
C1
100 µF
CAP ALEL 100 µF 25 V 20 % -- SMT
UWX1E101MCL1GB
NICHICON
3
1
C2
0.1 µF
CAP CER 0.1 µF 25 V 10 % X7R AEC-Q200 0603
CGA3E2X7R1E104K080AA
TDK
4
1
C4
4700 pF
CAP CER 4700 pF 50 V 5 % C0G AEC-Q200 0603
CGA3E2C0G1H472J080AA
TDK
5
2
C5, C6
51 pF
not populated
6
1
C7, C9
0.01 µF
CAP CER 0.01 µF 50 V 10 % X7R AEC-Q200 0603
CGA3E2X7R1H103K080AA
TDK
7
1
C8, C10
6.8 µF
CAP CER 6.8 µF 16 V 10 % X7S AEC-Q200 0805
CGA4J1X7S1C685K125AC
TDK
8
1
D1
SCH/30 V
DIODE SCH PWR RECT 2A 30 V AEC-Q101 SOD123F
PMEG3020EH,115
NEXPERIA
9
1
D2, D5, D6
LED/GRN
LED BRIGHT GRN SGL 30 mA 0603
150060VS75000
WURTH ELEKTRONIK EISOS GMBH & CO. KG
10
1
D3
ESD Prot./24 V
DIODE BIDIR CAN BUS ESD PROTECTION 200 W 24 V AEC-Q
101 SOT23
PESD1CAN,215
NEXPERIA
11
1
D4
LED/RED
LED BRIGHT RED CLEAR SGL 2 V 20 mA SMT 0603
150060RS75000
WURTH ELEKTRONIK EISOS GMBH & CO. KG
1
L1
100 µH
IND CHK 100 µH 150 mA -30/+50 % AEC-Q200 1812
B82789C0104N002
EPCOS
2
R1, R8, R9
1 kΩ
RES MF 1 kΩ 1/10 W 5 % AEC-Q200 0603
CRCW06031K00JNEA
VISHAY INTERTECHNOLOGY (preferred)
ERJ-3GEYJ103V
PANASONIC (alternative)
RK73B1JTTD102J
KOA SPEER (alternative)
Diodes
Inductors
12
Resistors
13
14
2
R2, R3
62 Ω
RES MF 62 Ω 1/4W 5 % AEC-Q200 1206
CRCW120662R0JNEA
VISHAY INTERTECHNOLOGY
15
1
R4
0Ω
RES MF ZERO Ω 1/4 W 1206
ERJ-8GEY0R00V
PANASONIC (preferred)
CR1206J/000ELF
BOURNS (alternative)
CR12064W000T
VENKEL COMPANY (alternative)
WR12X000 PTL
WALSIN TECHNOLOGY CORP (alternative)
ERJ-3GEYJ103V
PANASONIC (preferred)
RK73B1JTTD103J
KOA SPEER (alternative)
ERJ-3GEY0R00V
PANASONIC (preferred)
CRCW06030000Z0EA
VISHAY INTERTECHNOLOGY (alternative)
16
17
3
1
R5, R6, R7, R14
R10
10 kΩ
0Ω
RES MF 10 kΩ 1/10 W 5 % AEC-Q200 0603
RES MF ZERO Ω 1/10 W AEC-Q200 0603
18
1
R13
1.6 Ω
RES MF 1.6 Ω 3/4 W 1 % AEC-Q200 1206
CRCW12061R60FKEAHP
VISHAY INTERTECHNOLOGY
19
1
R15
100 kΩ
RES MF 100K 1/10 W 5 % 0603
CR0603-JW-104ELF
BOURNS (preferred)
RK73B1JTTD104J
KOA SPEER (alternative)
0603104J
LIKET CORPORATION (alternative)
ERJ3GEYJ104V
PANASONIC (alternative)
RC-0603-104JT
SKYMOS
CR0603-10W-104JSNT
VENKEL COMPANY (alternative)
CR0603-10W-104JT
VENKEL COMPANY (alternative)
CRCW0603100KJNEC
VISHAY INTERTECHNOLOGY (alternative)
WR06X104JTL
WALSIN TECHNOLOGY CORP (alternative)
Switches, Connectors, Jumpers, and Test Points
20
1
J1
HDR_1X2
HDR 1X2 TH 200 MIL SP 338H SN 100L
TSW-202-07-T-S
SAMTEC
21
2
J2, J7, J8
HDR_1X2
HDR 1X2 TH 100 MIL SP 338H SN 100L
TSW-102-07-T-S
SAMTEC
22
1
J3
HDR_1x14
HDR 1X14 TH 100 MIL SP 350H AU 118L
61301411121
WURTH ELEKTRONIK EISOS GMBH & CO. KG
23
1
J4
HDR_2X10
HDR 2X10 TH 100 MIL CTR 428H AU 110L
TSW-110-14-G-D
SAMTEC
24
1
J5
HDR_2X8
HDR 2X8 TH 100 MIL CTR 433H AU 110L
TSW-108-14-G-D
SAMTEC
25
1
J6
CON 3
CON 3 PWR JACK RA TH 295H -- NI 98L
PJ-051A
CUI INC
26
1
J9
HDR_1X4
not populated
27
1
SW1
SPST_SWITCH
SW SPST PB TACT 50MA 12 V TH
430186070716
WURTH ELEKTRONIK EISOS GMBH & CO. KG
28
2
TP1, TP2
TEST_040
TEST POINT BLACK 40 MIL DRILL 180 MIL TH 109L
5001
KEYSTONE ELECTRONICS (preferred)
TP-105-01-00
COMPONENTS CORPORATION (alternative)
151-203-RC
KOBICONN (alternative)
-
-
29
13
UM11758
User manual
TP4
TPAD_059
TEST POINT PAD 59 MIL DIA SMT, NO PART TO ORDER
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 April 2022
© NXP B.V. 2022. All rights reserved.
19 / 39
UM11758
NXP Semiconductors
UJA1169A evaluation boards
Table 12. Bill of Materials - UJA1169AF3-EVB
NXP does not assume liability, endorse, or warrant components from external manufacturers referenced in circuit drawings or tables. While NXP offers component recommendations in this configuration, it is the responsibility
of the customer to validate their application.
For critical components, it is vital to use the manufacturer listed.
Item
Quantity
number
Schematic
label
Value
Description
Part number
Manufacturer name
U1
UJA1169ATK/F/3
IC SBC XCVR CAN 3.3 V AEC-Q100 HVSON20
UJA1169ATK/X
NXP SEMICONDUCTORS
Active components
1
1
Capacitors
2
1
C1
100 µF
CAP ALEL 100 µF 25 V 20 % -- SMT
UWX1E101MCL1GB
NICHICON
3
1
C2
0.1 µF
CAP CER 0.1 µF 25 V 10 % X7R AEC-Q200 0603
CGA3E2X7R1E104K080AA
TDK
4
1
C4
4700 pF
CAP CER 4700 pF 50 V 5 % C0G AEC-Q200 0603
CGA3E2C0G1H472J080AA
TDK
5
2
C5, C6
51 pF
not populated
6
1
C7, C9
0.01 µF
CAP CER 0.01 µF 50 V 10 % X7R AEC-Q200 0603
CGA3E2X7R1H103K080AA
TDK
7
1
C8, C10
6.8 µF
CAP CER 6.8 µF 16 V 10 % X7S AEC-Q200 0805
CGA4J1X7S1C685K125AC
TDK
8
1
D1
SCH/30 V
DIODE SCH PWR RECT 2A 30 V AEC-Q101 SOD123F
PMEG3020EH,115
NEXPERIA
9
1
D2, D5, D6
LED/GRN
LED BRIGHT GRN SGL 30 mA 0603
150060VS75000
WURTH ELEKTRONIK EISOS GMBH & CO. KG
10
1
D3
ESD Prot./24 V
DIODE BIDIR CAN BUS ESD PROTECTION 200 W 24 V AEC-Q
101 SOT23
PESD1CAN,215
NEXPERIA
11
1
D4
LED/RED
LED BRIGHT RED CLEAR SGL 2 V 20 mA SMT 0603
150060RS75000
WURTH ELEKTRONIK EISOS GMBH & CO. KG
1
L1
100 µH
IND CHK 100 µH 150 mA -30/+50 % AEC-Q200 1812
B82789C0104N002
EPCOS
2
R1, R8, R9
1 kΩ
RES MF 1 kΩ 1/10 W 5 % AEC-Q200 0603
CRCW06031K00JNEA
VISHAY INTERTECHNOLOGY (preferred)
ERJ-3GEYJ103V
PANASONIC (alternative)
RK73B1JTTD102J
KOA SPEER (alternative)
Diodes
Inductors
12
Resistors
13
14
2
R2, R3
62 Ω
RES MF 62 Ω 1/4W 5 % AEC-Q200 1206
CRCW120662R0JNEA
VISHAY INTERTECHNOLOGY
15
1
R4
0Ω
RES MF ZERO Ω 1/4 W 1206
ERJ-8GEY0R00V
PANASONIC (preferred)
CR1206J/000ELF
BOURNS (alternative)
CR12064W000T
VENKEL COMPANY (alternative)
WR12X000 PTL
WALSIN TECHNOLOGY CORP (alternative)
ERJ-3GEYJ103V
PANASONIC (preferred)
RK73B1JTTD103J
KOA SPEER (alternative)
ERJ-3GEY0R00V
PANASONIC (preferred)
CRCW06030000Z0EA
VISHAY INTERTECHNOLOGY (alternative)
16
17
3
1
R5, R6, R7, R14
R10
10 kΩ
0Ω
RES MF 10 kΩ 1/10 W 5 % AEC-Q200 0603
RES MF ZERO Ω 1/10 W AEC-Q200 0603
18
1
R13
1.6 Ω
RES MF 1.6 Ω 3/4 W 1 % AEC-Q200 1206
CRCW12061R60FKEAHP
VISHAY INTERTECHNOLOGY
19
1
R15
100 kΩ
RES MF 100K 1/10 W 5 % 0603
CR0603-JW-104ELF
BOURNS (preferred)
RK73B1JTTD104J
KOA SPEER (alternative)
0603104J
LIKET CORPORATION (alternative)
ERJ3GEYJ104V
PANASONIC (alternative)
RC-0603-104JT
SKYMOS
CR0603-10W-104JSNT
VENKEL COMPANY (alternative)
CR0603-10W-104JT
VENKEL COMPANY (alternative)
CRCW0603100KJNEC
VISHAY INTERTECHNOLOGY (alternative)
WR06X104JTL
WALSIN TECHNOLOGY CORP (alternative)
Switches, Connectors, Jumpers, and Test Points
20
1
J1
HDR_1X2
HDR 1X2 TH 200 MIL SP 338H SN 100L
TSW-202-07-T-S
SAMTEC
21
2
J2, J7, J8
HDR_1X2
HDR 1X2 TH 100 MIL SP 338H SN 100L
TSW-102-07-T-S
SAMTEC
22
1
J3
HDR_1x14
HDR 1X14 TH 100 MIL SP 350H AU 118L
61301411121
WURTH ELEKTRONIK EISOS GMBH & CO. KG
23
1
J4
HDR_2X10
HDR 2X10 TH 100 MIL CTR 428H AU 110L
TSW-110-14-G-D
SAMTEC
24
1
J5
HDR_2X8
HDR 2X8 TH 100 MIL CTR 433H AU 110L
TSW-108-14-G-D
SAMTEC
25
1
J6
CON 3
CON 3 PWR JACK RA TH 295H -- NI 98L
PJ-051A
CUI INC
26
1
J9
HDR_1X4
not populated
27
1
SW1
SPST_SWITCH
SW SPST PB TACT 50MA 12 V TH
430186070716
WURTH ELEKTRONIK EISOS GMBH & CO. KG
28
2
TP1, TP2
TEST_040
TEST POINT BLACK 40 MIL DRILL 180 MIL TH 109L
5001
KEYSTONE ELECTRONICS (preferred)
TP-105-01-00
COMPONENTS CORPORATION (alternative)
151-203-RC
KOBICONN (alternative)
-
-
29
13
UM11758
User manual
TP4
TPAD_059
TEST POINT PAD 59 MIL DIA SMT, NO PART TO ORDER
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 19 April 2022
© NXP B.V. 2022. All rights reserved.
20 / 39
UM11758
NXP Semiconductors
UJA1169A evaluation boards
Table 13. Bill of Materials - UJA1169AXF-EVB
NXP does not assume liability, endorse, or warrant components from external manufacturers referenced in circuit drawings or tables. While NXP offers component recommendations in this configuration, it is the responsibility
of the customer to validate their application.
For critical components, it is vital to use the manufacturer listed.
Item
Quantity
number
Schematic
label
Value
Description
Part number
Manufacturer name
U1
UJA1169ATK/X/F
IC SBC XCVR CAN 3.3 V/5 V AEC-Q100 HVSON20
UJA1169ATK/X
NXP SEMICONDUCTORS
Active components
1
1
Capacitors
2
1
C1
100 µF
CAP ALEL 100 µF 25 V 20 % -- SMT
UWX1E101MCL1GB
NICHICON
3
1
C2
0.1 µF
CAP CER 0.1 µF 25 V 10 % X7R AEC-Q200 0603
CGA3E2X7R1E104K080AA
TDK
4
1
C4
4700 pF
CAP CER 4700 pF 50 V 5 % C0G AEC-Q200 0603
CGA3E2C0G1H472J080AA
TDK
5
2
C5, C6
51 pF
not populated
6
1
C7, C9
0.01 µF
CAP CER 0.01 µF 50 V 10 % X7R AEC-Q200 0603
CGA3E2X7R1H103K080AA
TDK
7
1
C8, C10
6.8 µF
CAP CER 6.8 µF 16 V 10 % X7S AEC-Q200 0805
CGA4J1X7S1C685K125AC
TDK
8
1
D1
SCH/30 V
DIODE SCH PWR RECT 2A 30 V AEC-Q101 SOD123F
PMEG3020EH,115
NEXPERIA
9
1
D2, D5, D6
LED/GRN
LED BRIGHT GRN SGL 30 mA 0603
150060VS75000
WURTH ELEKTRONIK EISOS GMBH & CO. KG
10
1
D3
ESD Prot./24 V
DIODE BIDIR CAN BUS ESD PROTECTION 200 W 24 V AEC-Q
101 SOT23
PESD1CAN,215
NEXPERIA
11
1
D4
LED/RED
LED BRIGHT RED CLEAR SGL 2 V 20 mA SMT 0603
150060RS75000
WURTH ELEKTRONIK EISOS GMBH & CO. KG
1
L1
100 µH
IND CHK 100 µH 150 mA -30/+50 % AEC-Q200 1812
B82789C0104N002
EPCOS
2
R1, R8, R9
1 kΩ
RES MF 1 kΩ 1/10 W 5 % AEC-Q200 0603
CRCW06031K00JNEA
VISHAY INTERTECHNOLOGY (preferred)
ERJ-3GEYJ103V
PANASONIC (alternative)
RK73B1JTTD102J
KOA SPEER (alternative)
Diodes
Inductors
12
Resistors
13
14
2
R2, R3
62 Ω
RES MF 62 Ω 1/4W 5 % AEC-Q200 1206
CRCW120662R0JNEA
VISHAY INTERTECHNOLOGY
15
1
R4
0Ω
RES MF ZERO Ω 1/4 W 1206
ERJ-8GEY0R00V
PANASONIC (preferred)
CR1206J/000ELF
BOURNS (alternative)
CR12064W000T
VENKEL COMPANY (alternative)
WR12X000 PTL
WALSIN TECHNOLOGY CORP (alternative)
ERJ-3GEYJ103V
PANASONIC (preferred)
RK73B1JTTD103J
KOA SPEER (alternative)
ERJ-3GEY0R00V
PANASONIC (preferred)
CRCW06030000Z0EA
VISHAY INTERTECHNOLOGY (alternative)
16
17
3
1
R5, R6, R7, R14
R10
10 kΩ
0Ω
RES MF 10 kΩ 1/10 W 5 % AEC-Q200 0603
RES MF ZERO Ω 1/10 W AEC-Q200 0603
18
1
R13
1.6 Ω
RES MF 1.6 Ω 3/4 W 1 % AEC-Q200 1206
CRCW12061R60FKEAHP
VISHAY INTERTECHNOLOGY
19
1
R15
100 kΩ
RES MF 100K 1/10 W 5 % 0603
CR0603-JW-104ELF
BOURNS (preferred)
RK73B1JTTD104J
KOA SPEER (alternative)
0603104J
LIKET CORPORATION (alternative)
ERJ3GEYJ104V
PANASONIC (alternative)
RC-0603-104JT
SKYMOS
CR0603-10W-104JSNT
VENKEL COMPANY (alternative)
CR0603-10W-104JT
VENKEL COMPANY (alternative)
CRCW0603100KJNEC
VISHAY INTERTECHNOLOGY (alternative)
WR06X104JTL
WALSIN TECHNOLOGY CORP (alternative)
Switches, Connectors, Jumpers, and Test Points
20
1
J1
HDR_1X2
HDR 1X2 TH 200 MIL SP 338H SN 100L
TSW-202-07-T-S
SAMTEC
21
2
J2, J7, J8
HDR_1X2
HDR 1X2 TH 100 MIL SP 338H SN 100L
TSW-102-07-T-S
SAMTEC
22
1
J3
HDR_1x14
HDR 1X14 TH 100 MIL SP 350H AU 118L
61301411121
WURTH ELEKTRONIK EISOS GMBH & CO. KG
23
1
J4
HDR_2X10
HDR 2X10 TH 100 MIL CTR 428H AU 110L
TSW-110-14-G-D
SAMTEC
4
24
1
J5
HDR_2X8
HDR 2X8 TH 100 MIL CTR 433H AU 110L
TSW-108-14-G-D
SAMTEC
25
1
J6
CON 3
CON 3 PWR JACK RA TH 295H -- NI 98L
PJ-051A
CUI INC
26
1
J9
HDR_1X4
not populated
27
1
SW1
SPST_SWITCH
SW SPST PB TACT 50MA 12 V TH
430186070716
WURTH ELEKTRONIK EISOS GMBH & CO. KG
28
2
TP1, TP2
TEST_040
TEST POINT BLACK 40 MIL DRILL 180 MIL TH 109L
5001
KEYSTONE ELECTRONICS (preferred)
TP-105-01-00
COMPONENTS CORPORATION (alternative)
151-203-RC
KOBICONN (alternative)
-
-
29
13
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TP4
TPAD_059
TEST POINT PAD 59 MIL DIA SMT, NO PART TO ORDER
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6
FlexGUI: interactive register control via USB
When the UJA1169Ax-EVB is plugged onto a suitable microcontroller evaluation
board, the microcontroller board can be used as a USB/SPI interface between the
UJA1169Ax-EVB and a PC. After installing the FlexGUI application on a Windows PC
(see Section 6.3), the contents of the SBC registers can be viewed and/or changed
interactively.
FlexGUI for UJA1169Ax-EVB currently supports the following evaluation board:
• S32K144EVB, Rev. B (Figure 19)
See www.nxp.com for more information about this board.
Figure 19. Using FlexGUI with S32K144EVB as USB/SPI interface
6.1 FlexGUI software package overview
The FlexGUI SW package for the UJA1169A evaluation boards can be downloaded from
www.nxp.com. It includes:
• the flexGUI PC installer (see also Section 6.3)
• FlexGUI firmware for all supported microcontroller boards (see also Section 6.2.1)
6.2 Preparations for using the S32K144EVB as a USB interface
The FlexGUI firmware must be loaded into the S32K144EVB before connecting the
UJA1169Ax-EVB. Note that the jumper settings for firmware programming are different to
those for FlexGUI usage.
6.2.1 FlexGUI firmware installation on S32K144EVB
Firmware programming in the S32K144EVB is straightforward:
1. Confirm that the jumpers are in the correct position for firmware programming
(Figure 20)
2. Connect the board to the PC with a USB cable (Figure 21)
3. Wait until the PC has launched new drive 'EVB-S32K144' (Figure 22)
4. Copy the firmware file to that drive (Figure 22)
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Figure 20. S32K144EVB jumper settings for firmware programming
Figure 21. PC connection for firmware programming
Figure 22. Copying the firmware file to the EVB-S32K144 drive
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6.2.2 HW setup for FlexGUI operation
The watchdog in the SBC must be off while the FlexGUI is running. The watchdog is
always off in Forced Normal mode and off by default in Software Development mode (a
sample script for switching the device to Software Development mode via the FlexGUI is
included in Section 6.4.6).
A system reset is generated after programming the MTPNV memory, after which the
connection between the FlexGUI and the board will need to be re-established (see
Section 6.4.2). If the reconnection fails, try again after a power-off/wait-3-seconds/poweron sequence on the UJA1169Ax-EVB.
Once the FlexGUI firmware has been installed on the microcontroller board, the
jumpers on the boards need to be set as illustrated in Figure 23 before plugging the
UJA1169Ax-EVB into the microcontroller board. The resulting supply and data line
interconnections between the boards are shown in Figure 24. Note that only the relevant
header interconnections are shown in the schematics extract in Figure 24. See the full
board schematics for further details.
Figure 23. UJA1169Ax-EVB/S32K144EVB jumper settings for FlexGUI operation
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Figure 24. UJA119A-EVB/S32K144EVB supply and data line interconnections
A 12 V power supply must be connected to header J2 or to jack J6 on the UJA1169AEVB (see also Figure 19). It supplies the BAT pin of the SBC via a polarity protection
diode.
The 3.3 V or 5 V output from the SBC is routed to the microcontroller board via jumper
J7, where it supplies the main MCU.
The SPI signals are routed directly between the SBC and the main MCU via header J4
and its counterpart J2.
The RSTN signal on the SBC is connected to the reset input on the main MCU. When
terminals 2 and 3 of header J104 are connected with a jumper, pushbutton SW5 on the
MCU board allows the RSTN signal to be pulled LOW manually. This function could be
used, for example, when restoring the MTPNV register factory preset values.
The USB MCU is powered via the USB interface. The signals between main MCU and
USB MCU are passed through level shifters that serve as a bridge between the two
supply domains.
6.3 Installing the FlexGUI on a PC
Double-click on file NXP_UJA1169Ax_GUI-1.0.0.msi to begin the installation.
6.4 Using the FlexGUI
6.4.1 Starting the FlexGUI application
FlexGUI can be started via the Windows Start menu or the shortcut symbol on the
desktop (Figure 25).
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a. Windows Start menu
b. Desktop shortcut
Figure 25. FlexGUI start options
During start-up, the FlexGUI launch window (Figure 26) displays a list of the evaluation
boards covered by this FlexGUI installation.
Select the appropriate board and click OK. A temporary pop-up window indicates the
status while the FlexGUI configuration is being loaded (Figure 27). Once loading is
complete, the FlexGUI start-up window is displayed (Figure 28). The red text in the lower
left corner of the window indicates that the application has not yet established a logical
connection to the board. Section 6.4.2 explains how to establish a connection.
Figure 26. Launch window - EVB selection
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Figure 27. Window displayed during start-up
Figure 28. FlexGUI start-up window; boards not yet connected
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6.4.2 Establishing a connection between the FlexGUI and the hardware
To establish a connection between the FlexGUI and the hardware, a battery supply
must first be provided for the UJA1169Ax-EVB (see Figure 19) before connecting the
microcontroller board to the PC using a USB cable. Note that it may take a few seconds
for the PC operating system to detect the connection and locate the appropriate USB
driver.
Once the connection has been established, a communication session can be started over
the USB link:
• Click the Search button to detect all available serial connections.
• Identify and select the COM port of the board. It is usually the last item on the list if no
other USB cables were connected to the PC since the board was plugged in.
• Click Start to enable the connection.
The text in the lower left corner of the window should turn from red to green, to indicate
that the session has started successfully (Figure 29). The FlexGUI functionality can now
be accessed, as discussed in the following sections.
Figure 29. FlexGUI, USB connection to MCU board established
If FlexGUI shuts down during a connection attempt, there may be a conflict due to an
obsolete jssc (java simple serial connector) library in the user cache. This problem can
be solved by removing that library from the cache, e.g. with the command:
del "%USERPROFILE%\.jssc\windows\jSSC-2.8_x86_64.dll".
When this command is executed (e.g. by double-clicking on a text file that includes this
line and has a file extension .cmd), the obsolete library is removed from the cache and a
later version of the library is cached the next time FlexGUI starts up.
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6.4.3 SPI speed selection
The SPI speed (frequency) can be specified in the lower-left section of the FlexGUI
window (if that section of the window is not visible, click the slider symbol under the 'File'
menu).
6.4.4 Interactive control of the RGB LED on the microcontroller board
Select the Pins tab in the FlexGUI window to access the drop-down window shown in
Figure 30. This window contains selection boxes for the microcontroller pins that control
the red, green and blue color components of the RGB LED on the microcontroller board.
A 'Low' value selects a component; a 'High' value turns it off.
Figure 30. Interactive control of the RGB LED on the microcontroller board
6.4.5 Register map
When the FlexGUI window opens, the 'Script editor' tab is selected by default. Click on
the tab to the right to display the register map of the selected board. Device registers can
be read or written to interactively via this window.
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Figure 31. Register map tab
The registers are divided into groups. A register group can be selected in the left column.
If option Tree View is selected, a single register may be selected (Tree View is selected
via the FlexGUI pop up window accessed under File/Settings; see Figure 32).
Figure 32. Register map display settings
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The contents of the selected register, or register group, is displayed in the main window.
Register data can be edited in the top row in preparation for writing to the register. When
option Use Register Init Value is selected, the editor is initialized with the default values
at start-up and reset (Figure 33). If this option is not selected, all bits will be 0 at start-up
and reset.
Actual register contents from a prior read access is shown in the bottom row.
Figure 33. Advanced options for register map
Register data is displayed in three formats:
• As a single hexadecimal value for the entire register
• In text format, when clicking on the question mark symbol
• A color-coded button is provided for each register bit:
– red = 0
– green = 1
When the bit buttons do not fit on a single row (as in Figure 31), try de-selecting
checkbox Uniform Buttons (see Figure 32). The width of the buttons is then minimized
to fit the bit names (Figure 34).
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Figure 34. Register map with option 'Uniform Buttons' not selected.
If there are more registers in a group than can be displayed on-screen, the registers are
distributed over two or more pages and the active page can be selected at the bottom of
the main window. The user can also choose the maximum number of registers displayed
via control field Registers Per Page (see Figure 32). Figure 35 shows an example
Register map view displaying the second page of the Transceiver control register group
with 11 registers per page.
Figure 35. Register map display example with 11 registers per page selected
For each register, read and write operations can be triggered using the R and W buttons.
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Multiple registers can be selected using the check boxes to the left of the register names.
The selected registers will be included in later multi-registers operations. Four associated
buttons are provided:
• Write and read operations can be triggered with the Write and Read buttons.
• The Copy button can be used to copy data from the 'read' row(s) to the selected 'write'
row(s).
• Clicking the Reset button undoes changes made to the 'write' row(s) since the most
recently executed write action(s) on the associated register(s). If a register has not
been previously written to, the selected rows are reinitialized (with the default values as
selected via the Use Register Init Value checkbox; see Figure 33).
For each register, an 'OK' (✓) or 'pencil' (✎) symbol is displayed to the left of the W/R
buttons. The ✓ symbol indicates that the data currently in the editable text field matches
the data previously written to the register (or the default initialization values if no previous
write operation was executed). A ✎ symbol indicates that the data in the editable text
field differs from the data previously written to the register (or from the default values).
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6.4.6 Working with the script editor
Selecting tab 'Script editor' opens a tool for creating, executing, loading and saving
command sequences ('scripts') used for reading from or writing to registers. RGB LED
settings (see Section 6.4.4) can also be included in such scripts.
Figure 36. Script editor window
The commands available for the UJA1169Ax-EVB are listed in Table 14. Parameters
need to be separated with a colon . Commands can be typed directly into the
'Commands' window, or constructed step by step using the selector tools in the left
column. A script can also be loaded from a file.
Once a script is complete, it can be saved to a file and/or executed once by clicking on
the corresponding button ( and/or⏵). Help text is displayed when the mouse pointer is
hovered above these buttons.
Script execution is logged in the 'Results' window.
If the infinity option (∞) is selected when the script is executed, it runs continuously in
a loop. The⏵button changes to ✋ when a script is running. Execution continues until
halted by clicking the ✋ icon. The ∞ option should not be used when the script includes a
PAUSE command. If this happens by accident, it may be necessary to abort the FlexGUI
application with the help of Windows Task Manager.
Table 14. Syntax for script editor commands
Command
Parameter 1
Parameter 2
SET_REG
device name
register group
GET_REG
device name
register group
SET_DPIN
device name
MCU pin name
[1]
PAUSE
message text
n/a
//
comment text
n/a
[1]
Parameter 3
register name
register name
pin value
n/a
n/a
Parameter 4
value
n/a
n/a
n/a
n/a
Purpose
write to a register
read from a register
control RGB LED
wait for user
comment
The PAUSE command should not be used when the auto-repeat option (∞) has been selected.
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Example script using all available commands:
// This is an example script for UJA1169AXF-EVB
// For UJA1169AF-EVB/UJA1169AF3-EVB replace "UJA1169AXF" with applicable device name
// Do not run this script with the auto-repeat option,
//
because the script includes a PAUSE command
// write value 0x07 to Mode-control register
SET_REG:UJA1169AXF:Primary control:Mode control:0x07
// read Global event status register
GET_REG:UJA1169AXF:Event capture:Global event status
// turn on red LED
SET_DPIN:UJA1169AXF:RedLED:LOW
// give user time to identify the current LED color
PAUSE:RGB LED will change from red to green
// turn off red LED & turn on green LED
SET_DPIN:UJA1169AXF:RedLED:HIGH
SET_DPIN:UJA1169AXF:GreenLED:LOW
Example script that programs the SBC for Software Development mode:
// Script for programming UJA1169AXF SBC MTPNV registers to Software Development mode
// For UJA1169AF-EVB/UJA1169AF3-EVB replace "UJA1169AXF" with applicable device name
// Read MTPNV status register
GET_REG:UJA1169AXF:MTPNV and ID Registers:MTPNV status
// The user can now check if device is ready for programming
PAUSE:Only if MTPNV status value was an odd number, programming can be successful
// Set default reset length to maximum and no auto-start of VEXT
SET_REG:UJA1169AXF:MTPNV and ID Registers:Start-up control:0x00
// Set Software Development mode, allow Sleep mode and set max reset threshold as default
SET_REG:UJA1169AXF:MTPNV and ID Registers:SBC configuration control:0x04
// Enter the CRC code that fits to above selections
SET_REG:UJA1169AXF:MTPNV and ID Registers:MTPNV CRC control:0xFB
A tool is provided as an attachment to this document to calculate the CRC (see last two
lines in above script).
A system reset is generated after programming the MTPNV memory, after which the
connection between the FlexGUI and the board will need to be re-established (see
Section 6.4.2). If the reconnection fails, try again after a power-off/wait-3-seconds/poweron sequence on the UJA1169Ax-EVB.
6.4.7 Logging read and write operations
Each executed read or write access is logged in the upper left corner of the FlexGUI
window. The logged data can be saved to a log file at any time.
A number of Log Level filter options are available to tailor the logged data to the needs
of the user (see Figure 37). When 'FINEST' is selected, all bits of signals SDI ('out')
and SDO ('in') are displayed for each SPI transfer (see script execution example in
Figure 38).
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Figure 37. Logging options
Figure 38. FlexGUI 'FINEST' detail level selected for log window
If the log window is not displayed, click on the slider symbol under the 'File' menu.
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6.4.8 Restrictions on using SBC in Sleep mode
After executing a Sleep mode command successfully, the SBC turns off the output on
V1 supplying the microcontroller. As a result, the connection between the GUI and the
SBC will be lost after a short delay. This needs to be taken into account when testing the
Sleep mode command using the Register map tab or when executing scripts that include
a Sleep mode command.
To resume GUI operation after the SBC has entered Sleep mode, the SBC must be
woken up via an enabled wake source (CAN and/or WAKE pin). The GUI then needs to
re-connect to the board.
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7
References
[1]
UJA1169A data sheet
— Mini high-speed CAN system basis chip:
https://www.nxp.com/docs/en/data-sheet/UJA1169A.pdf
[2]
AH1902 application
hints
— Mini high speed CAN system basis chips UJA116xA, available from NXP
Semiconductors
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Contents
1
Introduction ......................................................... 2
2
Overview of boards ............................................ 3
2.1
Ground connections ...........................................4
2.2
Power supply connections .................................4
2.2.1
Battery connections ........................................... 4
2.2.2
V1/PNP connections ..........................................5
2.2.2.1
UJA1169A with one PNP ...................................6
2.2.2.2
UJA1169A without an external PNP .................. 7
2.2.2.3
UJA1169Ax-EVB with multiple external
PNPs ..................................................................7
2.2.3
V2/VEXT connection ..........................................9
2.3
CAN communication circuitry ...........................10
2.4
Wake-up options ..............................................11
2.5
LIMP output ..................................................... 12
2.6
MCU interface ..................................................13
2.7
Reset connection ............................................. 14
3
Connecting the UJA1169Ax-EVB into a
CAN network ..................................................... 15
4
Schematic diagrams ......................................... 16
5
Bills of Materials ............................................... 19
6
FlexGUI: interactive register control via
USB .....................................................................22
6.1
FlexGUI software package overview ............... 22
6.2
Preparations for using the S32K144EVB as
a USB interface ............................................... 22
6.2.1
FlexGUI firmware installation on
S32K144EVB ................................................... 22
6.2.2
HW setup for FlexGUI operation ..................... 24
6.3
Installing the FlexGUI on a PC ........................ 25
6.4
Using the FlexGUI ........................................... 25
6.4.1
Starting the FlexGUI application ...................... 25
6.4.2
Establishing a connection between the
FlexGUI and the hardware .............................. 28
6.4.3
SPI speed selection .........................................29
6.4.4
Interactive control of the RGB LED on the
microcontroller board ....................................... 29
6.4.5
Register map ................................................... 29
6.4.6
Working with the script editor .......................... 34
6.4.7
Logging read and write operations .................. 35
6.4.8
Restrictions on using SBC in Sleep mode ....... 37
7
References ......................................................... 38
© NXP B.V. 2022.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 April 2022
Document identifier: UM11758
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