XC7SET125GF,132

XC7SET125 Bus buffer/line driver; 3-state Rev. 01 — 4 September 2009 Product data sheet 1. General description XC7SET125 is a high-speed Si-gate CMOS devices. It provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH at OE causes the output to assume a high-impedance OFF-state. 2. Features n n n n n n Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays SOT353-1 and SOT753 package options ESD protection: u HBM JESD22-A114E: exceeds 2000 V u MM JESD22-A115-A: exceeds 200 V u CDM JESD22-C101C: exceeds 1000 V n Specified from −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version XC7SET125GW −40 °C to +125 °C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 XC7SET125GV −40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753 −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no SOT886 leads; 6 terminals; body 1 × 1.45 × 0.5 mm −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1 × 0.5 mm XC7SET125GM XC7SET125GF SOT891 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 4. Marking Table 2. Marking codes Type number Marking[1] XC7SET125GW gM XC7SET125GV g25 XC7SET125GM gM XC7SET125GF gM [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram A 2 Y 4 Y A 2 4 OE 1 1 EN mna118 Fig 1. OE mna120 mna119 Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning XC7SET125 XC7SET125 OE A 1 5 VCC OE 1 6 VCC A 2 5 n.c. 2 GND GND 3 4 Y Pin configuration SOT353-1 and SOT753 3 4 Y 001aak127 Fig 5. Pin configuration SOT886 XC7SET125_1 Product data sheet OE 1 6 VCC A 2 5 n.c. GND 3 4 Y 001aak128 Transparent top view Transparent top view 001aak126 Fig 4. XC7SET125 Fig 6. Pin configuration SOT891 © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 2 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 6.2 Pin description Table 3. Pin description Symbol Pin Description SOT353-1/SOT753 SOT886/SOT891 OE 1 1 output enable input A 2 2 data input GND 3 3 ground (0 V) Y 4 4 data output n.c. - 5 not connected VCC 5 6 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state Inputs Output OE A Y L L L L H H H X Z 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VCC supply voltage VI input voltage IIK input clamping current VI < −0.5 V [1] IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V [1] IO output current −0.5 V < VO < VCC + 0.5 V Min Max Unit −0.5 +7.0 V −0.5 +7.0 V −20 - mA - ±20 mA - ±25 mA ICC supply current - 75 mA IGND ground current −75 - mA Tstg storage temperature −65 +150 °C - 250 mW total power dissipation Ptot Tamb = −40 °C to +125 °C [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K. XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 3 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit 4.5 5.0 5.5 V VCC supply voltage VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature −40 +25 +125 °C ∆t/∆V input transition rise and fall rate - - 20 ns/V 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = −50 µA 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.8 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V - - 0.36 - 0.44 - 0.55 V IO = −8.0 mA VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 µA IO = 8.0 mA IOZ OFF-state VI = VCC or GND; output current VCC = 5.5 V - - 0.25 - 2.5 - 10 µA II input leakage current - - 0.1 - 1.0 - 2.0 µA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 µA ∆ICC additional per input pin; VI = 3.4 V; supply current other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 1.5 10 - 10 - 10 pF VI = 5.5 V or GND; VCC = 0 V to 5.5 V XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 4 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; For test circuit see Figure 9. Symbol Parameter propagation delay tpd 25 °C Conditions Min Typ Max Min Max Min Max - 3.4 5.5 1.0 6.5 1.0 7.0 ns - 4.8 7.5 1.0 8.5 1.0 9.5 ns - 3.9 5.1 1.0 6.0 1.0 6.5 ns - 5.1 7.5 1.0 8.5 1.0 9.5 ns - 4.5 6.8 1.0 8.0 1.0 8.5 ns - 6.1 8.8 1.0 10.0 1.0 11.0 ns - 11 - - - - - pF [1] A to Y; see Figure 7 [2] VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF enable time ten [1] OE to Y; see Figure 8 [2] VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF disable time tdis [1] OE to Y; see Figure 8 [2] VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF [3] power per buffer; dissipation CL = 50 pF; f = 1 MHz; capacitance VI = GND to VCC CPD −40 °C to +85 °C −40 °C to +125 °C Unit [1] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [2] Typical values are measured at VCC = 5.0 V. [3] CPD is used to determine the dynamic power dissipation PD (µW). PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 12. Waveforms VI VM A input GND t PHL t PLH VOH VM Y output VOL mnb153 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. Input (A) to output (Y) propagation delays XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 5 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state VI OE input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ VOH tPZH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs enabled outputs disabled mna644 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. Table 9. Enable and disable times Measurement points Type XC7SET125 Input Output VM VM VX VY 1.5 V 0.5VCC VOL + 0.3 V VOH − 0.3 V XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 6 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC G VI VO RL S1 open DUT RT CL 001aad983 Test data is given in Table 10. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 9. Table 10. Test circuit for measuring switching times Test data Type XC7SET125 Input Load S1 position VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 3V ≤ 3 ns 15 pF, 50 pF 1 kΩ open GND VCC XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 7 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.46 0.21 0.3 0.1 0.1 0.60 0.15 7° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC JEITA MO-203 SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19 Fig 10. Package outline SOT353-1 (TSSOP5) XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 8 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state Plastic surface-mounted package; 5 leads SOT753 D E B y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT753 JEITA SC-74A EUROPEAN PROJECTION ISSUE DATE 02-04-16 06-03-16 Fig 11. Package outline SOT753 (SC-74A) XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 9 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm SOT886 b 1 2 3 4× (2) L L1 e 6 5 e1 4 e1 6× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A (1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 1.5 1.4 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. OUTLINE VERSION SOT886 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 04-07-15 04-07-22 MO-252 Fig 12. Package outline SOT886 (XSON6) XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 10 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm 1 SOT891 b 3 2 4× (1) L L1 e 6 5 e1 4 e1 6× A (1) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max A1 max b D E e e1 L L1 mm 0.5 0.04 0.20 0.12 1.05 0.95 1.05 0.95 0.55 0.35 0.35 0.27 0.40 0.32 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-04-06 07-05-15 SOT891 Fig 13. Package outline SOT891 (XSON6) XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 11 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes XC7SET125_1 20090904 Product data sheet - - XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 12 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 16.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com XC7SET125_1 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 01 — 4 September 2009 13 of 14 XC7SET125 NXP Semiconductors Bus buffer/line driver; 3-state 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 4 September 2009 Document identifier: XC7SET125_1