MR27T12800J

OKI Semiconductor MR27T12800J 8M–Word × 16–Bit or 16M–Word × 8–Bit FEDR27T12800J-02-07 Issue Date: Jul. 9, 2004 P2ROM PIN CONFIGURATION (TOP VIEW) MR27T12800J-xxxTN MR27T12800J-xxxTNE BYTE# A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 FEATURES ·8,388,608-word × 16-bit/16,777,216-word × 8-bit electrically switchable configuration · Access time · MR27T12800J-xxxTN, MR27T12800J-xxxTY · 2.7 V to 3.6 V power supply 90 ns MAX · MR27T12800J-xxxTNE , MR27T12800J-xxxTYE · 2.7 V to 3.0 V power supply 120 ns MAX · 3.0 V to 3.6 V power supply 100 ns MAX · Operating current 25 mA MAX(5MHz) · Standby current 10 µA MAX · Input/Output TTL compatible · Three-state output Vss Vss D15/A–1 D7 D14 D6 D13 D5 D12 D4 VCC VCC A22 D11 D3 D10 D2 D9 D1 D8 D0 OE # Vss Vss PACKAGES · MR27T12800J-xxxTN , MR27T12800J-xxxTNE 48-pin plastic TSOP (TSOP I 48-P-1220-0.50-1K) · MR27T12800J-xxxTY, MR27T12800J-xxxTYE 48-pin plastic TSOP (TSOP I 48-P-1220-0.50-L) P2ROM ADVANCED TECHNOLOGY P2ROM stands for Production Programmed ROM. This exclusive Oki technology utilizes factory test equipment for programming the customers code into the P2ROM prior to final production testing. Advancements in this technology allows production costs to be equivalent to MASKROM and has many advantages and added benefits over the other non-volatile technologies, which include the following; · Short lead time, since the P2ROM is programmed at the final stage of the production process, a large P2ROM inventory "bank system" of un-programmed packaged products are maintained to provide an aggressive lead-time and minimize liability as a custom product. · No mask charge, since P2ROMs do not utilize a custom mask for storing customer code, no mask charges apply. · No additional programming charge, unlike Flash and OTP that require additional programming and handling costs, the P2ROM already has the code loaded at the factory with minimal effect on the production throughput. The cost is included in the unit price. · Custom Marking is available at no additional charge. · Pin Compatible with Mask ROM Vss Vss D15/A–1 D7 D14 D6 D13 D5 D12 D4 VCC VCC A22 D11 D3 D10 D2 D9 D1 D8 D0 OE # Vss Vss MR27T12800J-xxxTY MR27T12800J-xxxTYE 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 BYTE# A16 A15 A14 A13 A12 A11 A10 A9 A8 A19 A21 A20 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 CE# 48TSOP(Type-I) 1/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM BLOCK DIAGRAM A–1 × 8/× 16 Switch CE# CE OE# OE BYTE# A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 Row Decoder Memory Cell Matrix 8M × 16-Bit or 16M × 8-Bit Address Buffer Column Decoder Multiplexer Output Buffer D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D12 D14 D15 D11 D13 In 8-bit output mode, these pins are placed in a high-Z state and pin D15 functions as the A-1 address pin. PIN DESCRIPTIONS Pin name D15 / A–1 A0 to A22 D0 to D14 CE# OE# BYTE# VCC VSS Address inputs Data outputs Chip enable input Output enable input Word / Byte select input Power supply voltage Ground Functions Data output / Address input 2/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM FUNCTION TABLE Mode Read (16-Bit) Read (8-Bit) Output disable Standby CE# L L L H OE# L L H ∗ BYTE# H L H L H L 2.7 V to 3.6 V Hi–Z DOUT VCC D0 to D7 D8 to D14 DOUT Hi–Z Hi–Z L/H ∗ ∗ D15/A–1 ∗: Don’t Care (H or L) ABSOLUTE MAXIMUM RATINGS Parameter Operating temperature under bias Storage temperature Input voltage Output voltage Power supply voltage Power dissipation per package Output short circuit current Symbol Ta Tstg VI VO VCC PD IOS Ta = 25°C — relative to VSS Condition — Value 0 to 70 –55 to 125 –0.5 to VCC+0.5 –0.5 to VCC+0.5 –0.5 to 5 1.0 10 Unit °C °C V V V W mA RECOMMENDED OPERATING CONDITIONS (Ta = 0 to 70°C) Parameter VCC power supply voltage Input “H” level Input “L” level Symbol VCC VIH VIL VCC = 2.7 to 3.6 V Condition Min. 2.7 2.2 –0.5∗∗ Typ. — — — Max. 3.6 VCC+0.5∗ 0.6 Unit V V V Voltage is relative to VSS. ∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns. ∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns. PIN CAPACITANCE (VCC = 3.0 V, Ta = 25°C, f = 1 MHz) Parameter Input BYTE# Output Symbol CIN1 CIN2 COUT Condition VI = 0 V VO = 0 V Min. — — — Typ. — — — Max. 8 200 10 pF Unit 3/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS (VCC = 2.7 to 3.6 V, Ta = 0 to 70°C) Parameter Input leakage current Output leakage current VCC power supply current (Standby) VCC power supply current (Read) Input “H” level Input “L” level Output “H” level Output “L” level Symbol ILI ILO ICCSC ICCST ICCA VIH VIL VOH VOL Condition VI = 0 to VCC VO = 0 to VCC CE# = VCC CE# = VIH CE# = VIL, OE# = VIH f=5MHz — — IOH = –1 mA IOL = 2 mA 2.2 –0.5∗∗ 2.4 — — — — — Min. — — — — Typ. — — — — Max. 5 5 10 1 25 VCC+0.5∗ 0.6 — 0.4 Unit µA µA µA mA mA V V V V Voltage is relative to VSS. ∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns. ∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns. 4/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM AC CHARACTERISTICS - MR27T12800J-xxxTN, MR27T12800J-xxxTY Parameter Address cycle time Address access time CE# access time OE# access time Output disable time Output hold time Symbol tC tACC tCE tOE tCHZ tOHZ tOH Condition — CE# = OE# = VIL OE# = VIL CE# = VIL OE# = VIL CE# = VIL CE# = OE# = VIL Min. 90 — — — 0 0 0 (VCC = 2.7 to 3.6 V, Ta = 0 to 70°C) Max. — 90 90 30 20 20 — Unit ns ns ns ns ns ns ns - MR27T12800J-xxxTNE, MR27T12800J-xxxTYE Parameter Address cycle time Address access time CE# access time OE# access time Output disable time Output hold time Symbol tC tACC tCE tOE tCHZ tOHZ tOH Condition — CE# = OE# = VIL OE# = VIL CE# = VIL OE# = VIL CE# = VIL CE# = OE# = VIL Min. (VCC = 2.7 to 3.6 V, Ta = 0 to 70°C) Max. — 120(VCC = 2.7 to 3.0 V) 100(VCC = 3.0 to 3.6 V) 120(VCC = 2.7 to 3.0 V) 100(VCC = 3.0 to 3.6 V) 30 20 20 — Unit ns ns ns ns ns ns ns 120(VCC = 2.7 to 3.0 V) 100(VCC = 3.0 to 3.6 V) — — — 0 0 0 Measurement conditions Input signal level --------------------------------------0 V/3 V Input timing reference level-------------------------1/2Vcc Output load ---------------------------------------------50 pF Output timing reference level ------------------- 1/2Vcc Output load Output 50 pF (Including scope and jig) 5/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM TIMING CHART (READ CYCLE) 16-Bit READ MODE (BYTE# = VIH) tC A0 to A22 tC tOH tCE CE# tACC tCHZ tOE OE# tOH tACC D0 to D15 Hi-Z Valid Data tOHZ Valid Data Hi-Z 8-BIT READ MODE (BYTE# = VIL) tC A-1 to A22 tC tOH tCE CE# tACC tCHZ tOE OE# tOH tACC D0 to D7 Hi-Z Valid Data tOHZ Valid Data Hi-Z 6/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM PACKAGE DIMENSIONS (Unit: mm) TSOP(1)48-P-1220-0.50-1K Mirror finish 5 Notes for Mounting the Surface Mount Type Package Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5µm) 0.55 TYP. 1/Dec. 2, 1999 The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 7/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM (Unit: mm) TSOP(1)48-P-1220-0.50-L 5 Notes for Mounting the Surface Mount Type Package Package material Lead frame material Pin treatment Package weight (g) Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5µm) 0.55 TYP. 1/Feb. 27, 2003 The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 8/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM REVISION HISTORY Document No. FEDR27T12800J-02-01 FEDR27T12800J-02-02 FEDR27T12800J-02-03 FEDR27T12800J-02-04 Page Date Previous Edition – 1, 5 1 1, 5 Current Edition – 1, 5 1 1, 5 Change tC, tACC, tCE to 120ns Added P/N to MR27T12800J-xxxTNE Added MR27T12800J-xxxTY 1.Change tC, tACC, tCE Description July. 2002 Jan. 2003 Jan. 2003 Feb. 2003 FEDR27T12800J-02-05 Mar. 10, 2003 1, 5 1, 5 to 90ns(MR27T12800J-xxxTY) 2. Added MR27T12800J-xxxTYE FEDR27T12800J-02-06 FEDR27T12800J-02-07 Jun. 4, 2003 Jul. 9, 2004 3, 4, 5 3 3, 4, 5 3 Change Ta to 0°C Add PD condition and IOS = 10mA 9/10 FEDR27T12800J-02-07 OKI Semiconductor MR27T12800J / P2ROM NOTICE 1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date. 2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. Oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not, unless specifically authorized by Oki, authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. No part of the contents contained herein may be reprinted or reproduced without our prior permission. Copyright 2004 Oki Electric Industry Co., Ltd. 3. 4. 5. 6. 7. 8. 10/10