MSM65344A

E2E1018-27-Y3 ¡ Semiconductor ¡ Semiconductor MSM65344A 8-Bit Microcontroller with A/D Converter (with LCD Driver) This version: Jan. 1998 MSM65344A Previous version: Nov. 1996 GENERAL DESCRIPTION The MSM65344A is a high performance 8-bit microcontroller that employs OKI original CPU core nX-8/50. The MSM65344A includes 12K-byte program memory, 384-byte data memory, LCD driver, timer, PWM, serial I/O, and 8-bit A/D converter. Also available is the MSM65P344, which replace the on-chip program memory with one-time PROM. FEATURES • Operating range Operating voltage Operating temperature Operating frequency Current consumption (TYP.) : : : : : 2.7V to 5.5V –20°C to +70°C 0 to 10MHz (@VDD=5V± 10%) 0 to 5MHz (@VDD=2.7V to 5.5V) 5mA (@5MHz, VDD=3V) 20mA (@10MHz, VDD=5V) 1.5mA (@5MHz, VDD=3V, HALT MODE) 4mA (VDD=3V, STOP MODE) 400ns (@10MHz), 800ns (5MHz) 8-bit CPU core nX-8/50 Internal 12K-byte program memory Internal 384-byte data memory + SFR 16 ¥ 4 (selectable duty cycle from 1/4, 1/3 or 1/2 with software) 7 ports, 48 bits 3 ports ¥ 8 bits, 1 port ¥ 7 bits, 1 port ¥ 6 bits, 1 port ¥ 3 bits 1 port ¥ 6 bits, 1 port ¥ 1 bit 1 port ¥ 1 bit 8-bit auto-reload timer ¥ 2 Time base counter ¥ 1 (14 bits) 1ch, clock sync ¥ 1 2ch, 8-bit duty, cycle from 1Hz to 80kHz (@10MHz) 1 circuit, selectable from 1kHz to 16kHz 8-bit ¥ 6-ch 2 lines, selectable from rising edge/falling edge/both edges With sampling circuit for noise prevention 11 sources • Minimum instruction execution time • CPU core • General memory space • Local memory space • LCD driver • I/O port Input-output port Input port Output-port • Timer • Counter • Serial I/O • PWM • Buzzer output circuit • A/D converter • External interrupt : : : : : : : : : : : : : : : : • External interrupt for remote control : • Interrupt source : • Package: 80-pin plastic QFP (QFP80-P-1420-0.80-BK) (Product name: MSM65344A-¥¥¥GS-BK) ¥¥¥ indicates the code number. • Others : CPU clock can be an OSC or half-OSC clock. Time base counter can be selected with 1/4n of a CPU clock (n=1 to 8). 1/16 ¡ Semiconductor BLOCK DIAGRAM OSC0 OSC1 RESET HSTOP* CLKOUT* CPU CORE INST. DEC. VDD GND T/C IR ALU GMAR PC BUS CONT. BUZZER OUTPUT CIRCUIT BZ* OSC. CONT. ROM (12K bytes) RAM (384 bytes) TBC PWM AR BR PSW SP LMAR 8-bit TIMER¥2 PWM0* PWM1* T1OUT* T0CK* GATE* SFTO2* SFTI2* SFTCK2* INT0* INT1* 8-bit A/D C ¥ 6ch I/O PORT LCD DRIVER SIO (SYNC MODE) INTERRUPT CONT. SAMPLING CIRCUIT P0 P1 P3 P4 P5 P6 P7 AVDD AI0-5* AGND SEG15 COM4 SEG0 VDD1 VDD2 VDD3 C1 C2 COM1 MSM65344A INTRMC* * Secondary function of each port 2/16 ¡ Semiconductor MSM65344A PIN CONFIGURATION (TOP VIEW) 66 P6.1(OUT)  COM4 SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 AGND P3.0/AI0 P3.1/AI1 P3.2/AI2 P3.3/AI3 P3.4/AI4 P3.5/AI5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 65 P6.0(IN) 80 COM3 79 COM2 78 COM1 75 VDD3 74 VDD2 73 VDD1 72 P6.7 71 P6.6 70 P6.5 69 P6.4 68 P6.3 67 P6.2 77 C2 76 C1 64 RESET 63 GND 62 OSC0 61 OSC1 60 P0.0/INT0 59 P0.1/HSTOP 58 P0.2/T1OUT 57 P0.3/T0CK 56 P0.4/INT1 55 P0.5/CLKOUT 54 P0.6 53 P0.7/BZ 52 VDD 51 P1.2/PWM1 50 P1.3/PWM0 49 P1.4/INTRMC 48 P7.7/SFTO2 47 P7.6/SFTI2 46 P7.5/SFTCK2 45 P7.4 44 P7.3 43 P7.2 42 P7.1 41 P7.0 AVDD 25 P5.6 26 P5.5 27 P5.4 28 P5.3 29 P5.2 30 P5.1 31 P5.0 32 P4.7 33 P4.6 34 P4.5 35 P4.4 36 P4.3 37 P4.2 38 P4.1 39 P4.0 40 80-Pin Plastic QFP 3/16 ¡ Semiconductor MSM65344A PIN DESCRIPTION Basic Function Function Pin 52 63 25 Power Supply 18 73 74 75 76 77 62 Oscillation 61 OSC1 Output Symbol VDD GND AVDD AGND VDD1 VDD2 VDD3 C1 C2 OSC0 Type — — — — — — — — — Input Description Digital supply voltage (5V) Digital ground (0V) Analog supply voltage (5V) Analog ground (0V) Bias output for LCD driver Bias output for LCD driver Bias output for LCD driver Pins for connecting capacitors that generate bias for the LCD driver. Oscillation input pin on the OSC side: Connect to a quartz oscillator (ceramic resonator), or input external clock. Oscillation output pin on the OSC side: Connect to a quartz oscillator (ceramic resonator). When external clock is input to the OSC0 pin, the OSC1 pin should be kept open. System reset input: When this pin is set to the "L" level, the internal status is initialized to start execution of instructions from address 0040H. The input is pulled up to VDD with an internal pull-up resistor. Control 64 RESET Input 4/16 ¡ Semiconductor Basic Function (Continued) Function Pin Symbol Type Description MSM65344A 60 to 53 P0.0 to P0.7 I/O 8-bit input-output port (port 0): Each of bits 0 to 7 can be configured to be an input or an output by the direction register of port 0 (P0DIR). In addition to the basic function as an input-output port, a secondary function is allocated to each of P0.0 through P0.7. Refer to the next table. 3-bit input-output port (port 1): Each of bits 1.2 to 1.4 is configured to be input or output by the direction register of port 1 (P1DIR). In addition to the basic function as an input-output port, a secondary function is allocated to each of P1.2 through P1.4. Refer to "PIN DESCRIPTION (Secondary Function)". 6-bit input port (port 3): Each of P3.0 to P3.5 functions as analog input channel of A/D converter. 8-bit input-output port (port 4): 8-bit input-output port. 7-bit input-output port (port 5): Each of bits 5.0 to 5.6 can be configured to be an input or an output by the direction register of port 5 (P5DI). 1-bit input port (port 6.0): 1-bit input port. 1-bit output port (port 6.1): Pulled high when reset is done. If this pin is set to the "0" level during reset, this IC goes into a test mode, disabling execution of the user program. 6-bit input-output port (port 6): 6-bit input-output port. 8-bit input-output port (port 7): Each of bits 7.0 to 7.7 can be configured to be an input or an output by the direction register of port 7 (P7DIR). In addition to the basic function as the input-output port, a secondary function is allocated to each of P7.4 through P7.7. Refer to the next table. LCD common signal output pins 51 to 49 P1.2 to P1.4 I/O 19 to 24 40 to 33 Port 32 to 26 65 P3.0 to P3.5 P4.0 to P4.7 P5.0 to P5.6 P6.0 (IN) P6.1 (OUT) P6.2 to P6.7 I I/O I/O I 66 O 67 to 72 I/O 41 to 48 P7.0 to P7.7 I/O LCD Driver 78 to 1 2 to 17 COM1 to COM4 SEG0 to SEG15 O O LCD segment signal output pins 5/16 ¡ Semiconductor Secondary Functions Function Pin Symbol Type Description MSM65344A 60 External Interrupt 56 INT0 I Secondary function of P0.0: Input pin for external interrupt 0. This pin can receive an input at rising edge, falling edge, or both the rising/falling edges. Secondary function of P0.4: Input pin for external interrupt 1. This pin can receive input at an rising edge, falling edge, or both the rising/falling edges. Also used as a gate signal input pin to enable or disable the count of timer 0. Secondary function of P0.3: External clock input pin for timer 0. Secondary function of P0.2: Output pin that provides waveform with twice the cycle of the overflow of timer 1. Secondary function of P3.0 to 3.5: These are used for analog channels during A/D conversion. Secondary function of P1.3: Output pin of PWM channel 0. Secondary function of P1.2: Output pin of PWM channel 1. Secondary function of P0.5: Output pin that provides clocks equal to OSCCLK divided by 2 or 4. Secondary function of P0.7: Output pin for buzzer. Secondary function of P1.4: Input pin for remote control. Secondary function of P7.7: Data output pin for shift register 2. Secondary function of P7.6: Data input pin for shift register 2. Secondary function of P7.5: Sync clock input-output pin for shift register 2. This provides a clock output when used as the master, while it functions as a clock input when used as a slave. Secondary function of P0.1 INT1/GATE I Timer 0 Timer 1 70 71 19 to 24 61 T0CK T1OUT AI0 to AI5 PWM0 PWM1 I O A/D Converter I O O PWM 62 Clock Output 55 CLKOUT O Buzzer Output Remote Control Input 53 49 48 47 BZ INTRMC SFTO2 SFTI2 O I O I Shift Register 46 SFTCK2 I/O Control 59 HSTOP I 6/16 ¡ Semiconductor MSM65344A MEMORY MAPS General Memory Space 0FFFFH Local Memory Space 1FFH Unused space Data Memory Page 1 3000H 100H SFR 80H Data Memory 40H 30H 20H 10H 0 Page 0 Local Register Set 3 Local Register Set 2 Local Register Set 1 Local Register Set 0 80H 100H Program Memory Vector Call Table Program Memory 40H 20H 0 Interrupt Vector Table Vector Call Table Internal Memory 7/16 ¡ Semiconductor MSM65344A ABSOLUTE MAXIMUM RATINGS Parameter Power Supply Voltage Input Voltage Output Voltage Power Dissipation Storage Temperature Symbol VDD VI VO PD TSTG Ta = 25°C, per package Ta = 25°C, per output — Ta = 25°C Condition Rating –0.3 to +7.0 –0.3 to VDD+0.3 –0.3 to VDD+0.3 400 50 –55 to +150 mW °C V Unit RECOMMENDED OPERATING CONDITIONS Parameter Power Supply Voltage Memory Hold Voltage Oscillation Frequency *1 External Clock Operating Frequency Operating Temparature Symbol VDD VDDMH fOSC fEXTCLK Top Condition — fOSC = 0Hz — — — Range 2.7 to 5.5 2.0 to 5.5 1 to 10 0 to 10 –20 Unit V MHz MHz °C to +70 *1 Determined by the crystal or ceramic resonator to be used. 8/16 ¡ Semiconductor MSM65344A ELECTRICAL CHARACTERISTICS DC Characteristics 1 (VDD=4.5 to 5.5V) (GND = 0V, Ta = –20 to +70˚C) Parameter "H" Input Voltage 1 "H" Input Voltage 2 "L" Input Voltage "H" Output Voltage 1 "H" Output Voltage 2 "L" Output Voltage 1 "L" Output Voltage 2 Bias Output Voltage for LCD driver *3 *4 *3 *4 *1 *2 Symbol Condition CPUCLK=1MHz CPUCLK=1MHz CPUCLK=1MHz IOH = –200µA IOH = –400µA IOL = 1.6mA IOL = 3.2mA VDD = 5V C1, C2, C3 = 0.1µF VSEL = 0 (5V mode) I = +10µA VDD1 = 1.4V, I = ±10µA VDD2 = 2.8V, I = ±10µA VDD3 = 4.2V, I = –10µA VI = VDD/0V VI = 0V, VDD = 5V f = 1MHz, Ta = 25˚C Stop mode, LCD stop, No load *7 CPUCLK = 10MHz, HALT mode CPUCLK = 10MHz, no load Min. 2.4 0.75VDD — Typ. — — — — — — — 1.4 2.8 4.2 — — — — — –200 Max. — — 0.8 — — 0.4 0.4 — — — 0.4 VDD1+0.4 VDD2+0.4 — ±10 –400 Unit VIH1 VIH2 VIL VOH1 VOH2 VOL1 VOL2 VDD1 VDD2 VDD3 V0 0.75VDD 0.75VDD — — 1.2 2.6 4.0 — VDD1–0.4 VDD2–0.4 VDD3–0.4 — –40 V Segment and Common Driver Output Voltage Input Leakage Current *5 V1 V2 V3 ILI2 IIL CI IDD1 IDD4 IDD5 "L" Input Current Input Capacitance Operating Current Consumption VDD = 5V OSC = 10MHz *6 µA pF µA mA mA — — — — 5 7 8 20 — 14 16 50 *1 *2 *3 *4 *5 *6 *7 Excluding OSC0 and RESET Only for OSC0 and RESET Excluding P4 Only for P4 Excluding RESET Only for RESET Including Hardware Stop Mode 9/16 ¡ Semiconductor DC Characteristics 2 (2.7V £ VDD < 4.5V) MSM65344A (GND = 0V, Ta = –20 to +70˚C) Parameter "H" Input Voltage 1 "H" Input Voltage 2 "L" Input Voltage "H" Output Voltage 1 "H" Output Voltage 2 "L" Output Voltage 1 "L" Output Voltage 2 Bias Output Voltage for LCD driver *3 *4 *3 *4 *1 *2 Symbol Condition CPUCLK=1MHz CPUCLK=1MHz CPUCLK=1MHz IOH = –10µA IOH = –20µA IOL = 10µA IOL = 20µA VDD = 3V C1, C2, C3 = 0.1µF VSEL = 1 (3V mode) I = +10µA VDD1 = 1.4V, I = ±10µA VDD2 = 2.8V, I = ±10µA VDD3 = 4.2V, I = –10µA VI = VDD/0V VI = 0V, VDD = 3V f = 1MHz, Ta = 25˚C Stop mode, LCD stop, No load *7 CPUCLK = 5MHz, HALT mode CPUCLK = 5MHz, no load Min. 0.3VDD +0.9 0.6VDD +0.6 — *8 Typ. — — — — — — — 1.4 2.8 4.2 — — — — — –125 Max. — — 0.25VDD –0.1 *9 Unit VIH1 VIH2 VIL VOH1 VOH2 VOL1 VOL2 VDD1 VDD2 VDD3 V0 0.75VDD 0.75VDD — — 1.2 2.6 4.0 — VDD1–0.4 VDD2–0.4 VDD3–0.4 — –40 — — 0.1 0.1 — — — 0.4 VDD1+0.4 VDD2+0.4 — ±10 –250 V Segment and Common Driver Output Voltage Input Leakage Current *5 V1 V2 V3 ILI2 IIL CI IDD1 IDD4 IDD5 "L" Input Current Input Capacitance Operating Current Consumption VDD = 3V OSC = 5MHz *6 µA pF µA mA mA — — — — 5 4 1.5 5 — 8 3 10 *1 *2 *3 *4 *5 *6 *7 *8 *9 Excluding OSC0 and RESET Only for OSC0 and RESET Excluding P4 Only for P4 Excluding RESET Only for RESET Including Hardware Stop Mode More than 3.375V Less than 0.8V 10/16 ¡ Semiconductor AC Characteristics • CPU control MSM65344A (VDD = 2.7 to 5.5V, GND = 0V, Ta = –20 to +70˚C) Parameter RESET Pulse Width Symbol tRESW Condition — Min. 20 Max. — Unit ns • Peripheral control 1 (VDD = 2.7 to 5.5V, GND = 0V, Ta = –20 to +70˚C) Parameter OSC Clock Cycle Clock "L" Pulse Width External Interrupt Pulse Width External Clock Pulse Width GATE Pulse Width Symbol tC tCLW tEXIW tT0CW tT0GW — Condition VDD = 4.5 to 5.5V 2.7V £ VDD < 4.5V — Min. 100 200 0.45tC 4CPUCLK *1 4CPUCLK *1 1 tT0CLK *2 Max. — — 0.55tC — — — ns Unit EXI T0 *1 CPUCLK : Supply clock to the CPU selected by SBYCON. : Cycle time of timer 0 count clock selected by T0CON. *2 tT0CLK • Peripheral control 2 (VDD = 2.7 to 5.5V, GND = 0V, Ta = –20 to +70˚C) Parameter OSC Clock Cycle SFTCK Cycle SFTCK "L" Pulse Width Symbol tC tSFC2 tSFCLW2 CL = 100 pF Condition VDD = 4.5 to 5.5V 2.7V £ VDD < 4.5V Min. 100 200 8CPUCLK * 4CPUCLK –20 * 4CPUCLK –20 * tSFCLW2 –100 tSFCHW2 –100 100 100 Max. — — — — — — — — — ns Unit SFTCK "H" Pulse Width tSFCHW2 SFT2 SFTO Setting Time tSFOS2 SFTO Hold Time SFTI Setting Time SFTI Hold Time tSFOH2 tSFIS2 tSFIH2 * CPUCLK : Supply clock to the CPU selected by SBYCON. 11/16 ¡ Semiconductor A/D Converter Characteristics 1 MSM65344A (VDD = AVDD = 4.5 to 5.5V, GND = AGND = 0V, Ta = –20 to +70˚C) Parameter Resolution Linearity Error Differential Linearity Error Zero Scale Error Full Scale Error Crosstalk Conversion Time* Symbol n EL ED EZS EFS ECT tCONV Refer to measuring circuit. fOSC = 10MHz Refer to recommended circuit. Analog input source impedance RI £ 5kW Condition Min. — — — — — — — Typ. 8 — — — — — 16 Max. — +1.5 –1.5 ±0.5 +1.5 –1.5 ±0.5 — Unit bit LSB LSB LSB LSB LSB µs/CH * The conversion time immediately after GO bit is set to "1" is 14.8ms/CH. A/D Converter Characteristics 2 (VDD = AVDD, 2.7V £ VDD < 4.5V, GND = AGND = 0V, Ta = –20 to +70˚C) Parameter Resolution Linearity Error Differential Linearity Error Zero Scale Error Full Scale Error Crosstalk Conversion Time* Symbol n EL ED EZS EFS ECT tCONV Refer to measuring circuit. fOSC = 5MHz Refer to recommended circuit. Analog input source impedance RI £ 5kW Condition Min. — — — — — — — Typ. 8 — — — — — 32 Max. — +2 –2 ±1 +2 –2 ±1 — Unit bit LSB LSB LSB LSB LSB µs/CH * The conversion time immediately after GO bit is set to "1" is 29.6ms/CH. 12/16 ¡ Semiconductor MSM65344A Definition of Terms Resolution Recognizable minimum input analog value. This can be resolved into 28 = 256, that is AVDD ÷ 256 in 8 bits. Deviation between ideal conversion characteristics as an 8-bit A/D converter and actual conversion characteristics. (Not including quantization error.) Ideal conversion characteristics means a step which divides voltage between VRH and LRL into 256. Smoothness of conversion characteristics. 1LSB = AVDD ÷ 256 is ideal for analog input voltage width corresponding to change per 1 bit of digital output. Deviation between the ideal bit size and bit size at arbitrary point in conversion range. Deviation between ideal conversion characteristics of transfer point for digital outputs "000H" to "001H" and actual conversion characteristics. Deviation between ideal conversion characteristics of transfer point for digital outputs "0FEH" to "0FFH" and actual conversion characteristics. Linearity Error Differential Linearity Error Zero Scale Error Full Scale Error 13/16 ¡ Semiconductor MSM65344A Recommended Circuit AVDD VDD VDD MSM65344A – + AGND Analog Voltage Input 0.1 µF 0.1 µF RI AI0 - 5 + 47 µF 0V GND RI (Analog Input Source Impedance) £ 5kW Crosstalk Measuring Circuit – + 5KW AI0 AI1 Analog Voltage Input 0.1 µF to Crosstalk is defined as the difference of A/D conversion result between supplying the same voltage to AI0 to AI5 and supplying voltage shown in this left diagram. AI5 VREF or AGND 14/16 ¡ Semiconductor Timing Diagram CPU control 1) RESET Pulse width tRESW RESET MSM65344A Peripheral control 1 tC OSC0 tCLW 1) EXI Pulse width INT0 - 1 tEXIW 2) T0 T0CK tT0CW tT0GW GATE Peripheral control 2 1) SFT2 tSFCLW SFTCK tSFC tSFCHW tSFOS SFTO tSFIS SFTI tSFOH tSFIH 15/16 ¡ Semiconductor MSM65344A PACKAGE DIMENSIONS (Unit : mm) QFP80-P-1420-0.80-BK Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 1.27 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 16/16