MSM65352B

E2E1019-27-Y3 ¡ Semiconductor ¡ Semiconductor MSM65352/65352B GENERAL DESCRIPTION ThisMSM65352/65352B version: Jan. 1998 Previous version: Nov. 1996 8-Bit Microcontroller with 4-Bit A/D Converter (with LCD Driver) The MSM65352 is a high performance 8-bit microcontroller that employs OKI original CPU core, the nX-8/50. The MSM65352 includes 8K-byte program memory, 256-byte data memory, LCD driver, timer, serial I/O and 4-bit A/D converter. Also available is the MSM65352B, which has four LCD outputs in place of four output ports. Also available are the MSM65P352 and MSM65P352B, which replace the on-chip program memory with one-time PROM. FEATURES 2.7V to 5.5V –20°C to +70°C High speed side 0 to 10MHz (@VDD=5V± 10%) 0 to 5MHz (@VDD=2.7V to 5.5V) Low speed side 32.768kHz (@VDD=2.7V to 5.5V) • Current consumption (Typ.): High speed side 5mA (@5MHz, VDD=3V) 20mA (@10MHz, VDD=5V) 1.5mA (@5MHz, VDD=3V, halt mode) Low speed side : 45mA (@32.768kHz, VDD=3V) 4mA (@VDD=3V, stop mode) • Minimum instruction execution time : 400ns (@10MHz), 800ns (@5MHz) • CPU core : 8-bit CPU core nX-8/50 • General memory space : 8K-byte program memory • Local memory space : 256-byte data memory + SFR • LCD driver : 16 ¥ 4 (MSM65352), 20 ¥ 4 (MSM65352B) • I/O port : 5 ports, 31 bits (MSM65352) 4 ports, 27 bits (MSM65352B) Input-output port : 2 ports ¥ 8 bits, 1 port ¥ 1 bit Input port : 1 port ¥ 1 bit 1 port ¥ 4 bits (Only for MSM65352) Output port : 1 port ¥ 8 bits, 1 port ¥ 1 bit • Timer : 8-bit auto-reload timer ¥ 2 Watchdog timer ¥ 1 Watch timer (counter clock is fixed at XT=32.768kHz) • Counter : Time base counter ¥ 1 (14 bits) • Serial I/O : 1ch, clock sync ¥ 1 • A/D converter : 4-bit ¥ 8-ch, with reference current cutoff function • Remote control input circuit : Receives signal in 32kHz/5MHz/10MHz operations • Interrupt source : 9 sources • Package: 64-pin plastic QFP (QFP64-P-1414-0.80-BK)(Product name: MSM65352-¥¥¥GS-BK, MSM65352B-¥¥¥GS-BK) ¥¥¥ indicates the code number. 1/15 • Operating range Operating voltage Operating temperature Operating frequency: (dual clock) : : : : : : ¡ Semiconductor MSM65352/65352B • Others : CPU clock can be an OSC, half-OSC, or XT clock. Time base counter can be selected with 1/4n of a CPU clock (n=1 to 8). 2/15 ¡ Semiconductor BLOCK DIAGRAM XT XT OCS0 OSC1 RESET HSTOP* CLKOUT* OSC. CONT. CPU CORE INST. DEC. T/C ALU IR ROM (8K bytes) WATCH TIMER GMAR PC BUS CONT. RAM (256 bytes) VDD GND TBC WDT AR BR PSW SP LMAR 8-bit TIMER ¥ 2 T1OUT* T0CK* GATE* SIO (SYNC MODE) 4-bit A/D C ¥ 8ch SFTO1* SFTI1* SFTCK1* I/O PORT LCD DRIVER INTERRUPT CONT. INT0* INT1* MSM65352/65352B AVDD AI0-7* AGND SEG19** SEG15 SEG16** COM4 SEG0 VDDL VDD3 VDD2 VDD1 COM1 P0 P1 P2 *Secondary function of each port. **P4: for the MSM65352 SEG16-19: for the MSM65352B P3 P4** REMOTE CONT. RMCIN* 3/15 ¡ Semiconductor MSM65352/65352B PIN CONFIGURATION (TOP VIEW) 58 P1.5/SFTCK1 59 P1.4/RMCIN 56 P1.7/SFTO1 54 P2.1(TEST) 57 P1.6/SFTI1 P0.7 P0.6 P0.5/CLKOUT P0.4/INT1/GATE P0.3/T0CK P0.2/T1OUT P0.1/HSTOP P0.0/INT0 OSC0 1 2 3 4 5 6 7 8 9 OSC1 10 GND 11 XT 12 XT 13 RESET 14 AGND 15 P3.7/AI7 16     63 P1.0 62 P1.1 61 P1.2 60 P1.3 64 VDD P3.6/AI6 17 P3.5/AI5 18 P3.4/AI4 19 P3.3/AI3 20 P3.2/AI2 21 P3.1/AI1 22 P3.0/AI0 23 52 P4.3**** 55 P2.0(IN) 54 P4.2*** 50 P4.1** 49 P4.0* 48 SEG15 47 SEG14 46 SEG13 45 SEG12 44 SEG11 43 SEG10 42 SEG9 41 SEG8 40 SEG7 39 SEG6 38 SEG5 37 SEG4 36 SEG3 35 SEG2 34 SEG1 33 SEG0 AVDD 24 VDD3 25 VDD2 26 VDD1 27 VDDL 28 53 P2.2 COM1 29 COM2 30 COM3 31 * SEG16 for MSM65352B ** SEG17 for MSM65352B *** SEG18 for MSM65352B **** SEG19 for MSM65352B 64-Pin Plastic QFP COM4 32 4/15 ¡ Semiconductor MSM65352/65352B PIN DESCRIPTION Basic Function Function Pin 64 11 24 Power Supply 15 27 26 25 28 9 Symbol VDD GND AVDD AGND VDD1 VDD2 VDD3 VDDL OSC0 Type — — — — — — — — I Digital ground Analog supply voltage (5V) Analog ground Bias input for LCD driver Bias input for LCD driver Bias input for LCD driver Ground for LCD driver bias Oscillation input pin on the OSC side: Connect to a quartz oscillator (ceramic resonator), or input external clock. Oscillation output pin on the OSC side: Oscillation 10 OSC1 O Connect to a quartz oscillator (ceramic resonator). When external clock is input to the OSC0 pin, the OSC1 pin should be kept open. 13 12 XT XT I O Oscillation input pin on the XT side: Connect to a quartz oscillator of 32.768kHz. Oscillation output pin on the XT side: Connect to a quartz oscillator of 32.768kHz. System reset input: When this pin is set to the "L" level, the internal Control 14 RESET I status is initialized to start execution of instructions from address 0040H. The input is pulled up to VDD with an internal pull-up resistor. Description Digital supply voltage (5V) 5/15 ¡ Semiconductor Basic Function (Continued) Function Pin Symbol Type MSM65352/65352B Description 8-bit Input-output port (port 0): Each of bits 0 to 7 is configured to be an input or 8 to 1 P0.0 to P0.7 I/O an output by the direction register of port 0 (P0DIR). In addition to the basic function as the Input-output port, a secondary function is allocated to each of P0.0 through P0.7. Refer to the next table. 8-bit Input-output port (port 1): Each of bits 0 to 7 is configured to be input or I/O output by the direction register of port 1 (P1DIR). In addition to the basic function as the Input-output port, a secondary function is allocated to each of P1.0 through P1.7. Refer to the next table. 63 to 56 P1.0 to P1.7 Port 55 P2.0 (IN) P2.1 (TEST) I Input port (port 2.0) Output port (port 2.1) 54 O Pulled high at the time of reset. If this pin is set to the "0" level during reset, this IC goes into a test mode, disabling execution of the user program. 53 23 to 16 49 to 52 29 to LCD Driver 32 33 to 48 P2.2 P3.0 to P3.7 P4.0 to P4.3 COM1 to COM4 SEG0 to SEG15 I/O Input-output port (port 2.2) 8-bit input port (port 3): I Each of P3.0 to P3.7 functions as analog input channel of A/D converter. 4-bit output port: O These pins are valid only for the MSM65352. O LCD common signal output pins LCD segment signal output pins O In the case of MSM65352B, SEG0 to SEG19 and Pin 33 to Pin 52 are used. 6/15 ¡ Semiconductor Secondary Function Function Pin Symbol Type MSM65352/65352B Description Secondary function of P0.0: Input pin for external interrupt 0. This pin can receive an input at the rising edge, falling edge, or both the rising/falling edges. Secondary function of P0.4: Input pin for external interrupt 1. This pin can 8 External Interrupt 4 INT0 I INT1 I receive input at the rising edge, falling edge or both the rising/falling edges. Also used as a gate signal input pin to enable or disable the count of timer 0. Secondary function of P0.1: Hardware stop mode input pin. When this pin is set to the "L" level while the HSTP bit in SBYCON is set to "1", the hardware stop mode is entered. In the hardware stop mode, oscillation on the OSC side is stopped for low power consumption. Secondary function of P0.3: External clock input pin for timer 0. Secondary function of P0.2: Output pin that provides waveform with twice the cycle of the overflow of timer 1. Secondary function of P3.0 to 3.7: Control 7 HSTOP I Timer 0 5 T0CK I Timer 1 6 23 T1OUT AI0 to AI7 O A/D Converter to 16 I These are used for analog channels during A/D conversion. Secondary function of P0.5: Output pin that provides clocks equal to OSCCLK divided by 2 or 4, and also clocks equal to XTCLK divided by 2 or 4. Secondary function of P1.4: Input pin for remote control. Secondary function of P1.7: Data output pin for shift register 1. Secondary function of P1.6: Data input pin for shift register 1. Secondary function of P1.5: Sync clock I/O pin for shift register 1. Clock Output 3 CLKOUT O Remote Control Input 59 56 57 RMCIN SFTO1 SFTI1 I O I Shift Register 58 SFTCK1 I/O This provides clock output when used as the master, while it functions as clock input when used as a slave. 7/15 ¡ Semiconductor MSM65352/65352B ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Input Voltage Output Voltage Power Dissipation Storage Temperature Symbol VDD VI VO PD TSTG Ta = 25°C, per package Ta = 25°C, per output — Ta = 25°C Condition Rating –0.3 to 7.0 –0.3 to VDD+0.3 –0.3 to VDD+0.3 400 50 –55 to +150 mW °C V Unit RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage Memory Hold Voltage Oscillation Frequency*1 External Clock Operating Frequency*2 Operating Temparature Symbol VDD VDDMH fOSC fXT fEXTCLK Top Condition — fOSC = 0Hz — VDD = 2.7 to 5.5 — — Range 2.7 to 5.5 2.0 to 5.5 1 to 10 32.768 0 to 10 –20 to +70 Unit V MHz kHz MHz °C *1 Determined by the crystal oscillator or ceramic resonator to be used. *2 External clock cannot be used in the XT pin. 8/15 ¡ Semiconductor MSM65352/65352B ELECTRICAL CHARACTERISTICS DC Characteristics 1 (VDD=4.5 to 5.5V) Parameter "H" Input Voltage 1 "H" Input Voltage 2 "L" Input Voltage "H" Output Voltage 1 "H" Output Voltage 2 "L" Output Voltage 1 "L" Output Voltage 2 Input Leakage Current *3 *4 *3 *4 *5 *6 *1 *2 (GND = 0V, Ta = –20 to +70˚C) Min. 2.4 0.7VDD — Symbol Condition CPUCLK=1MHz CPUCLK=1MHz CPUCLK=1MHz IOH = –200mA IOH = –400mA IOL = 1.6mA IOL = 3.2mA VI = VDD/0V VI = 0V, VDD = 5V f = 1MHz, Ta = 25˚C Stop mode *7 *8 Typ. — — — — — — — — –200 Max. — — 0.8 — — 0.4 0.4 ±10 –400 Unit VIH1 VIH2 VIL VOH1 VOH2 VOL1 VOL2 ILI2 IIL CI IDD1 IDD2 IDD3 IDD4 IDD5 0.75VDD 0.75VDD — — — –40 V "L" Input Current Input Capacitance Operating Current Consumption VDD = 5V XT = 32kHz OSC = 10MHz mA pF mA mA mA mA mA — — — — — — 5 15 30 80 8 20 — 30 60 160 16 40 CPUCLK = 32kHz, HALT mode CPUCLK = 32kHz, no load. *9 CPUCLK = 10MHz, HALT mode *7 CPUCLK = 10MHz, no load. *1 *2 *3 *4 *5 *6 *7 *8 *9 Excluding OSC0 and RESET Only for OSC0 and RESET Excluding P4 Only for P4 Excluding RESET Only for RESET Measured when LCD is operated Measured when OSC clock is stopped but LCD is operated without load Measured when OSC clock is stopped 9/15 ¡ Semiconductor DC Characteristics 2 (2.7V£VDD