MSM7564-01

in im el Pr ¡ Semiconductor MSM7564-01 ¡ Semiconductor A Single Chip 14.4 kbps Data & Fax Modem MSM7564-01 y ar GENERAL DESCRIPTION The MSM 7564-01 is a highly integrated single-chip modem IC which provides the functions needed to construct 14.4 kbps full-duplex and half-duplex modems. This device is compliant with the following data communication formats : ITU-T Recommendation V.32bis, V.32, V.22bis, V.21 and Bell standard Bell 212A and Bell103 modes, and facsimile communication formats : ITU-T Recommendation V.17, V29, V.27ter, V.21 ch2. This device contains fundamental functions : high speed DSP, analog front end, and digital logic circuit. It also provides additional circuits such as test functions, synchronous-asynchronous conversion circuit, DTMF generator/detector, programmable tone generator/detector, voice output function and sleep mode. The MSM7564-01 is designed to provide a microprocessor peripheral to interface with popular single-chip microprocessors for the control of modem functions through its 8-bit multiplexed address/data bus. FEATURES • Data mode : ITU-T Recommendation V.32bis, V.32, V.22bis, V.22, V.21 Bell standard Bell 212A, Bell103 • Fax mode : ITU-T Recommendation V.17, V.29, V.27ter, V.21 ch2 • Synchronous/Asynchronous conversion • Scrambler/Descrambler • DTMF, answer tone, and guard tone generator • Programmable transmit attenuation (15 dB, 1 dB steps) • Call progress, answer tone, DTMF, and carrier detector • Receiving signal quality monitor • Independent adaptive line equalization for transmit and receive • Carrier detection level selectable (4 steps) • Echo canceler • Jitter canceler • Programmable tone generator/detector • Voice output function • Test mode : Local analog loop (internal/external) Remote digital loop 511PN pattern generator for error test 1:1 pattern generator for error test Error counter • Sleep mode • Single +5 V DC supply • CMOS technology for low power consumption Operation mode : 500 mW Typ. @ +5 V Sleep mode : < 10 mW @ +5 V • Package options: 144-pin plastic TQFP (TQFP144-P-2020-K) (Product name : MSM7564-01GS-K) 84-pin plastic QFJ (QFJ84-P-S115) (Product name : MSM7564-01JS) 1 2 Roll Off Filter AGC Equalizer Filter Carrier PLL PLL Clock Generator Demodulator MSM7564-01 SOM XYCK SYCR Eye Monitor BLOCK DIAGRAM SRD STD Serial I/F ST1 ST2 RT RBTM SBTM CPUCLK GACLK CKOEN Viterbi Decorder ADC MCK AINP AINN Parallel I/F Differential Decoder Descrambler Echo Canceler STCHG CPUTYPE CS0, 1 ALE WR RD ADA7 - 0 AOD7 - 0 Bulk Delay RAM Tone Detector (Answer) (DTMF) (Calling) (Program) TI0 - 9, BTD TO0 - 13, BRD Scrambler Differential Encoder Test I/F DAC AOUTP AOUTN VREF SG V54 & V22 Test Circuit Trellis Encoder Mapping Tone Generator (Answer) (DTMF) (Guard) (Program) + Atten Filter RST SLEEP VDD1 - 5 GND1 - 5 VDDA GNDA VDDP GNDP ¡ Semiconductor Roll Off Filter Modulator ¡ Semiconductor MSM7564-01 PIN CONFIGURATION (TOP VIEW) 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 144-Pin Plastic TQFP 3 MSM7564-01 ¡ Semiconductor Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Symbol AINN NC AINP AOUTN NC NC AOUTP VDDA GND1 NC TI2 NC STD NC VDD1 NC ST1 NC WR NC BTD NC RD NC CS1 GND2 NC RST NC CS0 NC CKOEN NC SBTM SLEEP RBTM Pin 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 Symbol NC NC TI4 TI3 NC TI5 NC TO4 NC CPUTYPE GND3 NC BRD ALE NC SOM NC VDD2 SYCR NC ST2 NC XYCK NC SRD STCHG NC TO2 NC TO0 TO3 RT NC CPUCLK GACLK NC Pin 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 Symbol TO1 ADA6 ADA4 ADA3 VDD3 NC ADA2 NC ADA0 NC AOD7 NC AOD6 NC NC AOD5 NC GND4 NC AOD4 NC AOD3 NC AOD2 NC NC AOD1 NC VDD4 AOD0 ADA5 NC NC ADA1 ADA7 TI8 Pin 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 Symbol NC TO10 TO6 NC TO13 TO12 NC TO11 TO7 NC TO9 NC TO8 NC TI6 TI7 NC VDD5 TI1 NC TI0 NC TI9 GND5 VDDP MCK NC NC TO5 GNDP GNDA NC NC NC SG NC NC : No connect pin 4 ¡ Semiconductor MSM7564-01 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Symbol GND4 AOD4 AOD3 AOD2 AOD1 VDD4 AOD0 ADA5 ADA1 ADA7 TI8 TO10 TO6 TO13 TO12 TO11 TO7 TO9 TO8 TI6 TI7 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 84-Pin Plastic QFJ Pin 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Symbol VDD5 TI1 TI0 TI9 GND5 VDDP MCK TO5 GNDP GNDA SG AINN AINP AOUTN AOUTP VDDA GND1 TI2 STD VDD1 ST1 Pin 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 Symbol WR BTD RD CS1 GND2 RST CS0 CKOEN SBTM SLEEP RBTM TI4 TI3 TI5 TO4 CPUTYPE GND3 BRD ALE SOM VDD2 Pin 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Symbol SYCR ST2 XYCK SRD STCHG TO2 TO0 TO3 RT CPUCLK GACLK TO1 ADA6 ADA4 ADA3 VDD3 ADA2 ADA0 AOD7 AOD6 AOD5 5 MSM7564-01 ¡ Semiconductor PIN DESCRIPTIONS System and Clock Symbol MCK RST SLEEP CKOEN Type I I I I Master Clock Input Frequency of 3.888 MHz ±100 ppm, with a duty ratio of between 45 and 55%. Reset Input '0' : reset state, '1' : normal operation Sleep Input '0' : sleep state, '1' : normal operation Clock Output Enable '0' : CPUCLK and GACLK pins are enabled to output. (Internal PLL operates normally in sleep state.) '1' : CPUCLK and GACLK pins are disabled to output. (Internal PLL turns to be power down in sleep state.) CPUCLK GACLK O O CPU Clock Output CPUCLK outputs a 15.552 MHz clock for external CPU. Gate Array Clock Output GACLK outputs a 13.824 MHz clock for external gate array. Description Modem Digital Interface Symbol ST1 Type I External Transmit Clock Input An external transmit clock provided to input to ST1. The clock frequency of 300 to 14400 Hz is supplied by the local DTE. ST2 O Internal Transmit Clock Output ST2 outputs the transmitting data clock of between 300 and 14400 Hz selected by modem mode. RT O Internal Receive Clock Output RT outputs the receiving data clock of between 300 and 14400 Hz selected by modem mode. STD I Transmit Data Serial Input STD inputs the transmit serial data synchronized with either internal timing selected by modem mode or ST1 / ST2. SRD O Received Data Serial Output SRD outputs the received serial data synchronized with either internal timing selected by modem mode or RT. Description 6 ¡ Semiconductor CPU Interfaces Symbol CPUTYPE Type I CPU Type Select CPUTYPE selects CPU bus type of ADA7 - 0 and AOD7 - 0. '1' : 80 mode (multiplexed address and data bus for Intel-compatible) Description MSM7564-01 '0' : 68 mode (separated address and data bus for Motorola-compatible) STCHG O Status Change Output When interface memory registers (0C, 0D, 1E, 1F) change, STCHG is set to "0". When the registers are read by external CPU, this pin is set to '1'. CS0, 1 ALE I I Chip Select Input 0 and 1 When CS0 and CS1 are set to '1', this chip is selected for microprocessor operation. Address Latch Enable Input ALE allows the microprocessor to latch the address bus (ADA7 - 0) when CPUTYPE is 80 mode. Address bus is latched at the falling edge of ALE. RD I Read Enable RD is active LOW and is used to read from internal memory register via 8-bit address data input/output pins selected by CPUTYPE pin. CS0 and CS1 must be high. WR I Write Enable WR is active Low and is used to write the data at the rising edge via data input/output pins selected by CPUTYPE pin into internal memory registers. CS0 and CS1 must be high. ADA7 - 0 I/O 8 bit Address and Data Bus 1 8 lines provide 2 modes of bus type which are selected by CPUTYPE pin. AD7 to 0 are controlled by ALE, RD and WR. 80 mode : (I/O) address input and data input/output 68 mode : (I) address input AOD7 - 0 I/O 8 bit Address and Data Bus 2 8 lines provide 2 modes of bus type which are selected by CPUTYPE pin. AD7 to 0 are controlled by ALE, RD and WR. 80 mode : (O) address output (outputs latched address by ALE) 68 mode : (I/O) address input/output 7 MSM7564-01 ¡ Semiconductor Other Interfaces Symbol RBTM Type O Description Receive Baud Rate Timing Clock Output RBTM outputs receive baud rate timing clock of between 600 and 2400 Hz selected by modem mode. SBTM O Transmit Baud Rate Timing Clock Output RBTM outputs transmit baud rate timing clock of between 600 and 2400 Hz selected by modem mode. SOM O Serial Eye Pattern X/Y Output SOM outputs serial pattern containing two 16 bit words (X, Y references), synchronized with the falling edge of XYCK. XYCK SYCR O O Serial Eye Pattern Clock Output XYCK outputs a 1152 Hz clock for SOM timing. Serial Eye Pattern Timing Output SYCR outputs synchronous timing for SOM output. SYCR outputs two clocks of SOM clocks. 8 ¡ Semiconductor Test Interface Symbol TI0 TI1 TI2 - 4 TI5, 6 TI7 TI8 TI9 BTD TO0 TO1 TO2 TO3 TO4 TO5 TO6 - 13 BRD Type I I I I I I I I I/O I/O I/O I/O I/O O I/O O TEST PIN. Connect to ground. TEST PIN. Connect to ground. TEST PIN. Connect to ground. TEST PIN. Connect to ground. TEST PIN. Connect to ground. TEST PIN. Connect to ground. TEST PIN. Connect to VDD. TEST PIN. Connect to VDD. TEST PIN. Leave "OPEN". TEST PIN. Leave "OPEN". TEST PIN. Leave "OPEN". TEST PIN. Connect to ground. TEST PIN. Leave "OPEN". TEST PIN. Leave "OPEN". TEST PIN. Leave "OPEN". TEST PIN. Leave "OPEN". Description MSM7564-01 Analog Interface Symbol AINP AINN AOUTP AOUTN SG Type I I O O O Analog Input (positive) Analog Input (negative) Analog Output (positive) AOUTP is in high impedance state when CKOEN is '1' state and in sleep mode. Analog Output (negative) AOUTN is in high impedance state when CKOEN is in '1' state and in sleep mode. Signal Ground for Analog The SG level is about +2.4 V. Connect bypass capacitor between SG and GNDA when CKOEN is in '1' state and in sleep mode. Description Power Supply Symbol VDD1 - 5 GND1 - 5 VDDP GNDP VDDA GNDA Type I I I I I I Digital VDD. Digital Ground. PLL VDD. PLL Ground. Analog VDD. Analog Ground. Description 9 MSM7564-01 ¡ Semiconductor FUNCTIONAL DESCRIPTION Modem Mode MSM7564 conforms to ITU-T Recommendation and Bell standard as follows. Modem Mode V.17 V.17 V.17 V.17 V.32bis V.32bis V.32bis V.32bis V.32 V.32 V.29 V.29 V.29 V.27ter V.27ter V.22bis V.22 Bell212A V.21 V.21ch2 Bell103 Data Rate (bps) 14400 12000 9600 7200 14400 12000 9600 7200 9600 4800 9600 7200 4800 4800 2400 2400 1200 1200 300 300 300 TCM TCM TCM TCM TCM TCM TCM TCM QAM QAM QAM QAM PSK PSK PSK QAM PSK PSK FSK FSK FSK Modulation Carrier Frequency Baud Rate Synchronous/ Note (Hz) 1800 1800 1800 1800 1800 1800 1800 1800 1800 1800 1700 1700 1700 1800 1800 1200/2400 1200/2400 1200/2400 1080/1750 1080/1750 1170/2125 2400 2400 2400 2400 2400 2400 2400 2400 2400 2400 2400 2400 2400 1600 1200 600 600 600 300 300 300 Asynchronous sync sync sync sync sync/async sync/async sync/async sync/async sync/async sync/async sync sync sync sync sync sync/async sync/async sync/async async sync async Backward Channel ON/OFF Backward Channel ON/OFF 10 ¡ Semiconductor Serial Interface MSM7564-01 MSM7564 provides a one channel serial interface, including synchronous-asynchronous and asynchronous-synchronous converters. Select synchronous or asynchronous. In synchronous mode, the transmit data is synchronized with the clock provided from this chip or DTE. Serial transmit data to STD pin is latched with the rising edge of ST1 or ST2, and receive data on SRD is output synchronously with the falling edge of RT. This chip also includes a scrambler and descrambler. Parallel Interface MSM7564 contains twenty 8-bit registers (location from addresses 00H through 0FH and 1C through 1F), which are used to control this chip and to detect various signals. Connect this chip to either multiplexed address and data bus such as Intel-compatible (80 mode) or separate address and data bus such as Motorola-compatible (68 mode). Transmit and Receive Level Analog input and output are differential amplifiers, and are ± 1.2 VO-P peak signals. The level of the transmit line signal is –10 dBm. The modem can provide 15 dB programmable transmit attenuation with 1 dB steps controlled by the TXLEV bit in located 0BH register. Receive signal level is from –10 dBm to –43 dBm. Carrier detection level can be selected from 4 levels (–43, –33, –26, –16 dBm) by the CDLEV bit located in register 0BH. An amplitude equalizer in transmitter and receiver can be individually controlled by RAEQL and SAEQL bits in register 07H. DTMF Tone, Answer Tone, and Guard Tone Generators The modem can generate 16 types of DTMF tones using the PBANSEL bit located in register 05H. It also generates answer tone and guard tone. Various Detection Circuits The internal detection circuit monitors carrier, call progress tone, answer tone, DTMF tone, and other receive signals needed for each modem mode, and stores them in the corresponding bits of each of the following registers : 0C, 0D, 1C, and 1D. Classification of detected tones is controlled by DETMODE bit in register 08H. If the contents of registers 0C, 0D, 1C, and 1D change, the interruption signal (STCHG) for controlling microprocessor is generated. Programmable Tone Generator and Detector The transmission of programmable tone 1 and tone 2 is available and is controlled by PTONE1 and PTONE2 bits in 05H register. To use this function, the initial download of frequency and gain is needed. This modem can output 16 kinds of frequency selected by PBANSEL bit of register 05H (composition of two tones is also available.). PTONE1 and PTONE2 are the same frequency and only the gain is variable. Each bit of D7, D6, D3, D2, D1, and D0 in register 0C can be used for programmable tone detecting by rewriting a coefficient of internal filter at the initial download. 11 MSM7564-01 ¡ Semiconductor Received Signal Quality Monitor The modem indicates a state of received signal quality using the SQD bit of register 0D. If this bit changes, an interrupt signal (STCHG) for controlling the microprocessor is generated. Furthermore, it can read the bit error rate and receive level (stored in internal RAM) required for MNP class 10. Echo Canceler The modem has internal RAM for bulk delay and can cope with delays of up to 1.2 s for far-end echo. Voice Output Function The voice output is enabled by setting MODEMSET bit of register 06 to voice mode. In this case, voice data of 7.2 kHz sampling of 8 bits must be written in 00, 01, and 02 registers with the rising edge of RBTM (2.4 kHz). Test Mode The modem performs the internal local analog loop testing by the LALTST bit of register 07H. It also performs external local analog loop testing by the LALTST bit of register 07H and by connecting transmit analog output and receive analog input. Remote digital loop is available by the LOOP2 bit of register 1EH. It can output a 511PN pattern and 1 to 1 pattern for error test controlling PN511 and ERR11 bits of register 1EH. Error counts can be read controlling ERRCNT bit of register 1DH. Sleep Mode The modem supports a sleep function by controlling SLEEP bit of register 04H and SLEEP pin. It provides two modes of sleep1 (clock generator is inactive at CKOEN = '1') and sleep2 (clock generator is active at CKOEN = '0') controlled by CKOEN pin. Cancellation of sleep mode is controlled by SOFTRST bit of register 04H and RST pin. 12 ¡ Semiconductor MSM7564-01 Control register The modem contains twenty 8-bit registers for control and signal detection monitoring. These registers are assigned by the address (ADA7-0 or AOD7-0) as shown in the following table. • Table of control register REG (H) 1F W 1E W 1D R 1C R 0F W 0E R VOICE 0D R 0C R V32 V22ORG V22ANS V21ORG V21ANS Bell103ORG Bell103ANS V17, V21ch2 V29 V27 VOICE 0B W 0A W 09 W V32 V22 VOICE 08 W 07 W VOICE 06 W 05 W 04 W write "0" PBANSEL NEGO STUP AUTO DON'T CARE D7 SB1DEN TXCLK DON'T CARE D6 RDZ BRKDET D5 SDZ ERR11 D4 SDA PN511 ERRCNT D3 WSIZE SB11 USB124D D2 PN1 SB11DET USB112D D1 EXTEND PN0 PN1DET SB124D D0 ASYN LOOP2 PN0DET SB112D DON'T CARE DON'T CARE DON'T CARE DON'T CARE write "0" DON'T CARE PBTONE NO DSPRST 1300 1100 1100 1300 1300 1300 1300 1300 1300 1300 1300 AGCH DSPST RATES write "0" write "0" TRN write "0" VSMODE AQID GTS TIMC GTE VEN MODEMSET SFIL EQLST PBANS SLEEP PTONE2 SOFTRST PTONE1 RAMRDWR TANI RAEQL RAEQL write "0" ECTRN SB124 TXLEV STRN SS SB112 BRTS XCHG USB124 JHOLD SAEQL SAEQL EPT AACC USB112 EHOLD ORGANS ORGANS CPGDET ANSDET PBDET TRN FCD 2250USB1 2250USB1 1270USB1 2250USB1 2250USB1 2250USB1 2250USB1 1750 1750 1750 2250USB1 SQD 3000 AC 2700 S1 1500 S1 3000 AC 3000 AC 3000 AC 3000 AC 3000 AC 2900 2600 3000 AC EED 1800 AA 2400 S1 1200 S1 1800 AA 1800 AA 1800 AA 1800 AA 1800 AA 1700 1800 1800 AA CDLEV RTS ACCA S1 TAPH V32DATA write "0" RATED 600 AC 2100 S1 900 S1 600 AC 600 AC 600 AC 600 AC 600 AC 500 1000 600 AC 1650 2225 980 1650 980 2225 1270 1650 1650 1650 1100 AGCRST ILDCNT EB1 write "0" write "0" DETMODE LALTST write "0" DCD CTS write "0" 13 MSM7564-01 ¡ Semiconductor • Table of control register (Continued) REG (H) 03 R/W VOICE 02 R/W VOICE 01 R/W VOICE 00 R/W VOICE write "0" D7 D6 D5 D4 VSEN D3 write "0" D2 write "0" D1 VIOF D0 write "0" DRAMDH (F-8) DRAMDL (7-0) VDATA3RD DRAMAH (F-8) VDATA2ND DRAMAL(7-0) VDATA1ST Notes: 1. W:Write Only, R: Read Only, R/W: Read/Write. 2. Deal with the following modes due to MODEMSET bit of 06H register and ORGANS bit of 07H register. V32: V.32bis & V.32, V22: V.22bis & V.22, V21: V.21, V17: V.17, V21ch2: V.21ch2, V29: V.29, V23: V.23, V27: V.27ter, VOICE: Voice mode, ORG: Originate, ANS: Answer 14 ¡ Semiconductor Control register functional summary REG (H) 00 R/W 01 R/W 02 R/W 03 R/W 00 R/W (VOICE) 01R/W (VOICE) 02 R/W (VOICE) 03 R/W (VOICE) 04 W 1 4 0 1 2 3 4 5 6 05 W 0 1 2 3 7-4 06 W 07 W 7-0 0 1 2 3 4 5 7-6 07 W (VOICE) 1 2 3 4 VIOF VSEN RAMRDWR SOFTRST SLEEP EQLST AUTO STUP NEGO PTONE1 PTONE2 PBANS SFIL PBANSEL MODEMSET V32DATA ORGANS SAEQL RAEQL GTE GTS LALTST ORGANS SAEQL RAEQL VEN Input/output flag of voice data output Enables voice data output. 7-0 VDATA3RD Voice output 3rd data 7-0 VDATA2ND Voice output 2nd data BIT 7-0 7-0 7-0 7-0 7-0 SYMBOL DRAMAL (7-0) DRAMAH (F-8) DRAMDL (7-0) DRAMDH (F-8) VDATA1ST MSM7564-01 FUNCTION Specify low-order 8-bit (bit7 - 0) of the address to access an internal RAM. Specify high-order 8 bits (bit15 - 8) of the address to access an internal RAM. Store low-order 8 bits of the data to access an internal RAM. Store high-order 8 bits of the data to access an internal RAM. Voice output 1st data When internal RAM is accessed, selects read or write. Soft reset Sleep Controls adaptive equalizer. Specifies control method of adaptive equalizer. Start-up control Auto negotiation control Programmable tone control 1 Programmable tone control 2 PB tone and answer tone control Transmission filter control Selects PB tone and answer tone. Modem mode setting. Selects V.32bis and V.32 operating mode. Sets originate mode and answer mode. Sets adaptive equalization for transmit. Sets adaptive equalization for receive. Sets guard tone generator. Sets guard tone frequency. Local analog loop back test control Sets originate mode and answer mode. Sets transmit amplitude equalizer. Sets receive amplitude equalizer. Enables voice output. 15 MSM7564-01 ¡ Semiconductor Control register functional summary (Continued) REG (H) 08 W BIT 0 1 2 3 4 5 7-6 09 W (V22) 0 1 2 3 4 09 W (V32) 0 1 2 3 4 5 6 7 09 W (VOICE) 0A W 0 1 2 3 6 7 0B W 1-0 5-2 6 7 0C W (V32) 0 1 2 3 4 5 6 7 RTS EPT BRTS STRN DSPST ILDCNT CDLEV TXLEV AGCH AGCRST 600 AC 1800 AA 3000 AC 2250USB1 ANSDET CPGDET 1300 1650 Request of transmission. Transmits echo protector tone. Sets RTS of backward channel. Selects short or long training. DSP start Initial load control Carrier Detect Threshold Level select. Set programmable attenuator for transmission. AGC hold AGC reset Detects signal AC of 600 Hz. Detects signal AA of 1800 Hz. Detects signal AC of 3000 Hz. Detects unscrambled binary 1 at 2250 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1300 Hz. Detects signal of 1650 Hz. 6-4 SYMBOL TAPH EHOLD JHOLD TANI TIMC AQID DETMODE S1 USB112 USB124 SB112 SB124 ACCA AACC XCHG SS ECTRN TRN RATES EB1 VSMODE FUNCTION Holds automatic equalizer, jitter canceler, and carrier PLL. Holds automatic equalizer and jitter canceler. Holds jitter canceler. Uses automatic equalizer of unit taps. A pass through timing PLL Clears automatic equalizer, jitter canceler, and carrier PLL. Sets tone detection mode. Transmits S1 signal. Transmits unscrambled binary 1 at 1200 bps. Transmits unscrambled binary 1 at 2400 bps. Transmits scrambled binary 1 at 1200 bps. Transmits scrambled binary 1 at 2400 bps. Transmits signals AC and CA. Transmits signals AA and CC. Selects signals AA and CC. Exchage command of AA/CC Transmits signal S. Transmits echo canceler training signal. Transmits consecutive signals S, S, and TRN. Transmits signals R1 to R3. Transmits consecutive signals E and B1 Controls coding method at voice output. 16 ¡ Semiconductor Control register functional summary (Continued) REG (H) 0C W (V22ORG) BIT 0 1 2 3 4 5 6 7 0C W (V22ANS) 0 1 2 3 4 5 6 7 0C W (V21ORG) 0 1 2 3 4 5 6 7 0C W (V21ANS) 0 1 2 3 4 5 6 7 0C W 0 2 3 4 5 6 7 (Bell 103 ORG) 1 SYMBOL 2100 S1 2400 S1 2700 S1 2250USB1 ANSDET CPGDET 1100 2225 900 S1 1200 S1 1500 S1 1270USB1 ANSDET CPGDET 1100 980 600 AC 1800 AA 3000 AC 2250USB1 ANSDET CPGDET 1300 1650 600 AC 1800 AA 3000 AC 2250USB1 ANSDET CPGDET 1300 980 600 AC 1800 AA 3000 AC 2250USB1 ANSDET CPGDET 1300 2225 FUNCTION Detects signal S1 of 2100 Hz. Detects signal S1 of 2400 Hz. Detects signal S1 of 2700 Hz. Detects unscrambled binary 1 at 2250 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1100 Hz. Detects signal of 2225 Hz. Detects signal S1 of 900 Hz. Detects signal S1 of 1200 Hz. Detects signal S1 of 1500 Hz. Detects unscrambled binary 1 at 1270 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1100 Hz. Detects signal of 980 Hz. Detects signal AC of 600 Hz. Detects signal AA of 1800 Hz. Detects signal AC of 3000 Hz. Detects unscrambled binary 1 at 2250 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1300 Hz. Detects signal of 1650 Hz. Detects signal AC of 600 Hz. Detects signal AA of 1800 Hz. Detects signal AC of 3000 Hz. Detects unscrambled binary 1 at 2250 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1300 Hz. Detects signal of 980 Hz. Detects signal AC of 600 Hz. Detects signal AA of 1800 Hz. Detects signal AC of 3000 Hz. Detects unscrambled binary 1 at 2250 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1300 Hz. Detects signal of 2225 Hz. MSM7564-01 17 MSM7564-01 ¡ Semiconductor Control register functional summary (Continued) REG (H) 0C W BIT 0 2 3 4 5 6 7 0C W 0 2 3 4 5 6 7 0C R (V29) 0 1 2 3 4 5 6 7 0C R (V27) 0 1 2 3 4 5 6 7 0C W (VOICE) 0 1 2 3 4 5 6 7 (V17, V21ch2) 1 SYMBOL 600 AC 1800 AA 3000 AC 2250USB1 ANSDET CPGDET 1300 1270 600 AC 1800 AA 3000 AC 1750 ANSDET CPGDET 1300 1650 500 1700 2900 1750 ANSDET CPGDET 1300 1650 1000 1800 2600 1750 ANSDET CPGDET 1300 1650 600 AC 1800 AA 3000 AC 2250USB1 ANSDET CPGDET 1300 1100 FUNCTION Detects signal AC of 600 Hz. Detects signal AA of 1800 Hz. Detects signal AC of 3000 Hz. Detects unscrambled binary 1 at 2250 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1300 Hz. Detects signal of 1270 Hz. Detects signal AC of 600 Hz. Detects signal AA of 1800 Hz. Detects signal AC of 3000 Hz. Detects signal of 1750 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1300 Hz. Detects signal of 1650 Hz. Detects signal of 500 Hz. Detects signal of 1750 Hz. Detects signal of 2900 Hz. Detects signal of 1750 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1300 Hz. Detects signal of 1650 Hz. Detects signal of 1000 Hz. Detects signal of 1800 Hz. Detects signal of 2600 Hz. Detects signal of 1750 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1300 Hz. Detects signal of 1650 Hz. Detects signal AC of 600 Hz. Detects signal AA of 1800 Hz. Detects signal AC of 3000 Hz. Detects unscrambled binary 1 at 2250 Hz. Detects answer tone. Detects call progress tone. Detects signal of 1300 Hz. Detects signal of 1100 Hz. (Bell 103 ANS) 1 18 ¡ Semiconductor Control register functional summary (Continued) REG (H) 0D R BIT 0 1 2 3 4 5 6 0E R 0E R (VOICE) 1C R 0 1 2 3 1D R 0 1 2 5-3 6 1E W 0 1 2 3 4 5 7-6 1F W 0 1 3-2 4 5 6 7 SB112D SB124D USB112D USB124D PN0DET PN1DET SB11DET ERRCNT BRKDET LOOP2 PN0 PN1 SB11 PN511 ERR11 TXCLK ASYN EXTEND WSIZE SDA SDZ RDZ SB1DEN Detects scrambled binary 1 at 1200 bps. Detects scrambled binary 1 at 2400 bps. Detects unscrambled binary 1 at 1200 bps. Detects unscrambled binary 1 at 2400 bps. Detects preparatory signal. Detects answer / termination signal. Detects SB11 Error Count Detects break signal. Controls Loop2 test. Transmits preparatory signal. Transmits answer /termination signal. Transmits SB11 Transmits signal 511PN for error test. Transmits 1 to 1 signal for error test. Sets transmitter signal element timing. Selects synchronous or asynchronous. Sets extended asynchronous mode. 0 1 0 SYMBOL RATED EED SQD FCD TRN PBDET DSPRST CTS DCD PBTONE NO FUNCTION Detects rate signal. Detects end signal. Indicates a state of received signal quality. Detects fast carrier. Indicates a state of training. Detects PB tone. DSP reset Ready for sending. Detects carrier PB tone number MSM7564-01 Sets a character size for synchronous to asynchronous converter. Transmitted data clamped to A Transmitted data clamped to Z Received data clamped to Z Controls detection of scrambled binary 1. 19 MSM7564-01 ¡ Semiconductor ABSOLUTE MAXIMUM RATINGS Parameter Power Supply Voltage Analog Input Voltage Digital Input Voltage Digital Output Voltage Storage Temperature Symbol VDD VAIN VDIN VOUT TSTG Rating –0.3 to VDD + 0.3 –0.3 to VDD + 0.3 –0.3 to VDD + 0.3 –0.3 to VDD + 0.3 –55 to + 150 Unit V V V V °C RECOMMENDED OPERATING CONDITIONS Parameter Power Supply Voltage Operating Temperature Symbol VDD Top Min. 4.75 –20 Typ. 5.00 — Max. 5.25 70 Unit V °C RECOMMENDED OPERATING CONDITIONS (ANALOG) Parameter Input Impedance Output Load Impedance Output Load Capacitance Analog Input Amplitude SG Output Voltage Symbol RAI RAOL CAOL VAIN VSG Min. 50 20 — — 2.35 Typ. — — — — 2.40 Max. — — 100 VSG 2.45 Unit kW kW pF VPP V 20 ¡ Semiconductor MSM7564-01 ELECTRICAL CHARACTERISTICS DC Characteristics Parameter Input Leakage Current Output Leakage Current High-level Input Voltage *1 High-level Input Voltage *2 Low-level Input Voltage *1 Low-level Input Voltage *2 High-level Output Voltage *1 High-level Output Voltage *2 Low-level Output Voltage *1 Low-level Output Voltage *2 Stand-by Current 1 (Sleep Mode) Stand-by Current 2 (Sleep Mode) Average Power Supply Current (Operating) Symbol ILI ILO VIH VIH VIL VIL VOH VOH VOL VOL IDDS1 IDDS2 IDDO Condition VIN = VDD/0 V VIN = VDD/0 V — — — — IOH = –400 mA IOH = –200 mA IOL = 3.2 mA IOL = 1.6 mA clock generator inactive state (CKOEN = 1) clock generator active state (CKOEN = 0) MCK = 3.888 MHz Min. –10 –10 4.0 2.4 –0.3 –0.3 4.2 4.2 — — — — — Typ. — — — — — — — — — — — 35 100 Max. 10 10 VDD + 0.3 VDD + 0.3 0.8 0.8 — — 0.4 0.4 2 — — Unit mA mA V V V V V V V V mA mA mA Notes: *1: *2: *3: *4: Applied to RST, SLEEP pins. Applied to input pins except those of *1. Applied to ADA7 - 0 and AOD7 - 0 pins. Applied to output pins except those of *3. AC Characteristics (CPU Interface : 68 mode) Parameter Address and Chip Select Setup Time (to WR Negative Edge) Address and Chip Select Setup Time (to WR Positive Edge) WR Pulse Width Data-in Setup Time Data-in Hold Time Address and Chip Select Setup Time (to WR Negative Edge) Address and Chip Select Setup Time (to RD Positive Edge) RD Pulse Width Data-out Delay Time (to RD Negative Edge) Data-out Hold Time (to RD Positive Edge) Symbol tCWS1 tCWH1 tWW1 tDWS1 tDWH1 tCRS1 tCRH1 tRW1 tDOD1 tDOH1 Min. 30 15 45 30 15 30 15 45 — 0 Typ. — — — — — — — — — — Max. — — — — — — — — 40 — Unit ns ns ns ns ns ns ns ns ns ns 21 MSM7564-01 ¡ Semiconductor Write timing ADA7 - 0 Address In CS1, 0 tCWS1 WR tDWS1 AOD7 - 0 tDWH1 tWW1 tCWH1 Data In Read timing ADA7 - 0 Address In CS1, 0 tCRS1 RD tDOD1 AOD7 - 0 tDOH1 Data Out tRW1 tCRH1 22 ¡ Semiconductor AC Characteristics (CPU Interface : 80 mode) Parameter ALE Pulse Width Address-in Setup Time Address-in Hold Time Chip Select Setup Time (to WR Negative Edge) Chip Select Hold Time (to WR Positive Edge) WR Pulse Width Data-in Setup Time Data-in Hold Time Address-out Hold Time Address-out Delay Time Chip Select Setup Time (to RD Negative Edge) Chip Select Hold Time (to RD Positive Edge) RD Pulse Width Data-out Delay Time (to RD Negative Edge) Data-out Hold Time (to RD Positive Edge) Symbol tAW2 tAAS2 tAAH2 tCWS2 tCWH2 tWW2 tDWS2 tDWH2 tAOH2 tAOD2 tCRS2 tCRH2 tRW2 tDOD2 tDOH2 Min. 30 30 15 30 15 45 30 15 0 — 30 15 45 — 0 Typ. — — — — — — — — — — — — — — — MSM7564-01 Max. — — — — — — — — — 40 — — — 40 — Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 23 MSM7564-01 ¡ Semiconductor Write timing ALE tAW2 ADA7 - 0 tAAS2 CS1, 0 Address In tAAH2 Data In tDWS2 WR tCWS2 AOD7 - 0 tAOH2 tAOD2 tWW2 Address Out tDWH2 tCWH2 Read timing ALE tAW2 ADA7 - 0 tAAS2 CS1, 0 Address In tAAH2 Data Out tDOD2 RD tCRS2 AOD7 - 0 tAOH2 tAOD2 tRW2 Address Out tDOH2 tCRH2 24 ¡ Semiconductor Analog Transmit Characteristics Parameter Transmit Carrier Output level (at TXLEV = 00) Transmit signal to noise ratio DTMF Tone Frequency tolerance TSDF F – 10 F F + 10 Hz Symbol TSFL TSSN Min. –11.5 — Typ. –10 65 Max. –8.5 — Unit dBm dB MSM7564-01 Note –10 dBm output F = 1209, 1336, 1477, 1633, 697, 770, 852, 941 Hz High channel Low channel F = 2100, 2225 Hz Transmit level (at TXLEV = 00) Answer Tone Frequency tolerance Transmit level (at TXLEV = 00) TSDLH TSDLL TSAF TSAL –7 –8.5 F – 10 –11.5 –5.5 –7 F –10 –4 –5.5 F + 10 –8.5 dBm dBm Hz dBm Analog Receive Characteristics Parameter Receive Carrier Input level Receive signal to noise ratio Carrier Detector Detect level Delay time Hold time Answer Tone Detect level Delay time Hold time Call Progress Tone Detect level Delay time Other Tone Detect level Symbol TRFL TRSN CDDL tCDD tCDH ATDL tATD tATH CTDL tCTD OTDL Min. –43 — –48 — — –43 — — –43 — –43 Typ. — 45 — 25 15 — 25 25 — 50 — Max. –10 — –43 — — — — — — — — Unit dBm dB dBm ms ms dBm ms ms dBm ms dBm 350 to 620 Hz band ex. DTMF tone 2100 Hz / 2225 Hz –40 dBm input Note Note: A unit (dBm ) to signal power level is 600 W termination. 0 dBm is equal to 0.775 Vrms. 25 MSM7564-01 ¡ Semiconductor APPLICATION CIRCUITS CPU Interface1 The modem supports an interface to connect directly to separate address-data bus such as a Motorola-compatible CPU (68 mode : ex. Z80). The master clock (3.888 MHz) is assumed to be supplied from an external crystal. The clock for Z80 or gate array clock generated in this device is sent from CPUCLK and GACLK pins. The outline of connection is as follows. MSM7564 3.888 MHz Z80 crystal A7 - A0 A15 A14 D7 - D0 RD WR GND INT1 ADA7 - ADA0 CS1 CS0 AOD7 - AOD0 RD WR ALE STCHG CPUTYPE GND CLK CKOEN CPUCLK GACLK MCK 26 ¡ Semiconductor CPU Interface 2 MSM7564-01 The modem supports an interface to connect directly to a multiplexed address-data bus such as an Intel-compatible CPU (80 mode : ex. MSM66507). The master clock (3.888 MHz) is assumed to be supplied from clock out pin of an external CPU. Internal address latch and address output pins for peripherals are also provided. The outline of connection is as follows. MSM66507 CLKOUT A7 - A0 A15 A14 to peripherals RD WR ALE INT VDD 3.888 MHz MCK MSM7564 ADA7 - ADA0 CS1 CS0 AOD7 - AOD0 RD WR ALE STCHG CPUTYPE CKOEN CPUCLK GACLK 27 22 kW VDDP GNDA VDDA GNDA VDD1 - 5 GND1 - 5 + 10 mF + 10 mF AGND +5 V + +5 VA 10 mF AGND +5 VA Note: 1) 2) 3) 4) 5) – AINN 22 kW 330 pF 30 kW R4 : Connects to AGND R1 is the value assuming a relay and a ring detect circuit to line side (between A and B). Transmit level is adjusted through R5 and R2. Receive level is adjusted through R3 and R4. The constant of circuit is a recommended value. It needs to be adjusted by selecting parts of transformer and so on. – AINP + + 28 1000 pF MSM7564 AOUTP AOUTN 0.1 mF SG + 51 kW 51 kW 27 kW – + 27 kW + – 16 V 22 mF AGND Analog Interface MSM7564-01 2nd-order LPF fc = 5 kHz 430 pF 22 kW 430 pF 51 kW 51 kW + – 10 kW 22 kW 100 pF – + AGND 430 pF R5 100 pF 100 W +5 VA Transformer A B 600 : 600 to LINE R2 1000 pF 8.2 kW 300 W R1 < 600 W (430 W) 51 kW R3 20 kW ¡ Semiconductor