74AC125

MC74AC125, MC74ACT125 Quad Buffer with 3−State Outputs Features • Outputs Source/Sink • ′ACT125 Has TTL Compatible Inputs • Pb−Free Packages are Available http://onsemi.com VCC 14 A2 13 B2 12 O2 11 A3 10 B3 9 O3 8 14 1 PDIP−14 N SUFFIX CASE 646 14 1 A0 2 B0 3 O0 4 A1 5 B1 6 O1 7 GND 1 SOIC−14 D SUFFIX CASE 751A Figure 1. Pinout: 14−Lead Packages Conductors (Top View) 14 1 TSSOP−14 DT SUFFIX CASE 948G PIN ASSIGNMENT PIN An, Bn On FUNCTION Inputs Outputs 14 1 SOEIAJ−14 M SUFFIX CASE 965 FUNCTION TABLE Inputs An Bn Output On L H Z ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. L L L H H X NOTE: H = High Voltage Level; L = Low Voltage Level; Z = High Impedance; X = Immaterial DEVICE MARKING INFORMATION See general marking information in the device marking section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2006 October, 2006 − Rev. 7 1 Publication Order Number: MC74AC125/D MC74AC125, MC74ACT125 MAXIMUM RATINGS Symbol VCC Vin Vout Iin Iout ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value −0.5 to +7.0 −0.5 to VCC + 0.5 −0.5 to VCC + 0.5 ± 20 ± 50 ± 50 −65 to +150 Unit V V V mA mA mA °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin, Vout tr, tf TJ TA IOH IOL Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) Input Rise and Fall Time (Note 1) ′AC Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current − HIGH Output Current − LOW VCC @ 3.0 V VCC @ 4.5 V VCC @ 5.5 V Parameter ′AC ′ACT Min 2.0 4.5 0 − − − − −40 − − Typ 5.0 5.0 − 150 40 25 − 25 − − Max 6.0 5.5 VCC − − − 140 85 −24 24 °C °C mA mA ns/V Unit V V 1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. http://onsemi.com 2 MC74AC125, MC74ACT125 DC CHARACTERISTICS 74AC Symbol Parameter VCC (V) TA = +25°C Typ 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.46 5.49 − − − 0.002 0.001 0.001 − − − − − − − − 74AC TA = −40°C to +85°C Unit Conditions VIH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage VIL VOH 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 Guaranteed Limits 2.1 2.1 3.15 3.15 3.85 3.85 0.9 0.9 1.35 1.35 1.65 1.65 2.9 2.9 4.4 4.4 5.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 ±0.1 ±0.5 − − 8.0 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 ±1.0 ±5.0 75 −75 80 V VOUT = 0.1 V or VCC − 0.1 V VOUT = 0.1 V or VCC − 0.1 V IOUT = − 50 mA V V V VOL Minimum Low Level Output Voltage V *VIN = VIL or VIH −12 mA IOH − 24 mA − 24 mA IOUT = 50 mA V IIN IOZ Maximum Input Leakage Current VI (OE) = VIL, VIH VI = VCC, GND VO = VCC , GND †Minimum Dynamic Output Current Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 5.5 mA mA mA mA mA *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND IOLD IOHD ICC *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one input loaded at a time. NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V. AC CHARACTERISTICS 74AC Symbol Parameter VCC* (V) TA = +25°C CL = 50 pF Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 9.0 7.0 9.0 7.0 10.5 7.0 10 8.0 10 9.0 10.5 9.0 74AC TA = −40°C to +85°C CL = 50 pF Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 10 7.5 10 7.5 11 8.0 11 8.5 10.5 9.5 11.5 9.5 Unit tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay Data to Output Propagation Delay Data to Output Output Enable Time Output Enable Time Output Disable Time Output Disable Time *Voltage Range 3.3 V is 3.3 V ±0.3 V. Voltage Range 5.0 V is 5.0 V ±0.5 V. 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 ns ns ns ns ns ns http://onsemi.com 3 MC74AC125, MC74ACT125 DC CHARACTERISTICS 74ACT Symbol Parameter VCC (V) TA = +25°C Typ 1.5 1.5 1.5 1.5 4.49 5.49 − − 0.001 0.001 − − − − 0.6 − − 74ACT TA = −40°C to +85°C Unit Conditions VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 Guaranteed Limits 2.2 2.0 2.0 2.0 0.8 0.8 0.8 0.8 4.4 4.4 5.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 ±0.1 ±0.5 − − − 8.0 3.76 4.76 0.1 0.1 0.44 0.44 ±1.0 ±5.0 1.5 75 −75 80 V V V V V V mA mA mA mA mA mA VOUT = 0.1 V or VCC − 0.1 V VOUT = 0.1 V or VCC − 0.1 V IOUT = − 50 mA *VIN = VIL or VIH − 24 mA IOH − 24 mA IOUT = − 50 mA *VIN = VIL or VIH IOH − 24 mA − 24 mA VI = VCC, GND VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND VI = VCC − 2.1 V VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND VOL Minimum Low Level Output Voltage IIN IOZ Maximum Input Leakage Current VI (OE) = VIL, VIH VI = VCC, GND VO = VCC , GND Additional Max. ICC/Input †Minimum Dynamic Output Current 5.5 5.5 5.5 5.5 5.5 DICCT IOLD IOHD ICC Maximum Quiescent Supply Current 5.5 − *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one input loaded at a time. AC CHARACTERISTICS 74ACT Symbol Parameter VCC* (V) TA = +25°C CL = 50 pF Min tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay Data to Output Propagation Delay Data to Output Output Enable Time Output Enable Time Output Disable Time 5.0 5.0 5.0 5.0 5.0 5.0 1.0 1.0 1.0 1.0 1.0 1.0 Max 9.0 9.0 8.5 9.5 9.5 10 74ACT TA = −40°C to +85°C CL = 50 pF Min 1.0 1.0 1.0 1.0 1.0 1.0 Max 10 10 9.5 10.5 10.5 10.5 ns ns ns ns ns ns Unit Output Disable Time *Voltage Range 5.0 V is 5.0 V ±0.5 V. CAPACITANCE Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 45 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V http://onsemi.com 4 MC74AC125, MC74ACT125 ORDERING INFORMATION Device MC74AC125N MC74AC125NG MC74AC125D MC74AC125DG MC74AC125DR2 MC74AC125DR2G MC74AC125DTR2 MC74AC125DTR2G MC74AC125M MC74AC125MG MC74AC125MEL MC74AC125MELG MC74ACT125DR2 MC74ACT125DR2G MC74ACT125DTR2 MC74ACT125DTR2G MC74ACT125MEL MC74ACT125MELG MC74ACT125N MC74ACT125NG Package PDIP−14 PDIP−14 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) TSSOP−14* TSSOP−14* SOEIAJ−14 SOEIAJ−14 (Pb−Free) SOEIAJ−14 SOEIAJ−14 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) TSSOP−14* TSSOP−14* SOEIAJ−14 SOEIAJ−14 (Pb−Free) PDIP−14 PDIP−14 (Pb−Free) 25 Units / Rail 2000 / Tape & Reel 2500 / Tape & Reel 2000 / Tape & Reel 50 Units / Rail 2500 / Tape & Reel 55 Units / Rail 25 Units / Rail Shipping † †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. MARKING DIAGRAMS PDIP−14 14 MC74AC125N AWLYYWWG 1 1 14 ACT125G AWLYWW 1 1 14 AC125G AWLYWW 1 14 SOIC−14 14 TSSOP−14 14 AC 125 ALYWG G 1 14 ACT 125 ALYWG G 1 74ACT125 ALYWG 74AC125 ALYWG SOEIAJ−14 A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) http://onsemi.com 5 MC74AC125, MC74ACT125 PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE P 14 8 B 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 −−− 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 −−− 10 _ 0.38 1.01 A F N −T− SEATING PLANE L C H G D 14 PL K M J M DIM A B C D F G H J K L M N 0.13 (0.005) http://onsemi.com 6 MC74AC125, MC74ACT125 PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE H − A− 14 8 − B− P 7 PL 0.25 (0.010) M B M 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. G C −T− SEATING PLANE R X 45 _ F D 14 PL 0.25 (0.010) K M M S J TB A S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 SOLDERING FOOTPRINT* 7X 7.04 1 0.58 14X 14X 1.52 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MC74AC125, MC74ACT125 PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U S M TU S V N S 2X L/2 14 8 0.25 (0.010) M L PIN 1 IDENT. 1 7 B − U− N F DETAIL E K 0.15 (0.006) T U S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ J J1 SECTION N−N −W− C 0.10 (0.004) −T− SEATING PLANE D G H DETAIL E SOLDERING FOOTPRINT* 7.06 1 0.36 14X 14X 1.26 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 8 ÇÇÇ ÉÉÉ ÇÇÇ ÉÉÉ ÇÇÇ A −V− K1 0.65 PITCH DIMENSIONS: MILLIMETERS MC74AC125, MC74ACT125 PACKAGE DIMENSIONS SOEIAJ−14 CASE 965−01 ISSUE A 14 8 LE Q1 E HE M_ L DETAIL P 1 7 Z D e A VIEW P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX −−− 2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 −−− 1.42 INCHES MIN MAX −−− 0.081 0.002 0.008 0.014 0.020 0.004 0.008 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 −−− 0.056 c b 0.13 (0.005) M A1 0.10 (0.004) ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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