74AC244SC

DATA SHEET www.onsemi.com Octal Buffer/Line Driver with 3-STATE Outputs 74AC244, 74ACT244 SOIC−20, 300 mils CASE 751BJ−01 General Description SOIC−20 WB CASE 751D−05 The AC/ACT244 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus−oriented transmitter/receiver which provides improved PC board density. Features • ICC and IOZ Reduced by 50% • 3−STATE Outputs Drive Bus Lines or Buffer Memory Address TSSOP−20 WB CASE 948E Registers • Outputs Source/Sink 24 mA • ACT244 has TTL−Compatible Inputs TSSOP20, 4.4 x 6.5 CASE 948AQ−01 OE1 VCC I0 OE2 O4 MARKING DIAGRAMS SOIC−20 20 O0 I1 I4 O5 O1 I2 I5 O6 O2 I3 I6 O7 O3 GND AC(T)244 AWLYYWWG 1 AC244, ACT244 A WL YY WW G I7 Figure 1. Connection Diagram IEEE/IEC = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package TSSOP−20 OE1 I0 O0 I1 O1 I2 AC(T) 244 ALYWG G O2 I3 O3 I4 O4 I5 AC244, ACT244 A L Y W G O5 I6 (Note: Microdot may be in either location) O6 I7 O7 OE2 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. Figure 2. Logic Symbol © Semiconductor Components Industries, LLC, 1988 February, 2022 − Rev. 2 = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package 1 Publication Order Number: 74ACT244/D 74AC244, 74ACT244 PIN DESCRIPTION Pin Name Description OE1, OE2 3−STATE Output Enable Inputs I0−I7 Inputs O0−O7 Outputs TRUTH TABLE TRUTH TABLE (continued) Inputs Inputs Outputs Outputs OE1 In (Pins 12, 14, 16, 18) OE2 In (Pins 3, 5, 7, 9) L L L L L L L H H L H H H X Z H X Z NOTE: X = Immaterial, Z = High Impedance ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Symbol Rating Unit VCC −0.5 to +7.0 V IIK DC Input Diode Current VI = −0.5 V VI = VCC + 0.5 −20 mA +20 DC Input Voltage VI DC Output Diode Current VO = −0.5 V IOK VI = VCC + 0.5 V −0.5 to VCC + 0.5 −20 V mA +20 DC Output Voltage DC Output Source or Sink Current VO −0.5 to VCC + 0.5 V IO ±50 mA ICC or IGND ±50 mA Storage Temperature TSTG −65 to +150 °C Junction Temperature TJ 140 °C DC VCC or Ground Current per Output Pin Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. RECOMMENDED OPERATING CONDITIONS Parameter Symbol VCC Supply Voltage AC ACT Rating 2.0 to 6.0 Unit V 4.5 to 5.5 Input Voltage VI 0 to VCC V Output Voltage VO 0 to VCC V Operating Temperature TA −40 to +85 °C Minimum Input Edge Rate, AC Devices: VIN from 30% to 70% of VCC, VCC @ 3.3 V, 4.5 V, 5.5 V DV / Dt 125 mV/ns Minimum Input Edge Rate, ACT Devices: VIN from 0.8 V to 2.0 V, VCC @ 4.5 V, 5.5 V DV / Dt 125 mV/ns Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 2 74AC244, 74ACT244 DC ELECTRICAL CHARACTERISTICS FOR AC TA = +25°C Symbol VIH Parameter Minimum HIGH Level Input Voltage VCC(V) 3.0 4.5 Conditions VOUT = 0.1 V or VCC − 0.1 V 5.5 VIL Maximum LOW Level Input Voltage 3.0 4.5 VOUT = 0.1 V or VCC − 0.1 V 5.5 VOH Minimum HIGH Level Output Voltage 3.0 IOUT = −50 mA 4.5 5.5 VOL Maximum LOW Level Output Voltage TA = −55°C to +125°C Typ TA = −40°C to +85°C Guaranteed Limits Unit 1.5 2.1 2.1 2.1 2.25 3.15 3.15 3.15 2.75 3.85 3.85 3.85 1.5 0.9 0.9 0.9 2.25 1.35 1.35 1.35 2.75 1.65 1.65 1.65 2.99 2.9 2.9 2.9 4.49 4.4 4.4 4.4 5.4 5.4 5.4 3.0 VIN = VIL or VIH, IOH = 12 mA 5.49 2.56 2.40 2.46 4.5 VIN = VIL or VIH, IOH = 24 mA 3.86 3.70 3.76 5.5 VIN = VIL or VIH, IOH = 24 mA (Note 1) 4.86 4.70 4.76 3.0 IOUT = 50 mA 0.002 0.1 0.1 0.1 4.5 0.001 0.1 0.1 0.1 5.5 0.001 0.1 0.1 0.1 V V V V 3.0 VIN = VIL or VIH, IOL = 12 mA 0.36 0.50 0.44 4.5 VIN = VIL or VIH, IOL = 24 mA 0.36 0.50 0.44 5.5 VIN = VIL or VIH, IOL = 24 mA (Note 1) 0.36 0.50 0.44 Maximum Input Leakage Current 5.5 VI = VCC, GND ±0.1 ±1.0 ±1.0 mA IOZ Maximum 3−STATE Leakage Current 5.5 VI (OE) = VIL, VIH; VI = VCC, VGND; VO = VCC, GND ±0.25 ±5.0 ±2.5 mA IOLD Minimum Dynamic Output Current (Note 3) 5.5 VOLD = 1.65 V Max. 50 75 mA 5.5 VOHD = 3.85 V Min. −50 −75 mA Maximum Quiescent Supply Current 5.5 VIN = VCC or GND 80.0 40.0 mA IIN (Note 2) IOHD ICC (Note 2) 4.0 1. All outputs loaded; thresholds on input associated with output under test. 2. IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. 3. Maximum test duration 2.0 ms, one output loaded at a time. www.onsemi.com 3 74AC244, 74ACT244 DC ELECTRICAL CHARACTERISTICS FOR ACT TA = +25°C Symbol Parameter VCC(V) VIH Minimum HIGH Level Input Voltage 4.5 VIL Maximum LOW Level Input Voltage 4.5 Minimum HIGH Level Output Voltage 4.5 VOH VOL Maximum LOW Level Output Voltage 5.5 5.5 Conditions Typ TA = −55°C to +125°C TA = −40°C to +85°C Guaranteed Limits Unit VOUT = 0.1 V or VCC − 0.1 V 1.5 2.0 2.0 2.0 1.5 2.0 2.0 2.0 VOUT = 0.1 V or VCC − 0.1 V 1.5 0.8 0.8 0.8 1.5 0.8 0.8 0.8 IOUT = −50 mA 4.49 4.4 4.4 4.4 5.49 5.4 5.4 5.4 5.5 4.5 VIN = VIL or VIH, IOH = 24 mA 3.86 3.70 3.76 5.5 VIN = VIL or VIH, IOH = 24 mA (Note 4) 4.86 4.70 4.76 4.5 IOUT = 50 mA 0.001 0.1 0.1 0.1 0.001 0.1 0.1 0.1 5.5 4.5 VIN = VIL or VIH, IOL = 24 mA 0.36 0.50 0.44 5.5 VIN = VIL or VIH, IOL = 24 mA (Note 4) 0.36 0.50 0.44 V V V V IIN Maximum Input Leakage Current 5.5 VI = VCC, GND ±0.1 ±1.0 ±1.0 mA IOZ Maximum 3−STATE Leakage Current 5.5 VI = VIL, VIH; VO = VCC, GND ±0.25 ±5.0 ±2.5 mA ICCT Maximum ICC/Input 5.5 VI = VCC − 2.1 V 1.6 1.5 mA IOLD Minimum Dynamic Output Current (Note 5) 5.5 VOLD = 1.65 V Max. 50 75 mA 5.5 VOHD = 3.85 V Min. −50 −75 mA Maximum Quiescent Supply Current 5.5 VIN = VCC or GND 80.0 40.0 mA IOHD ICC 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0 ms, one output loaded at a time. www.onsemi.com 4 0.6 4.0 74AC244, 74ACT244 AC ELECTRICAL CHARACTERISTICS FOR AC tPHL tPZH tPZL tPHZ tPLZ TA = −40°C to +85°C CL = 50 pF VCC (V) (Note 6) Min Typ Max Min Max Min Max Unit Propagation Delay, Data to Output 3.3 2.0 6.5 9.0 1.0 12.5 1.5 10.0 ns 5.0 1.5 5.0 7.0 1.0 9.5 1.0 7.5 Propagation Delay, Data to Output 3.3 2.0 6.5 9.0 1.0 12.0 2.0 10.0 5.0 1.5 5.0 7.0 1.0 9.0 1.0 7.5 Output Enable Time 3.3 2.0 6.0 10.5 1.0 11.5 1.5 11.0 5.0 1.5 5.0 7.0 1.0 9.0 1.5 8.0 3.3 2.5 7.5 10.0 1.0 13.0 2.0 11.0 5.0 1.5 5.5 8.0 1.0 10.5 1.5 8.5 3.3 3.0 7.0 10.0 1.0 12.5 1.5 10.5 5.0 2.5 6.5 9.0 1.0 10.5 1.0 9.5 3.3 2.5 7.5 10.5 1.0 13.0 2.5 11.5 5.0 2.0 6.5 9.0 1.0 11.0 2.0 9.5 Symbol tPLH TA = −55°C to +125°C CL = 50 pF TA = +25°C, CL = 50 pF Parameter Output Enable Time Output Disable Time Output Disable Time ns ns ns ns ns 6. Voltage range 3.3 is 3.3 V ± 0.3 V. Voltage range 5.0 is 5.0 V ± 0.5 V. AC ELECTRICAL CHARACTERISTICS FOR ACT Symbol Parameter TA = −55°C to +125°C CL = 50 pF TA = +25°C, CL = 50 pF TA = −40°C to +85°C CL = 50 pF VCC (V) (Note 7) Min Typ Max Min Max Min Max Unit tPLH Propagation Delay, Data to Output 5.0 2.0 6.5 9.0 1.0 10.0 1.5 10.0 ns tPHL Propagation Delay, Data to Output 5.0 2.0 7.0 9.0 1.0 10.0 1.5 10.0 ns tPZH Output Enable Time 5.0 1.5 6.0 8.5 1.0 9.5 1.0 9.5 ns tPZL Output Enable Time 5.0 2.0 7.0 9.5 1.0 11.0 1.5 10.5 ns tPHZ Output Disable Time 5.0 2.0 7.0 9.5 1.0 11.0 1.5 10.5 ns tPLZ Output Disable Time 5.0 2.5 7.5 10.0 1.0 11.5 2.0 10.5 ns 7. Voltage range 5.0 is 5.0 V ± 0.5 V. CAPACITANCE Symbol Parameter Conditions Typ Unit CIN Input Capacitance VCC = OPEN 4.5 pF CPD Power Dissipation Capacitance VCC = 5.0 V 45.0 pF www.onsemi.com 5 74AC244, 74ACT244 ORDERING INFORMATION Shipping† (Qty / Packing) Order Number Package 74AC244SC SOIC−20W (Pb−Free) 38 / Tube 74AC244SCX SOIC−20W (Pb−Free) 1000 / Tape & Reel 74AC244MTC TSSOP−20 (Pb−Free) 75 / Tube 74AC244MTCX TSSOP−20 (Pb−Free) 2500 / Tape & Reel 74ACT244SC SOIC−20W (Pb−Free) 38 / Tube 74ACT244SCX SOIC−20W (Pb−Free) 1000 / Tape & Reel 74ACT244MTC TSSOP−20 (Pb−Free) 75 / Tube 74ACT244MTCX TSSOP−20 (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D NOTE: All packages are lead free per JEDEC: J−STD−020B standard. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−20, 300 mils CASE 751BJ−01 ISSUE O E1 DATE 19 DEC 2008 SYMBOL MIN NOM MAX A 2.36 2.49 2.64 A1 0.10 0.30 A2 2.05 2.55 b 0.31 0.51 c 0.20 0.27 0.33 D 12.60 12.80 13.00 E 10.01 10.30 10.64 E1 7.40 7.50 7.60 E 1.27 BSC e b 0.41 e PIN#1 IDENTIFICATION 0.75 h 0.25 L 0.40 θ 0º 8º θ1 5º 15º 0.81 1.27 TOP VIEW D h A2 A A1 SIDE VIEW h q1 q q1 L c END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-013. DOCUMENT NUMBER: DESCRIPTION: 98AON34287E SOIC−20, 300 MILS Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−20 WB CASE 751D−05 ISSUE H DATE 22 APR 2015 SCALE 1:1 A 20 q X 45 _ M E h 0.25 H NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 1 10 20X B b 0.25 M T A S B DIM A A1 b c D E e H h L q S L A 18X e SEATING PLANE A1 c T GENERIC MARKING DIAGRAM* RECOMMENDED SOLDERING FOOTPRINT* 20 20X 20X 1.30 0.52 20 XXXXXXXXXXX XXXXXXXXXXX AWLYYWWG 11 1 11.00 1 XXXXX A WL YY WW G 10 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ 98ASB42343B SOIC−20 WB = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP−20 WB CASE 948E ISSUE D DATE 17 FEB 2016 SCALE 2:1 20X 0.15 (0.006) T U 2X L K REF 0.10 (0.004) S L/2 20 M T U S V ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ K K1 S J J1 11 B SECTION N−N −U− PIN 1 IDENT 0.25 (0.010) N 1 10 M 0.15 (0.006) T U S A −V− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. N F DETAIL E −W− C G D H DETAIL E 0.100 (0.004) −T− SEATING PLANE DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT 7.06 XXXX XXXX ALYWG G 1 0.65 PITCH 16X 0.36 16X 1.26 DOCUMENT NUMBER: 98ASH70169A DESCRIPTION: TSSOP−20 WB A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. DIMENSIONS: MILLIMETERS Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP20, 4.4x6.5 CASE 948AQ−01 ISSUE A DATE 19 MAR 2009 b SYMBOL MIN NOM MAX A E1 E 1.20 A1 0.05 0.15 A2 0.80 1.05 b 0.19 0.30 c 0.09 0.20 D 6.40 6.50 6.60 E 6.30 6.40 6.50 E1 4.30 4.40 4.50 0.65 BSC e L 0.45 0.75 1.00 REF L1 θ 0.60 0º 8º e TOP VIEW D c A2 A θ1 L A1 SIDE VIEW END VIEW L1 Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. DOCUMENT NUMBER: DESCRIPTION: 98AON34453E TSSOP20, 4.4X6.5 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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