74ACT139SCX

Revised November 1999 74AC139 • 74ACT139 Dual 1-of-4 Decoder/Demultiplexer General Description Features The AC/ACT139 is a high-speed, dual 1-of-4 decoder/ demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutuallyexclusive active-LOW outputs. Each decoder has an active-LOW Enable input which can be used as a data input for a 4-output demultiplexer. Each half of the AC/ ACT139 can be used as a function generator providing all four minterms of two variables. ■ ICC reduced by 50% ■ Multifunction capability ■ Two completely independent 1-of-4 decoders ■ Active LOW mutually exclusive outputs ■ Outputs source/sink 24 mA ■ ACT139 has TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74AC139SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body M16D 16-Lead Small Outline Package (SOIC), EIAJ Type II, 5.3mm Wide 74AC139SJ 74AC139MTC 74AC139PC MTC16 N16E 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 74ACT139SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 74ACT139SJ M16D 16-Lead Small Outline Package (SOIC), EIAJ Type II, 5.3mm Wide 74ACT139MTC 74ACT139PC MTC16 N16E 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Names Description A0, A1 Address Inputs E Enable Inputs O0–O3 Outputs FACT is a trademark of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation DS009926 www.fairchildsemi.com 74AC139 • 74ACT139 Dual 1-of-4 Decoder/Demultiplexer November 1988 74AC139 • 74ACT139 Logic Symbols Functional Description The AC/ACT139 is a high-speed dual 1-of-4 decoder/ demultiplexer. The device has two independent decoders, each of which accepts two binary weighted inputs (A0–A1) and provides four mutually exclusive active-LOW outputs (O0–O3). Each decoder has an active-LOW enable (E). When E is HIGH all outputs are forced HIGH. The enable can be used as the data input for a 4-output demultiplexer application. Each half of the AC/ACT139 generates all four minterms of two variables. These four minterms are useful in some applications, replacing multiple gate functions as shown in Figure 1, and thereby reducing the number of packages required in a logic network. IEEE/IEC FIGURE 1. Gate Functions (Each Half) Truth Table Logic Diagram Inputs Outputs E A0 A1 O0 O1 O2 O3 H X X H H H H L L L L H H H L H L H L H H L L H H H L H L H H H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Recommended Operating Conditions −0.5V to +7.0V Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V −20 mA VI = VCC + 0.5V +20 mA DC Input Voltage (VI) Supply Voltage (VCC) −0.5V to VCC + 0.5V VO = VCC + 0.5V +20 mA 0V to VCC −40°C to +85°C Minimum Input Edge Rate (∆V/∆t) AC Devices DC Output Source VIN from 30% to 70% of VCC ±50 mA VCC @ 3.3V, 4.5V, 5.5V DC VCC or Ground Current 125 mV/ns Minimum Input Edge Rate (∆V/∆t) ±50 mA per Output Pin (ICC or IGND) Storage Temperature (TSTG) 0V to VCC Operating Temperature (TA) −0.5V to VCC + 0.5V or Sink Current (IO) 4.5V to 5.5V Output Voltage (VO) −20 mA DC Output Voltage (VO) 2.0V to 6.0V ACT Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V AC ACT Devices −65°C to +150°C VIN from 0.8V to 2.0V Junction Temperature (TJ) VCC @ 4.5V, 5.5V PDIP 140°C 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications. DC Electrical Characteristics for AC Symbol VIH Parameter Minimum HIGH Level Input Voltage VIL VOH TA = +25°C VCC (V) Typ 3.0 1.5 TA = −40°C to +85°C Guaranteed Limits 2.1 Units 4.5 2.25 3.15 3.15 5.5 2.75 3.85 3.85 Maximum LOW Level 3.0 1.5 0.9 0.9 Input Voltage 4.5 2.25 1.35 1.35 5.5 2.75 1.65 1.65 Minimum HIGH Level 3.0 2.99 2.9 2.9 Output Voltage 4.5 4.49 4.4 4.4 5.5 5.49 5.4 5.4 3.0 2.56 2.46 4.5 3.86 3.76 5.5 4.86 4.76 Conditions VOUT = 0.1V 2.1 V or VCC − 0.1V VOUT = 0.1V V or VCC − 0.1V V IOUT = −50 µA VIN = VIL or VIH VOL IOH = −12 mA V IOH = −24 mA IOH = −24 mA (Note 2) Maximum LOW Level 3.0 0.002 0.1 0.1 Output Voltage 4.5 0.001 0.1 0.1 5.5 0.001 0.1 0.1 3.0 0.36 0.44 4.5 0.36 0.44 5.5 0.36 0.44 ± 0.1 ± 1.0 µA VI = VCC, GND V IOUT = 50 µA VIN = VIL or VIH IOL = 12 mA V IOL = 24 mA IOL = 24 mA (Note 2) IIN (Note 4) Maximum Input Leakage Current 5.5 IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max IOHD Output Current (Note 3) 5.5 −75 mA VOHD = 3.85V Min ICC (Note 4) Maximum Quiescent Supply Current 5.5 40.0 µA VIN = VCC or GND 4.0 Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. 3 www.fairchildsemi.com 74AC139 • 74ACT139 Absolute Maximum Ratings(Note 1) 74AC139 • 74ACT139 DC Electrical Characteristics for ACT Symbol Parameter Minimum HIGH Level VIH VIL VOH TA = +25°C VCC (V) Typ 4.5 1.5 TA = −40°C to +85°C Guaranteed Limits 2.0 2.0 Input Voltage 5.5 1.5 2.0 2.0 Maximum LOW Level 4.5 1.5 0.8 0.8 Input Voltage 5.5 1.5 0.8 0.8 Minimum HIGH Level 4.5 4.49 4.4 4.4 Output Voltage 5.5 5.49 5.4 5.4 Units V V V Conditions VOUT = 0.1V or VCC − 0.1V VOUT = 0.1V or VCC − 0.1V IOUT = −50 µA VIN = VIL or VIH VOL 4.5 3.86 3.76 5.5 4.86 4.76 Maximum LOW Level 4.5 0.001 0.1 0.1 Output Voltage 5.5 0.001 0.1 0.1 4.5 0.36 0.44 5.5 0.36 0.44 5.5 ±0.1 ±1.0 V IOH = −24 mA IOH = −24 mA (Note 5) V IOUT = 50 µA V IOL = 24 mA VIN = VIL or VIH IIN Maximum Input Leakage Current ICCT Maximum IOL = 24 mA (Note 5) µA VI = VCC, GND 1.5 mA VI = VCC − 2.1V IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max IOHD Output Current (Note 6) 5.5 −75 mA ICC Maximum Quiescent 5.5 ICC/Input Supply Current 0.6 5.5 4.0 µA 40.0 VOHD = 3.85V Min VIN = VCC or GND Note 5: All outputs loaded; thresholds on input associated with output under test. Note 6: Maximum test duration 2.0 ms, one output loaded at a time. AC Electrical Characteristics for AC Symbol tPLH tPHL tPLH tPHL Parameter VCC TA = +25°C (V) CL = 50 pF TA = −40°C to +85°C CL = 50 pF (Note 7) Min Typ Max Min Max Propagation Delay 3.3 4.0 8.0 11.5 3.5 13.0 An to On 5.0 3.0 6.5 8.5 2.5 9.5 Propagation Delay 3.3 3.0 7.0 10.0 2.5 11.0 An to On 5.0 2.5 5.5 7.5 2.0 8.5 Propagation Delay 3.3 4.5 9.5 12.0 3.5 13.0 En to On 5.0 3.5 7.0 8.5 3.0 10.0 Propagation Delay 3.3 4.0 8.0 10.0 3.0 11.0 En to On 5.0 2.5 6.0 7.5 2.5 8.5 Note 7: Voltage Range 3.3 is 3.3V ± 0.3V. Voltage Range 5.0 is 5.0V ± 0.5V www.fairchildsemi.com 4 Units ns ns ns ns Symbol tPLH Parameter Propagation Delay An to On tPHL Propagation Delay An to On tPLH Propagation Delay En to On tPHL Propagation Delay En to On VCC TA = +25°C (V) CL = 50 pF TA = −40°C to +85°C CL = 50 pF Units (Note 8) Min Typ Max Min Max 5.0 1.5 6.0 8.5 1.5 9.5 ns 5.0 1.5 6.0 9.5 1.5 10.5 ns 5.0 2.5 7.0 10.0 2.0 11.0 ns 5.0 2.0 7.0 9.5 1.5 10.5 ns Note 8: Voltage Range 5.0 is 5.0V ± 0.5V Capacitance Typ Units CIN Symbol Input Capacitance Parameter 4.5 pF VCC = OPEN CPD Power Dissipation Capacitance 40.0 pF VCC = 5.0V 5 Conditions www.fairchildsemi.com 74AC139 • 74ACT139 AC Electrical Characteristics for ACT 74AC139 • 74ACT139 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body Package Number M16A www.fairchildsemi.com 6 74AC139 • 74ACT139 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ Type II, 5.3mm Wide Package Number M16D 7 www.fairchildsemi.com 74AC139 • 74ACT139 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 www.fairchildsemi.com 8 74AC139 • 74ACT139 Dual 1-of-4 Decoder/Demultiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 9 www.fairchildsemi.com