74ACT14

MC74AC14, MC74ACT14 Hex Inverter Schmitt Trigger The MC74AC14/74ACT14 contains six logic inverters which accept standard CMOS Input signals (TTL levels for MC74ACT14) and provide standard CMOS output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have a greater noise margin then conventional inverters. The MC74AC14/74ACT14 has hysteresis between the positive−going and negative−going input thresholds (typically 1.0 V) which is determined internally by transistor ratios and is essentially insensitive to temperature and supply voltage variations. Features http://onsemi.com 14 1 14 1 14 1 PDIP−14 SUFFIX N CASE 646 SOIC−14 SUFFIX D CASE 751A • • • • Schmitt Trigger Inputs Outputs Source/Sink 24 mA ′ACT14 Has TTL Compatible Inputs Pb−Free Packages are Available TSSOP−14 SUFFIX DT CASE 948G SOEIAJ−14 SUFFIX M CASE 965 1 MAXIMUM RATINGS Rating DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Symbol VCC Vin Vout Iin Iout ICC Tstg Value −0.5 to +7.0 −0.5 to VCC +0.5 −0.5 to VCC +0.5 ±20 ±50 ±50 −65 to +150 Unit V V V mA mA °C mJ VCC 14 14 13 12 11 10 9 8 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1 2 3 4 (Top View) 5 6 7 GND Figure 1. Pinout: 14−Lead Packages Conductors FUNCTION TABLE Input A L H Output O H L ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. DEVICE MARKING INFORMATION See general marking information in the device marking section on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2006 October, 2006 − Rev. 7 1 Publication Order Number: MC74AC14/D MC74AC14, MC74ACT14 RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin, Vout tr, tf Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) Input Rise and Fall Time (Note 1) ′AC Devices except Schmitt Inputs Input Rise and Fall Time (Note 2) ′ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current − High Output Current − Low VCC @ 3.0 V VCC @ 4.5 V VCC @ 5.5 V VCC @ 4.5 V VCC @ 5.5 V Parameter ′AC ′ACT Min 2.0 4.5 0 − − − − − − −40 − − Typ 5.0 5.0 − 150 40 25 10 8.0 − 25 − − Max 6.0 5.5 VCC − − − − − 140 85 −24 24 ns/V °C °C mA mA ns/V Unit V V tr, tf TJ TA IOH IOL 1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times. DC CHARACTERISTICS 74AC Symbol VOH Parameter Minimum High Level Output Voltage VCC (V) 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD Maximum Input Leakage Current †Minimum Dynamic Output Current 5.5 5.5 5.5 TA = +25°C Typ 2.99 4.49 5.49 − − − 0.002 0.001 0.001 − − − − − − 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 ±0.1 − − 74AC TA = −40°C to +85°C Guaranteed Limits 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 ±1.0 75 −75 V IOUT = −50 mA Unit Conditions V *VIN = VIL or VIH −12 mA IOH −24 mA −24 mA IOUT = 50 mA V V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND mA mA mA mA ICC Maximum Quiescent Supply Current 5.5 − 4.0 40 *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) 74AC Symbol Parameter VCC* (V) 3.3 5.0 TA = +25°C CL = 50 pF Min tPLH tPHL Propagation Delay Propagation Delay 1.5 1.5 Typ 9.5 7.0 7.5 6.0 Max 13.5 10.0 11.5 8.5 74AC TA = −40°C to +85°C CL = 50 pF Min 1.5 1.5 1.5 1.5 Max 15.0 11.0 13.0 9.5 ns ns 3− 5 3− 5 Unit Figure No. *Voltage Range 3.3 V is 3.3 V ±0.3 V. 3.3 1.5 5.0 1.5 Voltage Range 5.0 V is 5.0 V ±0.5 V. http://onsemi.com 2 MC74AC14, MC74ACT14 INPUT CHARACTERISTICS (unless otherwise specified) Symbol Parameter VCC (V) 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 74AC 2.2 3.2 3.9 0.5 0.9 1.1 1.2 1.4 1.6 0.3 0.4 0.5 74ACT Test Conditions Vt + Maximum Positive Threshold 2.0 V TA = Worst Case Vt − Minimum Negative Threshold 0.8 V TA = Worst Case Vh(max) Maximum Hysteresis 1.2 V TA = Worst Case Vh(min) Minimum Hysteresis 0.4 V TA = Worst Case DC CHARACTERISTICS 74ACT Symbol VOH Parameter Minimum High Level Output Voltage VCC (V) 4.5 5.5 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 4.5 5.5 IIN DICCT IOLD IOHD Maximum Input Leakage Current Additional Max. ICC/Input †Minimum Dynamic Output Current 5.5 5.5 5.5 5.5 TA = +25°C Typ 4.49 5.49 − − 0.001 0.001 − − − 0.6 − − 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 ±0.1 − − − 4.0 74ACT TA = −40°C to +85°C Guaranteed Limits 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 ±1.0 1.5 75 −75 40 V IOUT = −50 mA *VIN = VIL or VIH IOH −24 mA −24 mA IOUT = 50 mA *VIN = VIL or VIH 24 mA IOL 24 mA VI = VCC, GND VI = VCC − 2.1 V VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND Unit Conditions V V V mA mA mA mA mA ICC Maximum Quiescent Supply Current 5.5 − *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) 74ACT Symbol Parameter VCC* (V) 5.0 5.0 TA = +25°C CL = 50 pF Min tPLH tPHL Propagation Delay Propagation Delay 1.5 1.5 Typ − − Max 11.5 10.0 74ACT TA = −40°C to +85°C CL = 50 pF Min 1.0 1.0 Max 12.5 11.0 ns ns 3− 5 3− 5 Unit Figure No. *Voltage Range 5.0 V is 5.0 V ±0.5 V. CAPACITANCE Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 25 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V http://onsemi.com 3 MC74AC14, MC74ACT14 ORDERING INFORMATION Device MC74AC14N MC74AC14NG MC74ACT14N MC74ACT14NG MC74AC14D MC74AC14DG MC74AC14DR2 MC74AC14DR2G MC74ACT14D MC74ACT14DG MC74ACT14DR2 MC74ACT14DR2G MC74AC14DTR2 MC74AC14DTR2G MC74ACT14DTR2 MC74ACT14DTR2G MC74AC14MEL MC74AC14MELG MC74ACT14MEL MC74ACT14MELG Package PDIP−14 PDIP−14 (Pb−Free) PDIP−14 PDIP−14 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) TSSOP−14* TSSOP−14* TSSOP−14* TSSOP−14* SOEIAJ−14 SOEIAJ−14 (Pb−Free) SOEIAJ−14 SOEIAJ−14 (Pb−Free) 2500 / Tape & Reel 55 Units / Rail 2500 / Tape & Reel 55 Units / Rail Shipping † 25 Units / Rail 2000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. http://onsemi.com 4 MC74AC14, MC74ACT14 MARKING DIAGRAMS PDIP−14 14 MC74AC14N AWLYYWWG 1 1 14 AC14G AWLYWW 1 14 ACT14G AWLYWW 1 1 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) ACT 14 ALYWG G SOIC−14 14 AC 14 ALYWG G TSSOP−14 14 74AC14 ALYWG 1 14 74ACT14 ALYWG 1 SOEIAJ−14 14 MC74ACT14N AWLYYWWG 1 14 http://onsemi.com 5 MC74AC14, MC74ACT14 PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE P 14 8 B 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 −−− 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 −−− 10 _ 0.38 1.01 A F N −T− SEATING PLANE L C H G D 14 PL K M J M DIM A B C D F G H J K L M N 0.13 (0.005) http://onsemi.com 6 MC74AC14, MC74ACT14 PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE H − A− 14 8 − B− P 7 PL 0.25 (0.010) M B M 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. G C −T− SEATING PLANE R X 45 _ F D 14 PL 0.25 (0.010) K M M S J TB A S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 SOLDERING FOOTPRINT* 7X 7.04 1 0.58 14X 14X 1.52 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MC74AC14, MC74ACT14 PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U S M TU S V N S 2X L/2 14 8 0.25 (0.010) M L PIN 1 IDENT. 1 7 B − U− N F DETAIL E K 0.15 (0.006) T U S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ J J1 SECTION N−N −W− C 0.10 (0.004) −T− SEATING PLANE D G H DETAIL E SOLDERING FOOTPRINT* 7.06 1 0.36 14X 14X 1.26 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 8 ÇÇÇ ÉÉÉ ÇÇÇ ÉÉÉ ÇÇÇ A −V− K1 0.65 PITCH DIMENSIONS: MILLIMETERS MC74AC14, MC74ACT14 PACKAGE DIMENSIONS SOEIAJ−14 M SUFFIX CASE 965−01 ISSUE A 14 8 LE Q1 E HE M_ L DETAIL P 1 7 Z D e A VIEW P c NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX −−− 2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 −−− 1.42 INCHES MIN MAX −−− 0.081 0.002 0.008 0.014 0.020 0.004 0.008 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 −−− 0.056 b 0.13 (0.005) M A1 0.10 (0.004) ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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