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74AC14, 74ACT14
Hex Inverter with Schmitt Trigger Input
Features
General Description
■ ICC reduced by 50%
The 74AC14 and 74ACT14 contain six inverter gates
each with a Schmitt trigger input. They are capable of
transforming slowly changing input signals into sharply
defined, jitter-free output signals. In addition, they have a
greater noise margin than conventional inverters.
■ Outputs source/sink 24mA
■ 74ACT14 has TTL-compatible inputs
The 74AC14 and 74ACT14 have hysteresis between the
positive-going and negative-going input thresholds (typically 1.0V) which is determined internally by transistor
ratios and is essentially insensitive to temperature and
supply voltage variations.
Ordering Information
Order
Number
Package
Number
Package Description
74AC14SC
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74AC14SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC14MTC
74ACT14SC
74ACT14MTC
MTC14
M14A
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
©1988 Fairchild Semiconductor Corporation
74AC14, 74ACT14 • Rev. 1.7.2
www.fairchildsemi.com
74AC14, 74ACT14 — Hex Inverter with Schmitt Trigger Input
February 2011
74AC14, 74ACT14 — Hex Inverter with Schmitt Trigger Input
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
Description
In
Inputs
On
Outputs
©1988 Fairchild Semiconductor Corporation
74AC14, 74ACT14 • Rev. 1.7.2
Function Table
Input
Output
A
O
L
H
H
L
www.fairchildsemi.com
2
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VCC
IIK
Parameter
Rating
Supply Voltage
–0.5V to +7.0V
DC Input Diode Current
VI –0.5V
–20mA
VI VCC + 1.5
+20mA
VI
DC Input Voltage
–0.5V to VCC + 1.5V
IOK
DC Output Diode Current
VO –0.5V
–20mA
VO VCC + 0.5V
+20mA
VO
DC Output Voltage
–0.5V to VCC + 0.5V
IO
DC Output Source or Sink Current
±50mA
ICC or IGND DC VCC or Ground Current per Output Pin
Storage Temperature
TSTG
TJ
±50mA
–65°C to +150°C
Junction Temperature
140°C
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCC
Parameter
Rating
Supply Voltage
AC
2.0V to 6.0V
ACT
4.5V to 5.5V
VI
Input Voltage
0V to VCC
VO
Output Voltage
0V to VCC
TA
Operating Temperature
©1988 Fairchild Semiconductor Corporation
74AC14, 74ACT14 • Rev. 1.7.2
–40°C to +85°C
www.fairchildsemi.com
3
74AC14, 74ACT14 — Hex Inverter with Schmitt Trigger Input
Absolute Maximum Ratings
TA +25°C
VCC
Symbol
VOH
Parameter
(V)
Minimum HIGH Level
3.0
Output Voltage
4.5
Conditions
IOUT –50µA
5.5
VOL
IIN(3)
Vt+
Vt–
VH(MAX)
Maximum LOW Level
Output Voltage
ICC
2.9
4.49
4.4
4.4
5.4
5.4
2.56
2.46
4.5
IOH 24mA
3.86
3.76
5.5
IOH 24mA
4.86
4.76
3.0
IOUT 50µA
(1)
0.002
0.1
0.1
4.5
0.001
0.1
0.1
5.5
0.001
0.1
0.1
0.36
0.44
Units
V
V
3.0
IOL 12mA
4.5
IOL 24mA
0.36
0.44
5.5
IOL 24mA(1)
0.36
0.44
Maximum Input Leakage
Current
5.5
VI VCC, GND
±0.1
±1.0
µA
Maximum Positive
Threshold
3.0
TA Worst Case
V
Minimum Negative
Threshold
Maximum Hysteresis
2.2
2.2
4.5
3.2
3.2
5.5
3.9
3.9
0.5
0.5
4.5
0.9
0.9
5.5
1.1
1.1
1.2
1.2
1.4
1.4
3.0
3.0
TA Worst Case
TA Worst Case
Minimum Hysteresis
3.0
TA Worst Case
5.5
(3)
2.9
5.49
4.5
IOHD
2.99
IOH 12mA
5.5
IOLD
Guaranteed Limits
3.0
4.5
VH(MIN)
Typ
TA –40°C
to +85°C
Minimum Dynamic
Output Current
(2)
Maximum Quiescent
1.6
1.6
0.3
0.3
0.4
0.4
0.5
0.5
V
V
V
5.5
VOLD 1.65V Max.
75
mA
5.5
VOHD 3.85V Min.
–75
mA
5.5
VIN VCC or GND
20.0
µA
2.0
Supply Current
Notes:
1. All outputs loaded; thresholds on input associated with output under test.
2. Maximum test duration 2.0ms, one output loaded at a time.
3. IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC.
©1988 Fairchild Semiconductor Corporation
74AC14, 74ACT14 • Rev. 1.7.2
www.fairchildsemi.com
4
74AC14, 74ACT14 — Hex Inverter with Schmitt Trigger Input
DC Electrical Characteristics for AC
VCC
(V)
Symbol
Parameter
VIH
Minimum HIGH Level
Input Voltage
4.5
Maximum LOW Level
Input Voltage
4.5
Minimum HIGH Level
Output Voltage
VIL
VOH
TA +25°C
Conditions
Typ.
TA –40°C to +85°C
Guaranteed Limits
VOUT 0.1V or
VCC – 0.1V
1.5
2.0
2.0
1.5
2.0
2.0
VOUT 0.1V or
VCC – 0.1V
1.5
0.8
0.8
5.5
1.5
0.8
0.8
4.5
IOUT –50µA
4.49
4.34
4.4
5.49
5.4
5.4
3.86
3.76
4.86
4.76
0.1
0.1
5.5
5.5
4.5
VIN VIL or VIH,
Units
V
V
V
IOH –24mA
5.5
VIN VIL or VIH,
IOH –24mA(4)
VOL
Maximum LOW Level
Output Voltage
4.5
IOUT 50µA
0.001
5.5
4.5
0.001
VIN VIL or VIH,
0.1
0.1
0.36
0.44
0.36
0.44
V
IOL 24mA
5.5
VIN VIL or VIH,
IOL 24mA(4)
IIN
VH(MAX)
Maximum Input
Leakage Current
5.5
VI VCC, GND
±0.1
±1.0
µA
Maximum Hysteresis
4.5
TA Worst Case
1.4
1.4
V
1.6
1.6
0.4
0.4
0.5
0.5
2.0
2.0
2.0
2.0
0.8
0.8
5.5
TA Worst Case
Minimum Hysteresis
4.5
Maximum Positive
Threshold
4.5
Vt–
Minimum Negative
Threshold
4.5
ICCT
Maximum ICC/Input
5.5
VI VCC – 2.1V
IOLD
Minimum Dynamic
Output Current(5)
5.5
Maximum Quiescent
Supply Current
VH(MIN)
5.5
Vt+
IOHD
ICC
TA Worst Case
5.5
TA Worst Case
5.5
0.8
0.6
V
V
V
0.8
1.5
mA
VOLD 1.65V Max.
75
mA
5.5
VOHD 3.85V Min.
–75
mA
5.5
VIN VCC or GND
20.0
µA
2.0
Notes:
4. All outputs loaded; thresholds on input associated with output under test.
5. Maximum test duration 2.0ms, one output loaded at a time.
©1988 Fairchild Semiconductor Corporation
74AC14, 74ACT14 • Rev. 1.7.2
www.fairchildsemi.com
5
74AC14, 74ACT14 — Hex Inverter with Schmitt Trigger Input
DC Electrical Characteristics for ACT
TA +25°C,
CL 50pF
Symbol
tPLH
tPHL
Parameter
TA –40°C to +85°C,
CL 50pF
VCC (V)(6)
Min.
Typ.
Max.
Min.
Max.
Units
3.3
1.5
9.5
13.5
1.5
15.0
ns
5.0
1.5
7.0
10.0
1.5
11.0
3.3
1.5
7.5
11.5
1.5
13.0
5.0
1.5
6.0
8.5
1.5
9.5
Propagation Delay
Propagation Delay
ns
Note:
6. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V.
AC Electrical Characteristics for ACT
TA +25°C,
CL 50pF
Symbol
Parameter
TA –40°C to +85°C,
CL 50pF
VCC (V)(7)
Min.
Typ.
Max.
Min.
Max.
Units
tPLH
Propagation Delay
5.0
3.0
8.0
10.0
3.0
11.0
ns
tPHL
Propagation Delay
5.0
3.0
8.0
10.0
3.0
11.0
ns
Note:
7. Voltage Range 5.0 is 5.0V ± 0.5V.
Capacitance
Symbol
Parameter
Conditions
CIN
Input Capacitance
VCC OPEN
CPD
Power Dissipation Capacitance
VCC 5.0V
AC
ACT
©1988 Fairchild Semiconductor Corporation
74AC14, 74ACT14 • Rev. 1.7.2
Typ
Units
4.5
pF
25.0
pF
80
www.fairchildsemi.com
6
74AC14, 74ACT14 — Hex Inverter with Schmitt Trigger Input
AC Electrical Characteristics for AC
0.65
A
0.43TYP
14
8
B
6.4
6.10
3.2
1
PIN#1 IDENT
0.2 C B A
7
TOP VIEW
1.65
ALL LEAD TIPS
0.45
RECOMMENDED LAND PATTERN
1.2 MAX
0.30
0.19
ALL LEAD TIPS
0.1 C
0.65
SEE DETAIL A
0.90+0.15
-0.10
0.13
A B
0.20
0.09
C
C
FRONT VIEW
0.09 MIN
NOTES:
A. CONFORMS TO JEDEC REGISTRATION MO-153,
VARIATION AB, REF NOTE 6
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONING AND TOLERANCES PER ANSI
Y14.5M, 2009.
E. LANDPATTERN STANDARD: SOP65P640X110-14M.
F. DRAWING FILE NAME: MKT-MTC14rev7.
GAGE PLANE
0.09 MIN
1.00
0.25
SEATING PLANE
DETAIL A
8.75
8.50
A
7.62
14
8
14
B
0.65
8
4.00
3.80
6.00
1
PIN #1
IDENT.
1.27
(0.33)
TOP VIEW
5.60
7
0.51
0.35
0.25 M C B A
1.75 MAX
1.70
1
1.27
LAND PATTERN RECOMMENDATION
A
C
1.50
1.25
FRONT VIEW
0.25
0.10
0.50
0.25 x 45
R0.10
GAGE
PLANE
R0.10
0.36
8°
0°
0.90
0.50
(1.04)
0.10 C
0.25
0.19
SIDE VIEW
NOTES:
A. CONFORMS TO JEDEC MS-012,
VARIATION AB, ISSUE C
B. ALL DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS
D. LAND PATTERN STANDARD:
SOIC127P600X145-14M
E. CONFORMS TO ASME Y14.5M, 2009
D. DRAWING FILENAME: MKT-M14Arev14
SEATING PLANE
DETAIL A
SCALE 16 : 1
7
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
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ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
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Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
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