74ACT16543SSCX

Revised October 1999 74ACT16543 16-Bit Registered Transceiver with 3-STATE Outputs General Description Features The ACT16543 contains sixteen non-inverting transceivers containing two sets of D-type registers for temporary storage of data flowing in either direction. Each byte has separate control inputs which can be shorted together for full 16-bit operation. Separate Latch Enable and Output Enable inputs are provided for each register to permit independent input and output control in either direction of data flow. ■ Independent registers for A and B buses ■ Separate controls for data flow in each direction ■ Back-to-back registers for storage Multiplexed real-time and stored data transfers ■ Separate control logic for each byte ■ Outputs source/sink 24 mA ■ TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74ACT16543SSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74ACT16543MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Pin Names Descriptions OEABn A-to-B Output Enable Input (Active LOW) OEBAn B-to-A Output Enable Input (Active LOW) CEABn A-to-B Enable Input (Active LOW) CEBAn B-to-A Enable Input (Active LOW) LEABn A-to-B Latch Enable Input (Active LOW) LEBAn B-to-A Latch Enable Input (Active LOW) A0–A15 A-to-B Data Inputs or B-to-A 3-STATE Outputs B0–B15 B-to-A Data Inputs or A-to-B 3-STATE Outputs FACT is a trademark of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation DS500301 www.fairchildsemi.com 74ACT16543 16-Bit Registered Transceiver with 3-STATE Outputs August 1999 74ACT16543 Functional Description Data I/O Control Table The ACT16543 contains sixteen non-inverting transceivers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins may be shorted together to obtain full 16-bit operation. The following description applies to each byte. For data flow from A to B, for example, the A-toB Enable (CEABn) input must be LOW in order to enter data from A0–A15 or take data from B0–B15, as indicated in the Data I/O Control Table. With CEABn LOW, a LOW signal on the A-to-B Latch Enable (LEABn) input makes the Ato-B latches transparent; a subsequent LOW-to-HIGH transition of the LEABn signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEABn and OEABn both LOW, the 3-STATE B output buffers are active and reflect the data present at the output of the A latches. Control of data flow from B to A is similar, but using the CEBAn, LEBAn and OEBAn inputs. Inputs OEABn Latch Status (Byte n) Output Buffers (Byte n) CEABn LEABn H X X Latched High Z X H X Latched — L L X Transparent — X X H — High Z L X L — Driving H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial A-to-B data flow shown; B-to-A flow control is the same, except using CEBAn, LEBA n and OEBAn Logic Diagrams Byte 1 (0:7) Byte 2 (8:15) Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Recommended Operating Conditions −0.5V to +7.0V Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V −20 mA VI = VCC + 0.5V +20 mA Supply Voltage (VCC) DC Output Diode Current (IOK) VO = −0.5V −20 mA VO = VCC + 0.5V +20 mA DC Output Voltage (VO) 0V to VCC 125 mV/ns VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V ±50 mA Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications. ±50 mA per Output Pin −40°C to +85°C Operating Temperature (TA) Minimum Input Edge Rate (∆V/∆t) DC VCC or Ground Current Storage Temperature 0V to VCC Output Voltage (VO) −0.5V to VCC + 0.5V DC Output Source/Sink Current (IO) 4.5V to 5.5V Input Voltage (VI) −65°C to +150°C DC Electrical Characteristics Symbol VIH VIL VOH Parameter TA = +25°C VCC (V) Typ TA = −40°C to+85°C Guaranteed Limits Minimum HIGH 4.5 1.5 2.0 2.0 Input Voltage 5.5 1.5 2.0 2.0 Maximum LOW 4.5 1.5 0.8 0.8 Input Voltage 5.5 1.5 0.8 0.8 Minimum HIGH 4.5 4.49 4.4 4.4 Output Voltage 5.5 5.49 5.4 5.4 3.86 3.76 Units V V Conditions VOUT = 0.1V or VCC − 0.1V VOUT = 0.1V or VCC − 0.1V V IOUT = −50 µA V IOH = −24 mA VIN = VILor VIH 4.5 5.5 VOL IOH = −24 mA (Note 2) 4.86 4.76 Maximum LOW 4.5 0.001 0.1 0.1 Output Voltage 5.5 0.001 0.1 0.1 4.5 0.36 0.44 5.5 0.36 0.44 5.5 ±0.5 ±5.0 µA 5.5 ±0.1 ±1.0 µA 1.5 mA 80.0 µA 75 mA VOLD = 1.65V Max −75 mA VOHD = 3.85V Min V IOUT = 50 µA VIN = VILor VIH IOZT Maximum I/O Leakage Current IIN Maximum Input Leakage Current ICCT Maximum ICC/Input ICC Max Quiescent Supply Current IOLD Minimum Dynamic IOHD Output Current (Note 3) 5.5 0.6 5.5 8.0 5.5 V IOL = 24 mA IOL = 24 mA (Note 2) VI = VIL, VIH VO = VCC, GND VI = VCC, GND VI = VCC − 2.1V VIN = VCC or GND Note 2: All outputs loaded; thresholds associated with output under test. Note 3: Maximum test duration 2.0 ms; one output loaded at a time. 3 www.fairchildsemi.com 74ACT16543 Absolute Maximum Ratings(Note 1) 74ACT16543 AC Electrical Characteristics Symbol Parameter VCC TA = +25°C (V) CL = 50 pF (Note 4) tPLH Propagation Delay tPHL Transparent Mode 5.0 TA = −40°C to +85°C CL = 50 pF Min Typ Max Min Max 3.8 5.9 8.3 3.0 9.0 3.5 5.5 7.9 2.6 8.5 Units ns An to Bnor Bn to An tPLH Propagation Delay tPHL LEBAn, LEABn 4.7 6.9 9.8 3.4 10.8 5.0 3.9 6.3 9.0 3.1 9.8 4.2 6.3 9.2 3.0 9.9 5.0 4.9 7.3 10.3 3.6 10.3 2.8 5.2 8.0 2.1 8.3 5.0 2.6 5.0 7.6 2.0 8.1 ns to An, Bn tPZH Output Enable Time tPZL OEBAn or OEABn to An or Bn ns CEBAn or CEABn to An or Bn tPHZ Output Disable Time tPLZ OEBAn or OEABn to An or Bn ns CEBAn or CEABn to An or Bn Note 4: Voltage Range 5.0 is 5.0V ± 0.5V. AC Operating Requirements Symbol Parameter VCC TA = +25°C TA = −40°C to +85°C (V) CL = 50 pF CL = 50 pF (Note 5) tS Setup Time, HIGH or LOW An or Bn to LEBAn or LEABn tH Hold Time, HIGH or LOW An or Bn to LEBAn or LEABn tW Latch Enable, B to A Pulse Width, LOW 5.0 3.0 3.0 ns 5.0 1.5 1.5 ns 5.0 4.0 4.0 ns Note 5: Voltage Range 5.0 is 5.0V ± 0.5V Capacitance Symbol Parameter Typ Units CIN Input Capacitance 4.5 pF VCC = 5.0V CPD Power Dissipation.Capacitance 95.0 pF VCC = 5.0V www.fairchildsemi.com Units Guaranteed Minimum 4 Conditions 74ACT16543 Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Thin Shrink Small Outline Package (SSOP), JEDEC MO-153, 6.1mm Wide Package Number MS56A 5 www.fairchildsemi.com 74ACT16543 16-Bit Registered Transceiver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD56 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6