74F153SJ

Revised September 2000 74F153 Dual 4-Input Multiplexer General Description The F153 is a high-speed dual 4-input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of data from four sources. The two buffered outputs present data in the true (non-inverted) form. In addition to multiplexer operation, the F153 can generate any two functions of three variables. Ordering Code: Order Number Package Number Package Description 74F153SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74F153SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F153PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 Fairchild Semiconductor Corporation DS009482 www.fairchildsemi.com 74F153 Dual 4-Input Multiplexer April 1988 74F153 Unit Loading/Fan Out Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL I0a–I3a Side A Data Inputs 1.0/1.0 20 µA/−0.6 mA I0b–I3b Side B Data Inputs 1.0/1.0 20 µA/−0.6 mA S0 , S1 Common Select Inputs 1.0/1.0 20 µA/−0.6 mA Ea Side A Enable Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA Eb Side B Enable Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA Za Side A Output 50/33.3 −1 mA/20 mA Zb Side B Output 50/33.3 −1 mA/20 mA Truth Table Functional Description Select Inputs Inputs (a or b) The F153 is a dual 4-input multiplexer. It can select two bits of data from up to four sources under the control of the common Select inputs (S0, S1). The two 4-input multiplexer circuits have individual active LOW Enables (Ea, Eb) which can be used to strobe the outputs independently. When the Enables (Ea, Eb) are HIGH, the corresponding outputs (Za, Zb) are forced LOW. The F153 is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels supplied to the two Select inputs. The logic equations for the outputs are as follows: Output S0 S1 E I0 I1 I2 I3 X X H X X X X L L L L L X X X L H Z L L L H X X X H L L X L X X L H L L X H X X H L H L X X L X L L H L X X H X H H H L X X X L L H H L X X X H H Za = Ea•(I0a•S1•S0 + I1a•S1•S0 + I2a•S1•S0 + I3a•S1•S0) Zb = Eb•(I0b•S1•S0 + I1b•S1•S0 + I2b•S1•S0 + I3b•S1•S0) The F153 can be used to move data from a group of registers to a common output bus. The particular register from which the data came would be determined by the state of the Select inputs. A less obvious application is as a function generator. The F153 can generate two functions of three variables. This is useful for implementing highly irregular random logic. H = HIGH Voltage Level L = LOW X = Immaterial Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Storage Temperature −65°C to +150°C Recommended Operating Conditions Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Current Applied to Output Note 2: Either voltage limit or current limit is sufficient to protect inputs. in LOW State (Max) twice the rated IOL (mA) DC Electrical Characteristics Symbol Parameter Min Typ Max 2.0 Units VCC Conditions VIH Input HIGH Voltage VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V Min VOH Output HIGH Voltage V Min 0.5 V Min IOL = 20 mA 10% VCC 2.5 5% VCC 2.7 V 10% VCC Recognized as a HIGH Signal Recognized as a LOW Signal IIN = −18 mA IOH = −1 mA IOH = −1 mA VOL Output LOW Voltage IIH Input HIGH Current 5.0 µA Max VIN = 2.7V IBVI Input HIGH Current Breakdown Test 7.0 µA Max VIN = 7.0V ICEX Output High Leakage Current 50 µA Max VOUT = VCC VID Input Leakage Test V 0.0 4.75 IID = 1.9 µA All Other Pins Grounded IOD Output Leakage Circuit Current 3.75 µA 0.0 VIOD = 150 mV IIL Input LOW Current −0.6 mA Max IOS Output Short-Circuit Current −150 mA Max VOUT = 0V ICCL Power Supply Current 20 mA Max VO = LOW All Other Pins Grounded −60 12 VIN = 0.5V AC Electrical Characteristics Symbol Parameter TA = +25°C TA = 0°C to +70°C VCC = +5.0V VCC = +5.0V CL = 50 pF CL = 50 pF Min Typ Max Min Max 4.5 8.1 10.5 4.5 12.0 tPLH Propagation Delay tPHL Sn to Zn 3.5 7.0 9.0 3.5 10.5 tPLH Propagation Delay 4.5 7.1 9.0 4.5 10.5 tPHL En to Zn 3.0 5.7 7.0 2.5 8.0 tPLH Propagation Delay 3.0 5.3 7.0 3.0 8.0 tPHL In to Zn 2.5 5.1 6.5 2.5 7.5 3 Units ns ns ns www.fairchildsemi.com 74F153 Absolute Maximum Ratings(Note 1) 74F153 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A www.fairchildsemi.com 4 74F153 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D 5 www.fairchildsemi.com 74F153 Dual 4-Input Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6