74F253SCX

Revised September 2000 74F253 Dual 4-Input Multiplexer with 3-STATE Outputs General Description Features The 74F253 is a dual 4-input multiplexer with 3-STATE outputs. It can select two bits of data from four sources using common select inputs. The output may be individually switched to a high impedance state with a HIGH on the respective Output Enable (OE) inputs, allowing the outputs to interface directly with bus oriented systems. ■ Multifunction capability ■ Non-inverting 3-STATE outputs Ordering Code: Order Number Package Number Package Description 74F253SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74F253SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F253PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 Fairchild Semiconductor Corporation DS009505 www.fairchildsemi.com 74F253 Dual 4-Input Multiplexer with 3-STATE Outputs April 1988 74F253 Unit Loading/Fan Out Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL I0a–I3a Side A Data Inputs 1.0/1.0 20 µA/−0.6 mA I0b–I3b Side B Data Inputs 1.0/1.0 20 µA/−0.6 mA S0–S1 Common Select Inputs 1.0/1.0 20 µA/−0.6 mA OEa Side A Output Enable Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA OEb Side B Output Enable Input (Active LOW) 1.0/1.0 20 µA/−0.6 mA Z a, Z b 3-STATE Outputs 150/40(33.3) −3 mA/24 mA (20 mA) Functional Description Truth Table This device contains two identical 4-input multiplexers with 3-STATE outputs. They select two bits from four sources selected by common Select inputs (S0, S1). The 4-input multiplexers have individual Output Enable (OEa, OEb) inputs which, when HIGH, force the outputs to a high impedance (High Z) state. This device is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels supplied to the two select inputs. The logic equations for the outputs are shown below: Select Za = OEa • (I0a • S1 • S0 + I1a • S1 • S0 + I2a • S1 • S0 + I3a • S1 • S0) Zb = OEb • (I0b • S1 • S0 + I1b • S1 • S0 + I2b • S1 • S0 + I3b • S1 • S0) If the outputs of 3-STATE devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure that Output Enable signals to 3-STATE devices whose outputs are tied together are designed so that there is no overlap. Output Data Inputs Inputs Enable S0 S1 I0 I1 I2 I3 OE Z X X X X X X H Z L L L X X X L L L L H X X X L H H L X L X X L L H L X H X X L H L H X X L X L L L H X X H X L H H H X X X L L L H H X X X H L H Address inputs S0 and S1 are common to both sections. H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Output Recommended Operating Conditions Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Free Air Ambient Temperature Junction Temperature under Bias −55°C to +150°C Supply Voltage 0°C to +70°C +4.5V to +5.5V −0.5V to +7.0V VCC Pin Potential to Ground Pin Input Voltage (Note 2) −0.5V to +7.0V Input Current (Note 2) −30 mA to +5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output −0.5V to VCC 3-STATE Output −0.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Current Applied to Output in LOW State (Max) Note 2: Either voltage limit or current limit is sufficient to protect inputs. twice the rated IOL (mA) ESD Last Passing Voltage (Min) 4000V DC Electrical Characteristics Symbol Parameter Min Typ Max VCC VIL Input LOW Voltage 0.8 V VCD Input Clamp Diode Voltage −1.2 V Min V Min 0.5 V Min IOL = 24 mA 5.0 µA Max VIN = 2.7V 7.0 µA Max VIN = 7.0V 50 µA Max VOUT = VCC V 0.0 3.75 µA 0.0 −0.6 mA Max VIN = 0.5V 50 µA Max VOUT = 2.7V −50 µA Max VOUT = 0.5V mA Max 500 µA 0.0V VOUT = VCC Output HIGH 10% VCC 2.5 Voltage 10% VCC 2.4 5% VCC 2.7 5% VCC 2.7 VOL Output LOW Voltage IIH Input HIGH V Conditions Input HIGH Voltage VOH 2.0 Units VIH Input HIGH Current Output HIGH Leakage Current VID Input Leakage Test IOD 4.75 Output Leakage Circuit Current IIL Input LOW Current IOZH Output Leakage Current IOZL Output Leakage Current IOS Output Short-Circuit Current IOH = −3 mA IOH = −1 mA IOH = −3 mA 10% VCC Breakdown Test ICEX Recognized as a LOW Signal IIN = −18 mA IOH = −1 mA Current IBVI Recognized as a HIGH Signal −60 −150 −100 −225 IID = 1.9 µA All Other Pins Grounded VIOD = 150 mV All Other Pins Grounded VOUT = 0V VOUT = 0V IZZ Bus Drainage Test ICCH Power Supply Current 11.5 16 mA Max VO = HIGH ICCL Power Supply Current 16 23 mA Max VO = LOW ICCZ Power Supply Current 16 23 mA Max VO = HIGH Z 3 www.fairchildsemi.com 74F253 Absolute Maximum Ratings(Note 1) 74F253 AC Electrical Characteristics Symbol Parameter TA = +25°C TA = −55°C to +125°C TA = 0°C to +70°C VCC = 5.0V VCC = 5.0V VCC = 5.0V CL = 50 pF CL = 50 pF CL = 50 pF Min Typ Max Min Max Min Max tPLH Propagation Delay 4.5 8.5 11.5 3.5 15.0 4.5 13.0 tPHL Sn to Zn 3.0 6.5 9.0 2.5 11.0 3.0 10.0 tPLH Propagation Delay 3.0 5.5 7.0 2.5 9.0 3.0 8.0 tPHL In to Zn 2.5 4.5 6.0 2.5 8.0 2.5 7.0 tPZH Output Enable Time 3.0 6.0 8.0 2.5 10.0 3.0 9.0 3.0 6.0 8.0 2.5 10.0 3.0 9.0 tPZL tPHZ Output Disable Time tPLZ www.fairchildsemi.com 2.0 3.7 5.0 2.0 6.5 2.0 6.0 2.0 4.4 6.0 2.0 8.0 2.0 7.0 4 Units ns ns ns 74F253 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 5 www.fairchildsemi.com 74F253 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D www.fairchildsemi.com 6 74F253 Dual 4-Input Multiplexer with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com