74LCX112SJX

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Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Revised February 2001 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX112 is a dual J-K flip-flop. Each flip-flop has independent J, K, PRESET, CLEAR, and CLOCK inputs with Q, Q outputs. These devices are edge sensitive and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low logic level on the corresponding input. LCX devices are designed for low voltage (3.3V or 2.5) operation with the added capability of interfacing to a 5V signal environment. ■ 5V tolerant inputs The 74LCX112 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. ■ ESD performance: ■ 2.3V–3.6V VCC specifications provided ■ 7.5 ns tPD max (VCC = 3.3V), 10 µA ICC max ■ Power down high impedance inputs and outputs ■ ±24 mA output drive (VCC = 3.0V) ■ Implements patented noise/EMI reduction circuitry ■ Latch-up performance exceeds 500 mA Human body model > 2000V Machine model > 2000V Ordering Code: Order Number Package Number 74LCX112M 74LCX112SJ 74LCX112MTC Package Description M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description J1 , J2 , K 1 , K 2 Data Inputs CP1, CP2 Clock Pulse Inputs (Active Falling Edge) CD1, CD2 Direct Clear Inputs (Active LOW) SD1, SD2 Direct Set Inputs (Active LOW) Q1, Q2, Q1, Q2 Outputs © 2001 Fairchild Semiconductor Corporation DS012424 www.fairchildsemi.com 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs June 1998 74LCX112 Truth Table (Each half) Inputs Outputs SD CD CP J K Q Q L H X X X H L H L X X X L H L L X X X H H H H h h QO QO H H H H H H H H     H l h L H h l H L l l QO QO X X QO QO H(h) = HIGH Voltage Level L(l) = LOW Voltage Level X = Immaterial = HIGH-to-LOW Clock Transition QO(QO) = Before HIGH-to-LOW Transition of Clock Lower case letters indicate the state of the referenced input or output one setup time prior to the HIGH-to-LOW clock transition.  Logic Diagram www.fairchildsemi.com 2 Symbol Parameter Value Conditions VCC Supply Voltage −0.5 to +7.0 VI DC Input Voltage −0.5 to +7.0 VO DC Output Voltage IIK DC Input Diode Current −50 VI < GND IOK DC Output Diode Current −50 VO < GND +50 VO > VCC Units V V −0.5 to VCC + 0.5 Output in HIGH or LOW State (Note 2) V mA mA IO DC Output Source/Sink Current ±50 mA ICC DC Supple Current per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature −65 to 150 °C Recommended Operating Conditions (Note 3) Symbol VCC Parameter Supply Voltage Min Max Operating 2.0 3.6 Data Retention 1.5 3.6 VI Input Voltage VO Output Voltage HIGH or LOW State IOH/IOL Output Current VCC = 3.0V − 3.6V ±24 VCC = 2.7V − 3.0V ±12 VCC = 2.3V − 2.7V ±8 TA Free-Air Operating Temperature ∆t/∆V Input Edge Rate, VIN = 0.8V−2.0V, VCC = 3.0V Units V 0 5.5 V 0 VCC V mA −40 85 °C 0 10 ns/V Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: IO Absolute Maximum rating must be observed. Note 3: Unused Inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter Conditions VCC (V) VIH VIL VOH HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage IOH = −100µA LOW Level Output Voltage Min 2.3 − 2.7 1.7 2.7 − 3.6 2.0 0.7 0.8 VCC - 0.2 2.3 1.8 IOH = −12 mA 2.7 2.2 IOH = −18 mA 3.0 2.4 3.0 2.2 IOL = 100µA V 2.3 − 2.7 2.3 − 3.6 2.3 − 3.6 Units Max 2.7 − 3.6 IOH = -8 mA IOH = −24 mA VOL TA = 40°C to +85°C V 0.7 V 0.6 IOL = 8mA 2.3 0.2 IOL = 12 mA 2.7 0.4 IOL = 16 mA 3.0 0.4 V IOL = 24 mA 3.0 0.55 II Input Leakage Current 0 ≤ II ≤ 5.5V 2.3 − 3.6 ±5.0 µA IOFF Power-Off Leakage Current VI or VO = 5.5V 0 10 µA ICC Quiescent Supply Current VI = V CC or GND 2.3 − 3.6 10 µA 3.6V ≤ VI ≤ 5.5V 2.3 − 3.6 ±10 µA VIH = VCC −0.6V 2.3 − 3.6 500 µA ∆ICC Increase in ICC per Input 3 www.fairchildsemi.com 74LCX112 Absolute Maximum Ratings(Note 1) 74LCX112 AC Electrical Characteristics TA = 40°C to 85°C, RL = 500Ω Symbol Parameters VCC = 3.3V ± 0.3V VCC = 2.7V VCC = 2.5V ± 0.2V CL=50 pF CL = 50 pF CL=30 pF Min Max Min Max Min Max fMAX Maximum Clock Frequency 150 tPHL Propagation Delay 1.5 7.5 1.5 8.0 1.5 9.0 tPLH CPn to Qn or Qn 1.5 7.5 1.5 8.0 1.5 9.0 150 Units 150 MHz ns tPHL Propagation Delay 1.5 7.0 1.5 8.0 1.5 8.4 tPLH CDn or SDn to Qn or Qn 1.5 7.0 1.7 8.0 1.5 8.4 ns tS Setup Time 2.5 2.5 4.0 ns tH Hold Time 1.5 1.5 2.0 ns tW Pulse Width CP 3.3 3.3 4.0 ns tW Pulse Width (CD, SD) 3.3 3.3 4.0 ns tREC Recovery Time 2.0 2.5 4.5 ns tOSHL Output to Output Skew 1.0 tOSLH (Note 4) 1.0 ns Note 4: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH). Dynamic Switching Characteristics Symbol VOLP VOLV VCC TA = 25°C (V) Typical CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 0.8 CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 0.6 CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 −0.8 CL = 30 pF, VIH = 2.5V, VIL = 0V 2.5 −0.6 Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL Conditions Units V V Capacitance Typical Units CIN Symbol Input Capacitance Parameter VCC = Open, VI = 0V or VCC 7 pF COUT Output Capacitance VCC = 3.3V, VI = 0V or VCC 8 pF CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10 MHz 25 pF www.fairchildsemi.com Conditions 4 74LCX112 AC Loading and Waveforms Generic for LCX Family FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test Switch tPLH, tPHL Open tPZL, tPLZ 6V at VCC = 3.3 ± 0.3V VCC x 2 at VCC = 2.5 ± 0.2V tPZH,tPHZ GND Waveform for Inverting and Non-Inverting Functions 3-STATE Output Low Enable and Disable Times for Logic Propagation Delay, Pulse Width and trec Waveforms Setup Time, Hold TIme and Recovery TIme for Logic 3-STATE Output High Enable and Disable TImes for Logic trise and tfall FIGURE 2. Waveforms (Input Pulse Characteristics; f=1MHz, tr=tf=3ns) Symbol VCC 3.3V ± 0.3V 2.7V 2.5V ± 0.2V Vmi 1.5V 1.5V VCC/2 Vmo 1.5V 1.5V VCC/2 Vx VOL + 0.3V VOL + 0.3V VOL + 0.15V Vy VOH − 0.3V VOH − 0.3V VOH − 0.15V 5 www.fairchildsemi.com 74LCX112 Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 74LCX112 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 7 www.fairchildsemi.com 74LCX112 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D www.fairchildsemi.com 8 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 9 www.fairchildsemi.com 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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