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74LCX157
Low Voltage Quad 2-Input Multiplexer
with 5 V Tolerant Inputs
Features
General Description
•
•
•
•
•
•
•
•
The LCX157 is a high-speed quad 2-input multiplexer.
Four bits of data from two sources can be selected using
the common Select and Enable inputs. The four outputs
present the selected data in the true (noninverted) form.
The LCX157 can also be used as a function generator.
The 74LCX157 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.
5 V Tolerant Inputs
2.3 V – 3.6 V, VCC Specifications Provided
5.8 ns tPD max. (VCC = 3.3 V), 10 μA ICC max.
Power Down High Impedance Inputs and Outputs
±24 mA Output Drive (VCC = 3.0 V)
Implements Patented Noise/EMI Reduction Circuitry
Latch-Up Performance Exceeds 500 mA
ESD Performance:
Human Body Model > 2000 V
Machine Model > 200 V
Ordering Information
Part Number
Top Mark
Package
Packing Method
74LCX157M
LCX157
SOIC 16L
Rail
74LCX157MX
LCX157
SOIC 16L
Tape and Reel
74LCX157MTC
LCX157
TSSOP 16L
Rail
74LCX157MTCX
LCX157
TSSOP 16L
Tape and Reel
© 1995 Fairchild Semiconductor Corporation
74LCX157 Rev. 1.3
www.fairchildsemi.com
74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs
April 2015
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
Description
I0a–I0d
Source 0 Data Inputs
I1a–I1d
Source 1 Data Inputs
E
Enable Input
S
Select Input
Za–Zd
Outputs
Truth Table
Functional Description
The LCX157 is a quad 2-input multiplexer. It selects four
bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active-LOW.
When E is HIGH, all of the outputs (Z) are forced LOW
regardless of all other inputs. The LCX157 is the logic
implementation of a 4-pole, 2-position switch where the
position of the switch is determined by the logic levels
supplied to the Select input. The logic equations for the
outputs are shown below:
Inputs
Za = E • (I1a • S + I0a • S)
Zb = E • (I1b • S + I0b • S)
Zc = E • (I1c • S + I0c • S)
Zd = E • (I1d • S + I0d • S)
Outputs
E
S
I0
I1
Z
H
X
X
X
L
L
H
X
L
L
L
H
X
H
H
L
L
L
X
L
L
L
H
X
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
A common use of the LCX157 is the moving of data from
two groups of registers to four common output busses.
The particular register from which the data comes is
determined by the state of the Select input. A less obvious use is as a function generator. The LCX157 can generate any four of the sixteen different functions of two
variables with one variable common. This is useful for
implementing gating functions.
© 1995 Fairchild Semiconductor Corporation
74LCX157 Rev. 1.3
www.fairchildsemi.com
2
74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs
Logic Symbols
Note:
1. Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
Absolute Maximum Ratings(2)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only.
Symbol
VCC
VI
Parameter
Value
Supply Voltage
-0.5 to +7.0
DC Input Voltage
-0.5 to +7.0
-0.5 to VCC+0.5
Conditions
Unit
V
V
Output in HIGH or LOW
State(3)
VO
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current per Supply Pin
±100
mA
IGND
DC Ground Current per Ground Pin
±100
mA
TSTG
Storage Temperature
-65 to +150
°C
-50
VI < GND
-50
VO < GND
+50
VO > VCC
V
mA
mA
Notes:
2. The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are
not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the
conditions for actual device operation.
3. IO Absolute Maximum Rating must be observed.
© 1995 Fairchild Semiconductor Corporation
74LCX157 Rev. 1.3
www.fairchildsemi.com
3
74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs
Logic Diagram(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
VCC
Supply Voltage
VIN
Input Voltage
VOUT
IOH/IOL
TA
Δt/ΔV
Operating
Output Voltage
HIGH or LOW State
Output Current
Min.
Max.
Unit
2.0
3.6
V
0
5.5
V
0
VCC
V
VCC = 3.0 V - 3.6 V
±24
VCC = 2.7 V - 3.0 V
±12
VCC = 2.3 V - 2.7 V
±8
Free-Air Operating Temperature
Input Edge Rate, VIN = 0.8 V - 2.0 V, VCC = 3.0 V
mA
-40
85
°C
0
10
ns/V
Note:
4. Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
VIH
HIGH Level Input Voltage
VIL
LOW Level Input Voltage
Conditions
IOH = -100 μA
VOL
II
TA = -40 to +85°C
Min.
2.3 - 2.7
1.7
2.7 - 3.6
2.0
2.7 - 3.6
0.8
VCC - 0.2
1.8
HIGH Level Output Voltage IOH = -12 mA
IOH = -18 mA
2.7
2.2
3.0
2.4
IOH = -24 mA
3.0
2.2
IOL = 100 μA
2.3 - 3.6
Input Leakage Current
V
V
0.2
IOL = 8 mA
2.3
0.6
IOL = 12 mA
2.7
0.4
IOL = 16 mA
3.0
0.4
IOL = 24 mA
3.0
0.55
0 ≤ VI ≤ 5.5 V
2.3 - 3.6
±5.0
μA
0
10
μA
IOFF
Power-Off Leakage Current VI or VO = 5.5 V
ICC
VI = VCC or GND
2.3 - 3.6
10
Quiescent Supply Current
3.6 V ≤ VI ≤ 5.5 V
2.3 - 3.6
±10
ΔICC
Increase in ICC per Input
VIH = VCC - 0.6 V
2.3 - 3.6
500
© 1995 Fairchild Semiconductor Corporation
74LCX157 Rev. 1.3
Unit
V
0.7
2.3
LOW Level Output Voltage
Max.
2.3 - 2.7
2.3 - 3.6
IOH = -8 mA
VOH
VCC (V)
V
μA
μA
www.fairchildsemi.com
4
74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs
Recommended Operating Conditions(4)
TA = -40 to +85°C, RL = 500 Ω
Symbol
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tOSHL
tOSLH
Parameter
VCC = 3.3 V ± 0.3 V
VCC = 2.7 V
VCC = 2.5 V ± 0.2 V
CL = 50 pF
CL = 50 pF
CL = 30 pF
Min.
Max.
Min.
Max.
Min.
Max.
Propagation Delay
S -> Zn
1.5
7.0
1.5
8.0
1.5
8.4
1.5
7.0
1.5
8.0
1.5
8.4
Propagation Delay
E -> Zn
1.5
7.0
1.5
8.0
1.5
8.4
1.5
7.0
1.5
8.0
1.5
8.4
Propagation Delay
In -> Zn
1.5
5.8
1.5
6.3
1.5
7.0
1.5
5.8
1.5
6.3
1.5
7.0
1.0
Output to Output Skew(5)
Unit
ns
ns
ns
ns
1.0
Note:
5. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate
outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-toLOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.
Dynamic Switching Characteristics
Symbol
Parameter
VOLP
Quiet Output Dynamic Peak VOL
VOLV
Quiet Output Dynamic Valley VOL
TA = 25°C
Conditions
VCC (V)
CL = 50 pF, VIH = 3.3 V, VIL = 0 V
3.3
0.8
CL = 30 pF, VIH = 2.5 V, VIL = 0 V
2.5
0.6
CL = 50 pF, VIH = 3.3 V, VIL = 0 V
3.3
-0.8
CL = 30 pF, VIH = 2.5 V, VIL = 0 V
2.5
-0.6
Typical
Unit
V
V
Capacitance
Symbol
CIN
Parameter
Conditions
Typical
Unit
Input Capacitance
VCC = Open, VI = 0 V or VCC
7
pF
COUT
Output Capacitance
VCC = 3.3 V, VI = 0 V or VCC
8
pF
CPD
Power Dissipation Capacitance VCC = 3.3 V, VI = 0 V or VCC, f = 10 MHz
25
pF
© 1995 Fairchild Semiconductor Corporation
74LCX157 Rev. 1.3
www.fairchildsemi.com
5
74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs
AC Electrical Characteristics
Figure 1. AC Test Circuit (CL includes probe and jig capacitance)
Test
Switch
tPLH, tPHL
Open
tPZL, tPLZ
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
tPZH, tPHZ
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output Low Enable and
Disable Times for Logic
Propagation Delay. Pulse Width and trec Waveforms
Setup Time, Hold Time and Recovery Time for Logic
3-STATE Output High Enable and
Disable Times for Logic
trise and tfall
Figure 2. Waveforms
(Input Characteristics; f = 1 MHz, tr = tf = 3 ns)
Symbol
VCC
3.3V ± 0.3V
2.7V
2.5V ± 0.2V
VCC/2
Vmi
1.5V
1.5V
Vmo
1.5V
1.5V
VCC/2
Vx
VOL + 0.3V
VOL + 0.3V
VOL + 0.15V
Vy
VOH − 0.3V
VOH − 0.3V
VOH − 0.15V
© 1995 Fairchild Semiconductor Corporation
74LCX157 Rev. 1.3
www.fairchildsemi.com
6
74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs
AC Loading and Waveforms Generic for LCX Family
74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs
Schematic Diagram Generic for LCX Family
© 1995 Fairchild Semiconductor Corporation
74LCX157 Rev. 1.3
www.fairchildsemi.com
7
74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs
Physical Dimensions
10.00
9.80
A
8.89
16
9
B
4.00
3.80
6.00
PIN ONE
INDICATOR
1.75
1
5.6
8
0.51
0.35
1.27
(0.30)
0.25
M
1.27
C B A
0.65
LAND PATTERN RECOMMENDATION
1.75 MAX
1.50
1.25
SEE DETAIL A
0.25
0.10
C
0.25
0.19
0.10 C
0.50
0.25 X 45°
NOTES: UNLESS OTHERWISE SPECIFIED
(R0.10)
GAGE PLANE
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AC, ISSUE C.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD
FLASH AND TIE BAR PROTRUSIONS
D) CONFORMS TO ASME Y14.5M-1994
E) LANDPATTERN STANDARD: SOIC127P600X175-16AM
F) DRAWING FILE NAME: M16AREV12.
(R0.10)
0.36
8°
0°
SEATING PLANE
0.90
0.50
(1.04)
DETAIL A
SCALE: 2:1
Figure 3. 16-LEAD, SOIC, JEDEC MS-012, 0.150 INCH, NARROW BODY
© 1995 Fairchild Semiconductor Corporation
74LCX157 Rev. 1.3
www.fairchildsemi.com
8
5.00±0.10
4.55
5.90
4.45 7.35
0.65
4.4±0.1
1.45
5.00
0.11
12°
MTC16rev4
Figure 4. 16-LEAD, TSSOP, JEDEC MO-153, 4.4 MM WIDE
© 1995 Fairchild Semiconductor Corporation
74LCX157 Rev. 1.3
www.fairchildsemi.com
9
74LCX157 — Low Voltage Quad 2-Input Multiplexer with 5 V Tolerant Inputs
Physical Dimensions (Continued)
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