74LCX86MTCX

Revised February 2005 74LCX86 Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs General Description Features The LCX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. ■ 5V tolerant inputs The 74LCX86 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. ■ 2.3V–3.6V VCC specifications provided ■ 6.5 ns tPD max (VCC 3.3V), 10 PA ICC max ■ Power down high impedance inputs and outputs ■ r24 mA output drive (VCC 3.0V) ■ Implements patented noise/EMI reduction circuitry ■ Latch-up performance exceeds 500 mA ■ ESD performance: Machine model ! 2000V Human model ! 200V Ordering Code: Order Number Package Number 74LCX86M Package Description M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX86SJ M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX86MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74LCX86MTCX_NL (Note 1) MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions © 2005 Fairchild Semiconductor Corporation Pin Names Description A0–A3 Inputs B0–B3 Inputs O0–O3 Outputs DS012415 www.fairchildsemi.com 74LCX86 Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs March 1995 74LCX86 Absolute Maximum Ratings(Note 2) Symbol Parameter VCC Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current Value IO DC Output Source/Sink Current ICC DC Supply Current per Supply Pin IGND DC Ground Current per Ground Pin TSTG Storage Temperature Conditions 0.5 to 7.0 0.5 to 7.0 0.5 to VCC  0.5 50 50 50 r50 r100 r100 65 to 150 Units V V Output in HIGH or LOW State (Note 3) VI  GND V mA VO  GND mA VO ! VCC mA mA mA qC Recommended Operating Conditions (Note 4) Symbol VCC Parameter Min Max Operating 2.0 3.6 Data Retention 1.5 3.6 Supply Voltage VI Input Voltage VO Output Voltage IOH/IOL Output Current HIGH or LOW State TA Free-Air Operating Temperature 't/'V Input Edge Rate, VIN 0.8V–2.0V, VCC VCC 3.0V  3.6V VCC 2.7V  3.0V VCC 2.3V  2.7V Units V 0 5.5 V 0 VCC V r24 r12 r8 mA 40 85 qC 0 10 ns/V 3.0V Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 3: IO Absolute Maximum Rating must be observed. Note 4: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH VIL VOH Parameter Conditions HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Voltage IOH 100PA IOH = -8 mA VOL LOW Level Output Voltage 2.3  2.7 1.7 2.7  3.6 2.0 0.7 0.8 VCC - 0.2 2.3 1.8 2.2 IOH 18 mA 3.0 2.4 3.0 2.2 IOH 24 mA IOL 100PA V 2.3  2.7 2.3  3.6 2.3  3.6 Units Max 2.7  3.6 2.7 V V 0.2 IOL = 8mA 2.3 0.6 IOL 12 mA 2.7 0.4 IOL 16 mA 3.0 0.4 IOL 24 mA V 3.0 0.55 2.3  3.6 r5.0 PA 0 10 PA VCC or GND 2.3  3.6 10 3.6V d VI d 5.5V 2.3  3.6 r10 VCC 0.6V 2.3  3.6 500 0 d VI d 5.5V IOFF Power-Off Leakage Current VI or VO ICC Quiescent Supply Current VI www.fairchildsemi.com 40qC to 85qC Min 12 mA Input Leakage Current Increase in ICC per Input TA (V) IOH II 'ICC VCC VIH 5.5V 2 PA PA TA Symbol Parameter VCC CL tPHL Propagation Delay tPLH tOSHL 40qC to 85qC, RL 3.3V r 0.3V VCC 50 pF CL 500: 2.7V 50 pF VCC CL 2.5V r 0.2V Min Max Min Max Min 1.5 6.5 1.5 7.0 1.5 7.8 1.5 6.5 1.5 7.0 1.5 7.8 Output to Output Skew (Note 5) Max 1.0 tOSLH Units 30 pF ns ns 1.0 Note 5: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Dynamic Switching Characteristics Symbol VOLP VOLV Parameter Quiet Output Dynamic Peak VOL Quiet Output Dynamic Valley VOL VCC Conditions TA 25qC (V) Typical CL 50 pF, VIH 3.3V, VIL 0V 3.3 0.8 CL 30 pF, VIH 2.5V, VIL 0V 2.5 0.6 CL 50 pF, VIH 3.3V, VIL 0V 3.3 0.8 CL 30 pF, VIH 2.5V, VIL 0V 2.5 0.6 Units V V Capacitance Symbol Parameter Conditions CIN Input Capacitance VCC Open, VI COUT Output Capacitance VCC 3.3V, VI 0V or VCC CPD Power Dissipation Capacitance VCC 3.3V, VI 0V or VCC, f 3 0V or VCC 10 MHz Typical Units 7 pF 8 pF 25 pF www.fairchildsemi.com 74LCX86 AC Electrical Characteristics 74LCX86 AC Loading and Waveforms Generic for LCX Family FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) Test Switch tPLH, tPHL Open tPZL, tPLZ 6V at VCC 3.3 r 0.3V VCC x 2 at VCC 2.5 r 0.2V tPZH,tPHZ GND Waveform for Inverting and Non-Inverting Functions 3-STATE Output Low Enable and Disable Times for Logic Propagation Delay, Pulse Width and trec Waveforms Setup Time, Hold TIme and Recovery TIme for Logic 3-STATE Output High Enable and Disable TImes for Logic trise and tfall FIGURE 2. Waveforms (Input Pulse Characteristics; f = 1MHz, tr = tf = 3ns) Symbol www.fairchildsemi.com VCC 3.3V r 0.3V 2.7V 2.5V r 0.2V Vmi 1.5V 1.5V VCC/2 Vmo 1.5V 1.5V VCC/2 Vx VOL  0.3V VOL  0.3V VOL  0.15V Vy VOH  0.3V VOH  0.3V VOH  0.15V 4 74LCX86 Schematic Diagram Generic for LCX Family 5 www.fairchildsemi.com 74LCX86 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 6 74LCX86 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 7 www.fairchildsemi.com 74LCX86 Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8