0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
74LVXU04

74LVXU04

  • 厂商:

    ONSEMI(安森美)

  • 封装:

  • 描述:

    74LVXU04 - Hex Inverter(Unbuffered) - ON Semiconductor

  • 数据手册
  • 价格&库存
74LVXU04 数据手册
MC74LVXU04 Hex Inverter (Unbuffered) The MC74LVX04 is an advanced high speed CMOS unbuffered hex inverter. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. Features http://onsemi.com MARKING DIAGRAMS 14 14 1 SOIC−14 D SUFFIX CASE 751A 1 LVXU04 AWLYWW • • • • • • • High Speed: tPD = 4.1 ns (Typ) at VCC = 3.3 V Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C Power Down Protection Provided on Inputs Balanced Propagation Delays Low Noise: VOLP = 0.5 V (Max) Pin and Function Compatible with Other Standard Logic Families Pb−Free Packages are Available* 14 14 1 TSSOP−14 DT SUFFIX CASE 948G 1 LVX U04 ALYW 14 SOEIAJ−14 M SUFFIX CASE 965 1 1 74LVXU04 ALYW 14 A WL or L Y WW or W = = = = Assembly Location Wafer Lot Year Work Week ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2005 1 March, 2005 − Rev. 1 Publication Order Number: MC74LVXU04/D MC74LVXU04 VCC 14 A5 13 O5 12 A4 11 O4 10 A3 9 O3 8 A0 A1 A2 A3 1 A0 2 O0 3 A1 4 O1 5 A2 6 O2 7 GND A4 A5 1 3 5 13 11 9 2 4 6 8 10 12 O0 O1 O2 O3 O4 O5 14−Lead Pinout (Top View) PIN NAMES Pins An On Function Data Inputs Outputs Figure 1. Logic Diagram FUNCTION TABLE An L H On H L ORDERING INFORMATION Device MC74LVXU04D MC74LVXU04DG MC74LVXU04DR2 MC74LVXU04DR2G MC74LVXU04DT MC74LVXU04DTR2 MC74LVXU04M MC74LVXU04MG MC74LVXU04MEL MC74LVXU04MELG Package SOIC−14 SOIC−14 (Pb−Free) SOIC−14 SOIC−14 (Pb−Free) TSSOP−14* TSSOP−14* SOEIAJ−14 SOEIAJ−14 (Pb−Free) SOEIAJ−14 SOEIAJ−14 (Pb−Free) Shipping† 55 Units / Rail 55 Units / Rail 2500 Tape & Reel 2500 Tape & Reel 96 Units / Rail 2500 Tape & Reel 50 Units / Rail 50 Units / Rail 2000 Tape & Reel 2000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. http://onsemi.com 2 MC74LVXU04 MAXIMUM RATINGS Symbol VCC VIN VOUT IIK IOK IOUT ICC TSTG TL TJ qJA PD MSL FR VESD DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current per Supply Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature under Bias Thermal Resistance Power Dissipation in Still Air at 85_C Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 30% − 35% Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) Above VCC and Below GND at 85_C (Note 4) SOIC TSSOP SOIC TSSOP VI < GND VO < GND Parameter Value *0.5 to )7.0 *0.5 to )7.0 *0.5 to VCC )0.5 *20 $20 $25 $50 *65 to )150 260 )150 250 250 Level 1 UL 94−V0 @ 0.125 in > 2000 > 200 2000 $300 V Unit V V V mA mA mA mA _C _C _C _C/W mW ILatchup Latchup Performance mA Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Tested to EIA/JESD22−A114−A. 2. Tested to EIA/JESD22−A115−A. 3. Tested to JESD22−C101−A. 4. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO TA Dt/DV Supply Voltage Input Voltage Output Voltage Operating Free−Air Temperature Input Transition Rise or Fall Rate VCC = 3.0 V $0.3 V (Note 5) (HIGH or LOW State) Parameter Min 2.0 0 0 *40 0 Max 3.6 5.5 VCC )85 100 Unit V V V _C ns/V 5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level. http://onsemi.com 3 MC74LVXU04 ÎÎÎ Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎÎ Î Î ÎÎÎ Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎÎ ÎÎÎ Î ÎÎ ÎÎÎ Î Î Î Î Î Î ÎÎÎ Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎÎ Î Î Î Î Î ÎÎ ÎÎÎ Î ÎÎ ÎÎÎ Î Î Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎÎ Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î Î Î ÎÎ Î Î Î Î Î ÎÎ Î Î Î Î Î ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎ Î Î Î Î Î ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎ Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎ Î Î Î Î Î ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎ Î Î Î Î Î ÎÎ Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î Î Î ÎÎ Î ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î ÎÎÎ Î Î Î Î ÎÎ ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ DC ELECTRICAL CHARACTERISTICS Symbol VIH Parameter Test Conditions VCC V 2.0 3.0 3.6 2.0 3.0 3.6 2.0 3.0 3.0 2.0 3.0 3.0 3.6 3.6 TA = 25°C Typ TA = −40 to 85°C Min 1.5 2.0 2.4 Max Min 1.5 2.0 2.4 Max Unit V High−Level Input Voltage VIL Low−Level Input Voltage 0.5 0.8 0.8 0.5 0.8 0.8 V VOH High−Level Output Voltage (Vin = VIH or VIL) Low−Level Output Voltage (Vin = VIH or VIL) Input Leakage Current IOH = −50 mA IOH = −50 mA IOH = −4 mA 1.9 2.9 2.58 2.0 3.0 0.0 0.0 1.9 2.9 2.48 V VOL IOL = 50 mA IOL = 50 mA IOL = 4 mA 0.1 0.1 0.36 ±0.1 2.0 0.1 0.1 0.44 ±1.0 V Iin Vin = 5.5 V or GND Vin = VCC or GND mA mA ICC Quiescent Supply Current 20.0 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns) Symbol tPLH, tPHL Parameter TA = 25°C Typ 5.4 7.9 4.1 6.6 TA = −40 to 85°C Min 1.0 1.0 1.0 1.0 Max 12.5 16.0 7.5 11.0 1.5 1.5 Test Conditions Min Max Unit ns Propagation Delay, Input to Output VCC = 2.7V CL = 15 pF CL = 50 pF 10.1 13.6 6.2 9.7 1.5 1.5 VCC = 3.3 ± 0.3V CL = 15 pF CL = 50 pF CL = 50 pF CL = 50 pF tOSHL tOSLH Output−to−Output Skew (Note 6) VCC = 2.7V VCC = 3.3 ±0.3V ns 6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter guaranteed by design. CAPACITIVE CHARACTERISTICS Symbol Cin CPD TA = 25°C Typ 4 TA = −40 to 85°C Min Max 10 Parameter Min Max 10 Unit pF pF Input Capacitance Power Dissipation Capacitance (Note 7) 18 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC / 6 (per buffer). CPD is used to determine the no−load dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC. NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V, Measured in SOIC Package) Symbol VOLP VOLV VIHD VILD Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage VCC GND tPLH O 50% VCC tPHL DEVICE UNDER TEST Characteristic TA = 25°C Typ 0.3 −0.3 Max 0.5 −0.5 2.0 0.8 Unit V V V V A TEST POINT OUTPUT CL* 50% *Includes all probe and jig capacitance Figure 2. Switching Waveforms http://onsemi.com 4 Figure 3. Test Circuit MC74LVXU04 PACKAGE DIMENSIONS SOIC−14 D SUFFIX CASE 751A−03 ISSUE G −A− 14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 −B− P 7 PL 0.25 (0.010) M B M 1 7 G C R X 45 _ F −T− SEATING PLANE D 14 PL 0.25 (0.010) K M M S J TB A S DIM A B C D F G J K M P R TSSOP−14 DT SUFFIX CASE 948G−01 ISSUE A 14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. MILLIMETERS INCHES MIN MAX MIN MAX 4.90 5.10 0.193 0.200 4.30 4.50 0.169 0.177 −−− 1.20 −−− 0.047 0.05 0.15 0.002 0.006 0.50 0.75 0.020 0.030 0.65 BSC 0.026 BSC 0.50 0.60 0.020 0.024 0.09 0.20 0.004 0.008 0.09 0.16 0.004 0.006 0.19 0.30 0.007 0.012 0.19 0.25 0.007 0.010 6.40 BSC 0.252 BSC 0_ 8_ 0_ 8_ 0.10 (0.004) 0.15 (0.006) T U S M TU S V S N 2X L/2 14 8 0.25 (0.010) M L PIN 1 IDENT. 1 7 B −U− N F DETAIL E K K1 J J1 0.15 (0.006) T U S A −V− SECTION N−N −W− C 0.10 (0.004) −T− SEATING PLANE D G H DETAIL E DIM A B C D F G H J J1 K K1 L M http://onsemi.com 5 ÉÉÉ ÇÇÇ ÉÉÉ ÇÇÇ MC74LVXU04 PACKAGE DIMENSIONS SOEIAJ−14 M SUFFIX CASE 965−01 ISSUE O 14 8 LE Q1 E HE M_ L DETAIL P 1 7 Z D e A VIEW P c NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX −−− 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 −−− 1.42 INCHES MIN MAX −−− 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 −−− 0.056 b 0.13 (0.005) M A1 0.10 (0.004) ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 6 MC74LVXU04/D
74LVXU04 价格&库存

很抱歉,暂时无法提供与“74LVXU04”相匹配的价格&库存,您可以联系我们找货

免费人工找货