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74VCX163245
Low Voltage 16-Bit Dual Supply Translating
Transceiver with 3-STATE Outputs
tm
Features
General Description
■ Bidirectional interface between busses ranging from
The VCX163245 is a dual supply, 16-bit translating
transceiver that is designed for 2 way asynchronous
communication between busses at different supply voltages by providing true signal translation. The supply rails
consist of VCCA, which is a higher potential rail operating
at 2.3V to 3.6V and VCCB, which is the lower potential
rail operating at 1.65V to 2.7V. (VCCB must be less than
or equal to VCCA for proper device operation). This dual
supply design allows for translation from 1.8V to 2.5V
busses to busses at a higher potential, up to 3.3V.
■
■
■
■
■
■
■
1.65V to 3.6V
Supports Live Insertion and Withdrawal(1)
Static Drive (IOH/IOL)
– ±24mA @ 3.0V VCC
– ±18mA @ 2.3V VCC
– ±6mA @ 1.65V VCC
Uses proprietary Quiet Series™ noise/EMI reduction
circuitry
Functionally compatible with 74 series 16245
Latchup performance exceeds 300mA
ESD performance:
– Human Body Model >2000V
– Machine model >200V
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note:
1. To ensure the high impedance state during power up
or power down, OEn should be tied to VCCB through a
pull up resistor. The minimum value of the resistor is
determined by the current sourcing capability of the
driver.
The Transmit/Receive (T/R) input determines the direction of data flow. Transmit (active-HIGH) enables data
from A Ports to B Ports; Receive (active-LOW) enables
data from B Ports to A Ports. The Output Enable (OE)
input, when HIGH, disables both A and B Ports by placing them in a High-Z condition. The A Port interfaces
with the higher voltage bus (2.7V to 3.3V); The B Port
interfaces with the lower voltage bus (1.8V to 2.5V). Also
the VCX163245 is designed so that the control pins
(T/Rn, OEn) are supplied by VCCB.
The 74VCX163245 is suitable for mixed voltage applications such as notebook computers using a 1.8V CPU and
3.3V peripheral components. It is fabricated with an
Advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.
Ordering Information
Order Number
Package Number
74VCX163245G(2)(3)
BGA54A
74VCX163245MTD(3)
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205,
5.5mm Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC
MO-153, 6.1mm Wide
Notes:
2. Ordering code “G” indicates Trays.
3. Device also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Quiet Series™ is a trademark of Fairchild Semiconductor Corporation.
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
May 2007
Pin Assignment for TSSOP
Pin Assignment for FBGA
(Top Thru View)
FBGA Pin Assignments
A
1
2
3
4
5
6
B0
NC
T/R1
OE1
NC
A0
B
B2
B1
NC
NC
A1
A2
C
B4
B3
VCCB
VCCA
A3
A4
D
B6
B5
GND
GND
A5
A6
E
B8
B7
GND
GND
A7
A8
F
B10
B9
GND
GND
A9
A10
G
B12
B11
VCCB
VCCA
A11
A12
H
B14
B13
NC
NC
A13
A14
J
B15
NC
T/R2
OE2
NC
A15
Pin Descriptions
Pin
Names
Description
OEn
Output Enable Input (Active LOW)
T/Rn
Transmit/Receive Input
A0–A15
Side A Inputs or 3-STATE Outputs
B0–B15
Side B Inputs or 3-STATE Outputs
NC
No Connect
Logic Diagram
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
2
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Connection Diagram
Inputs
Inputs
OE1
T/R1
Outputs
OE2
T/R2
L
Bus B8–B15 Data to Bus A8–A15
Outputs
L
L
Bus B0–B7 Data to Bus A0–A7
L
L
H
Bus A0–A7 Data to Bus B0–B7
L
H
Bus A8–A15 Data to Bus B8–B15
H
X
HIGH Z State on A0–A7, B0–B7
H
X
HIGH-Z State on A8–A15, B8–B15
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial (HIGH or LOW, inputs may not float)
Z = High Impedance
VCX163245 Translator Power Up Sequence Recommendations
To guard against power up problems, some simple
guidelines need to be adhered to. The VCX163245 is
designed so that the control pins (T/Rn, OEn) are supplied by VCCB. Therefore the first recommendation is to
begin by powering up the control side of the device,
VCCB. The OEn control pins should be ramped with or
ahead of VCCB, this will guard against bus contentions
and oscillations as all A Port and B Port outputs will be
disabled. To ensure the high impedance state during
power up or power down, OEn should be tied to VCCB
through a pull up resistor. The minimum value of the
resistor is determined by the current sourcing capability
of the driver. Second, the T/Rn control pins should be
placed at logic LOW (0V) level, this will ensure that the
B-side bus pins are configured as inputs to help guard
against bus contention and oscillations. B-side Data
Inputs should be driven to a valid logic level (0V or
VCCB), this will prevent excessive current draw and oscillations. VCCA can then be powered up after VCCB, however VCCA must be greater than or equal to VCCB to
ensure proper device operation. Upon completion of
these steps the device can then be configured for the
users desired operation. Following these steps will help
to prevent possible damage to the translator device as
well as other system components.
Logic Diagrams
Please note that these diagrams are provided only for the understanding of logic operations and should not be used
to estimate propagation delays.
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
3
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Truth Tables
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VCCA
Parameter
Supply Voltage
–0.5V to +4.6V
–0.5V to VCCA
VCCB
VI
VI/O
DC Input Voltage
–0.5V to +4.6V
DC Output Voltage
Outputs 3-STATE
–0.5V to +4.6V
An Output
Active(4)
–0.5V to VCCA + 0.5V
Bn Output
Active(4)
–0.5V to VCCB + 0.5V
IIK
DC Input Diode Current, VI < 0V
IOK
DC Output Diode Current
IOH/IOL
Rating
–50mA
VO < 0V
–50mA
VO > VCC
+50mA
DC Output Source/Sink Current
±50mA
DC VCC or Ground Current
±100mA
ICC or Ground Supply Pin
TSTG
Storage Temperature
–65°C to +150°C
Recommended Operating Conditions(5)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
VCCA
Parameter
Power
Rating
Supply(6)
2.3V to 3.6V
1.65V to 2.7V
VCCB
VI
VI/O
IOH/IOL
Input Voltage () @ OE, T/R
0V to VCCB
Input/Output Voltage ()
An
0V to VCCA
Bn
0V to VCCB
Output Current in IOH/IOL
VCCA = 3.0V to 3.6V
±24mA
VCCA = 2.3V to 2.7V
±18mA
VCCB = 2.3V to 2.7V
±18mA
VCCB = 1.65V to 1.95V
TA
∆t / ∆ V
±6mA
Free Air Operating Temperature
–40°C to +85°C
Minimum Input Edge Rate, VIN = 0.8V to 2.0V, VCC = 3.0V
10ns/V
Notes:
4. IO Absolute Maximum Rating must be observed.
5. Unused inputs or I/O pins must be held HIGH or LOW. They may not float.
6. Operation requires: VCCB ≤ VCCA
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
4
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Absolute Maximum Ratings
Symbol
VIHA
Parameter
VCCB (V)
VCCA (V)
Conditions
Min.
Max.
Units
HIGH Level Input
Voltage
An
1.65–1.95
2.3–2.7
1.6
V
Bn, T/R, OE
1.65–1.95
2.3–2.7
0.65 x VCCB
V
LOW Level Input
Voltage
An
1.65–1.95
2.3–2.7
0.7
V
Bn, T/R, OE
1.65–1.95
2.3–2.7
0.35 x VCCB
V
1.65–1.95
2.3–2.7
IOH = –100µA
VCCA – 0.2
1.65
2.3–2.7
IOH = –18mA
1.7
1.65–1.95
2.3–2.7
IOH = –100µA
VCCB – 0.2
1.65–1.95
2.3
IOH = –6mA
1.65–1.95
2.3–2.7
IOL = 100µA
0.2
1.65
2.3–2.7
IOL = 18mA
0.6
1.65–1.95
2.3–2.7
IOL = 100µA
0.2
1.65–1.95
2.3
IOL = 6mA
0.3
Input Leakage Current @ OE,
T/R
1.65–1.95
2.3–2.7
0V ≤ VI ≤ 3.6V
±5.0
µA
IOZ
3-STATE Output Leakage
1.65–1.95
2.3–2.7
0V ≤ VO ≤ 3.6V,
OE = VCCB,
VI = VIH or VIL
±10
µA
IOFF
Power Off Leakage Current
0
0
0 ≤ (VI, VO) ≤ 3.6V
10
µA
1.65–1.95
2.3–2.7
An = VCCA or GND,
Bn, OE, & T/R = VCCB
or GND
20
µA
1.65–1.95
2.3–2.7
VCCA ≤ An ≤ 3.6V,
VCCB ≤ Bn, OE,
T/R ≤ 3.6V
±20
µA
Increase in ICC per Input, Bn,
T/R, OE
1.65–1.95
2.3–2.7
VI = VCCB – 0.6V
750
µA
Increase in ICC per Input, An
1.65–1.95
2.3–2.7
VI = VCCA – 0.6V
750
µA
VIHB
VILA
VILB
VOHA
VOHB
VOLA
VOLB
II
HIGH Level Output Voltage
HIGH Level Output Voltage
Low Level Output Voltage
Low Level Output Voltage
ICCA /ICCB Quiescent Supply Current,
per supply, VCCA / VCCB
∆ICC
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
V
V
1.25
V
V
www.fairchildsemi.com
5
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
DC Electrical Characteristics (1.65V < VCCB ≤ 1.95V, 2.3V < VCCA ≤ 2.7V)
Symbol
VIHA
Parameter
VCCA (V)
Conditions
Min.
Max.
Units
An
1.65–1.95
3.0–3.6
2.0
V
Bn, T/R, OE
1.65–1.95
3.0–3.6
0.65 x VCCB
V
An
1.65–1.95
3.0–3.6
0.8
V
Bn, T/R, OE
1.65–1.95
3.0–3.6
0.35 x VCCB
V
1.65–1.95
3.0–3.6
IOH = –100µA
VCCA – 0.2
1.65
3.0–3.6
IOH = –24mA
2.2
1.65–1.95
3.0–3.6
IOH = –100µA
VCCA – 0.2
1.65–1.95
3.0
IOH = –6mA
1.65–1.95
3.0–3.6
IOL = 100µA
0.2
1.65
3.0–3.6
IOL = 24mA
0.55
1.65–1.95
3.0–3.6
IOL = 100µA
0.2
1.65–1.95
3.0
IOL = 6mA
0.3
Input Leakage Current @ OE,
T/R
1.65–1.95
3.0–3.6
0V ≤ VI ≤ 3.6V
±5.0
µA
IOZ
3-STATE Output Leakage
1.65–1.95
3.0–3.6
0V ≤ VO ≤ 3.6V,
OE = VCCB,
VI = VIH or VIL
±10
µA
IOFF
Power OFF Leakage Current
0
0
0 ≤ (VI, VO) ≤ 3.6V
10
µA
1.65–1.95
3.0–3.6
An = VCCA or GND,
Bn, OE, & T/R = VCCB
or GND
20
µA
1.65–1.95
3.0–3.6
VCCA ≤ An ≤ 3.6V,
VCCB ≤ Bn, OE,
T/R ≤ 3.6V
±20
µA
Increase in ICC per Input, Bn,
T/R, OE,
1.65–1.95
3.0–3.6
VI = VCCB – 0.6V
750
µA
Increase in ICC per Input, An
1.65–1.95
3.0–3.6
VI = VCCA – 0.6V
750
µA
VIHB
VILA
VILB
VOHA
VOHB
VOLA
VOLB
II
HIGH Level Input
Voltage
VCCB (V)
LOW Level Input
Voltage
HIGH Level Output Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
LOW Level Output Voltage
ICCA /ICCB Quiescent Supply Current,
per supply, VCCA/VCCB
∆ICC
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
V
V
1.25
V
V
www.fairchildsemi.com
6
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
DC Electrical Characteristics (1.65V < VCCB ≤ 1.95V, 3.0V < VCCA ≤ 3.6V)
Symbol
VIHA
Parameter
VCCB (V)
VCCA (V)
Conditions
Min.
Max.
Units
HIGH Level Input
Voltage
An
2.3–2.7
3.0–3.6
2.0
V
Bn, T/R, OE
2.3–2.7
3.0–3.6
1.6
V
LOW Level Input
Voltage
An
2.3–2.7
3.0–3.6
0.8
V
Bn, T/R, OE
2.3–2.7
3.0–3.6
0.7
V
2.3–2.7
3.0–3.6
IOH = –100µA
VCCA – 0.2
2.3
3.0–3.6
IOH = –24mA
2.2
2.3–2.7
3.0–3.6
IOH = –100µA
VCCB – 0.2
2.3–2.7
3.0
IOH = –18mA
1.7
2.3–2.7
3.0–3.6
IOL = 100µA
0.2
2.3
3.0–3.6
IOL = 24mA
0.55
2.3–2.7
3.0–3.6
IOL = 100µA
0.2
2.3–2.7
3.0
IOL = 18mA
0.6
Input Leakage Current @ OE,
T/R
2.3–2.7
3.0–3.6
0V ≤ VI ≤ 3.6V
±5.0
µA
IOZ
3-STATE Output Leakage @ An
2.3–2.7
3.0–3.6
0V ≤ VO ≤ 3.6V,
OE = VCCA,
VI = VIH or VIL
±10
µA
IOFF
Power OFF Leakage Current
0
0
0 ≤ (VI, VO) ≤ 3.6V
10
µA
2.3–2.7
3.0–3.6
An = VCCA or GND,
Bn, OE, & T/R = VCCB
or GND
20
µA
2.3–2.7
3.0–3.6
VCCA ≤ An ≤ 3.6V,
VCCB ≤ Bn, OE,
T/R ≤ 3.6V
±20
µA
Increase in ICC per Input, Bn,
T/R, OE
2.3–2.7
3.0–3.6
VI = VCCB – 0.6V
750
µA
Increase in ICC per Input, An
2.3–2.7
3.0–3.6
VI = VCCA – 0.6V
750
µA
VIHB
VILA
VILB
VOHA
VOHB
VOLA
VOLB
II
HIGH Level Output Voltage
HIGH Level Output Voltage
LOW Level Output Voltage
LOW Level Output Voltage
ICCA /ICCB Quiescent Supply Current,
per supply, VCCA/VCCB
∆ICC
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
V
V
V
V
www.fairchildsemi.com
7
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
DC Electrical Characteristics (2.3V < VCCB ≤ 2.7V, 3.0V ≤ VCCA ≤ 3.6V)
TA = –40°C to +85°C, CL = 30 pF, RL = 500Ω
Symbol
Parameter
VCCB = 1.65V to 1.95V, VCCB = 1.65V to 1.95V,
VCCA = 2.3V to 2.7V
VCCA = 3.0V to 3.6V
Min.
Max.
Min.
Max.
VCCB = 2.3V to 2.7V,
VCCA = 3.0V to 3.6V
Min.
Max.
Units
tPHL, tPLH
Propagation Delay,
A to B
1.5
5.8
1.5
6.2
0.8
4.4
ns
tPHL, tPLH
Propagation Delay,
B to A
0.8
5.5
0.6
5.1
0.6
4.0
ns
tPZL, tPZH
Output Enable Time,
OE to B
1.5
8.3
1.5
8.2
0.8
4.6
ns
tPZL, tPZH
Output Enable Time,
OE to A
0.8
5.3
0.6
5.1
0.6
4.0
ns
tPLZ, tPHZ
Output Disable Time,
OE to B
0.8
4.6
0.8
4.5
0.8
4.4
ns
tPLZ, tPHZ
Output Disable Time,
OE to A
0.8
5.2
0.6
5.6
0.6
4.8
ns
0.75
ns
tosHL, tosLH
Output to Output
Skew(7)
0.05
0.5
Note:
7. Skew is defined as the absolute value of the difference between the actual propagation delay for any two
separate outputs of the same device. The specification applies to any outputs switching in the same direction,
either HIGH-to-LOW (tosHL) or LOW-to-HIGH (tosLH).
Dynamic Switching Characteristics
Symbol
VOLP
VOLP
VOLV
VOLV
VOHV
VOHV
Parameter
Quiet Output Dynamic
Peak VOL, A to B
VCCB (V) VCCA (V)
1.8
2.5
1.8
3.3
2.5
3.3
1.8
2.5
1.8
3.3
2.5
3.3
Quiet Output Dynamic
Valley VOL, A to B
1.8
2.5
1.8
3.3
2.5
3.3
Quiet Output Dynamic
Valley VOL, B to A
1.8
2.5
1.8
3.3
2.5
3.3
1.8
2.5
1.8
3.3
2.5
3.3
1.8
2.5
1.8
3.3
2.5
3.3
Quiet Output Dynamic
Peak VOL, B to A
Quiet Output Dynamic
Valley VOH, A to B
Quiet Output Dynamic
Valley VOH, B to A
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
Conditions
CL = 30 pF, VIH = VCC,
VIL = 0V
TA = +25°C
Typical
Units
0.25
V
0.25
0.6
CL = 30 pF, VIH = VCC,
VIL = 0V
0.6
V
0.8
0.8
CL = 30 pF, VIH = VCC,
VIL = 0V
–0.25
CL = 30 pF, VIH = VCC,
VIL = 0V
–0.6
V
–0.25
–0.6
V
–0.8
–0.8
CL = 30 pF, VIH = VCC,
VIL = 0V
1.3
V
1.3
1.7
CL = 30 pF, VIH = VCC,
VIL = 0V
1.7
V
2.0
2.0
www.fairchildsemi.com
8
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
AC Electrical Characteristics
Symbol
Parameter
Conditions
TA = +25°C
Units
CIN
Input Capacitance
VCCB = 2.5V, VCCA = 3.3V, VI = 0V
or VCCA/B
5
pF
CI/O
Input/Output Capacitance
VCCB = 2.5V, VCCA = 3.3V, VI = 0V
or VCCA/B
6
pF
CPD
Power Dissipation Capacitance
VCCB = 2.5V, VCCA = 3.3V,
VI = 0V or VCCA/B, f = 10MHz
20
pF
AC Loading and Waveforms
Figure 1. AC Test Circuit
Test
Switch
tPLH, tPHL
OPEN
tPZL, tPLZ
6V at VCC = 3.3 ±0.3V;
VCC x 2 at VCC = 2.5 ± 0.2V;
1.8V ± 0.15V
tPZH, tPHZ
GND
Figure 4. 3-STATE Output Low Enable and Disable
Times for Low Voltage Logic
tR = tF ≤ 2.0 ns, 10% to 90%
VCC
Symbol 3.3V ± 0.3V 2.5V ± 0.2V 1.8V ± 0.15V
Figure 2. Waveform for Inverting
and Non-inverting Functions
tR = tF ≤ 2.0 ns, 10% to 90%
Vmi
1.5V
VCC / 2
VCC / 2
Vmo
1.5V
VCC / 2
VCC / 2
VX
VOL + 0.3V
VOL + 0.15V
VOL + 0.15V
VY
VOH – 0.3V
VOH – 0.15V
VOH – 0.15V
Figure 3. 3-STATE Output High Enable and Disable
Times for Low Voltage Logic
tR = tF ≤ 2.0 ns, 10% to 90%
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
9
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Capacitance
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 5. 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
Package Number BGA54A
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
10
74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 6. 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD48
©2000 Fairchild Semiconductor Corporation
74VCX163245 Rev. 1.7
www.fairchildsemi.com
11
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©2000 Fairchild Semiconductor Corporation
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74VCX163245 Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs
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