74VHC244SJ

Revised April 2005 74VHC244 Octal Buffer/Line Driver with 3-STATE Outputs General Description Features The VHC244 is an advanced high speed CMOS octal bus buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The VHC244 is a non-inverting 3-STATE buffer having two active-LOW output enables. These devices are designed to be used as 3-STATE memory address drivers, clock drivers, and bus oriented transmitter/receivers. ■ High Speed: tPD 3.9ns (typ) at VCC ■ High noise immunity: VNIH VNIL 5V 28% VCC (min) ■ Power down protection is provided on all inputs ■ Low noise: VOLP 0.6V (typ) ■ Low power dissipation: ICC 4 PA (max) @ TA 25qC ■ Pin and function compatible with 74HC244 An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Ordering Code: Order Number Package Number 74VHC244M 74VHC244SJ 74VHC244MTC 74VHC244N Package Description M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MTC20 N20A 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbol Connection Diagram IEEE/IEC © 2005 Fairchild Semiconductor Corporation DS011522 www.fairchildsemi.com 74VHC244 Octal Buffer/Line Driver with 3-STATE Outputs November 1992 74VHC244 Pin Descriptions Pin Names Description OE1, OE2 3-STATE Output Enable Inputs I0–I7 Inputs O0–O7 3-STATE Outputs Truth Tables Inputs Outputs OE1 In (Pins 12, 14, 16, 18) L L L L H H H X Z Inputs Outputs OE2 In (Pins 3, 5, 7, 9) L L L L H H H X Z H HIGH Voltage Level L LOW Voltage Level I Immaterial Z High Impedance www.fairchildsemi.com 2 Recommended Operating Conditions (Note 2) 0.5V to 7.0V 0.5V to 7.0V 0.5V to VCC  0.5V 20 mA r20 mA r25 mA r75 mA 65qC to 150qC Supply Voltage (VCC ) DC Input Voltage (VIN) DC Output Voltage (VOUT) Input Diode Current (IIK) Output Diode Current (IOK) DC Output Current (IOUT) DC VCC /GND Current (ICC ) Storage Temperature (TSTG) 2.0V to 5.5V 0V to 5.5V Output Voltage (VOUT) 0V to VCC 40qC to 85qC Operating Temperature (TOPR) Input Rise and Fall Time (tr, tf) Lead Temperature (TL) VCC 3.3V r 0.3V 0 ns/V a 100 ns/V VCC 5.0V r 0.5V 0 ns/V a 20 ns/V Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. 260qC (Soldering, 10 seconds) Supply Voltage (VCC) Input Voltage (VIN) Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH VCC Parameter (V) HIGH Level Input Voltage VIL VOH VOL TA Max 40qC to 85qC Min 2.0 1.5 1.5 0.7 VCC 0.7 VCC Max 2.0 0.5 0.5 0.3 VCC 0.3 VCC HIGH Level 2.0 1.9 2.0 1.9 Output Voltage 3.0 2.9 3.0 2.9 4.5 4.4 4.5 3.0 2.58 2.48 4.5 3.94 3.80 2.0 Output Voltage Units V VIN V ICC Quiescent Supply Current 50 PA 4.4 0.0 IOH V 0.1 0.1 IOH VIN V VIH IOL 4 mA 8 mA 50 PA 3.0 0.0 0.1 0.1 0.0 0.1 0.1 3.0 0.36 0.44 4.5 0.36 0.44 or VIL 5.5 r0.25 r2.5 PA VIN 0  5.5 r0.1 r1.0 PA VIN 5.5V or GND 5.5 4.0 40.0 PA VIN VCC or GND V Off-State Current Input Leakage Current VIH IOH or VIL 4.5 3-STATE Output IIN Conditions V 3.0  5.5 LOW Level IOZ 25qC Typ 3.0  5.5 LOW Level Input Voltage TA Min VOUT IOL 4 mA IOL 8 mA VIH or VIL VCC or GND Noise Characteristics Symbol VOLP (Note 3) VOLV (Note 3) Parameter Quiet Output Maximum VCC TA 25qC Units Conditions (V) Typ Limits 5.0 0.6 0.9 V CL 50 pF 5.0 0.6 0.9 V CL 50 pF 5.0 3.5 V CL 50 pF 5.0 1.5 V CL 50 pF Dynamic VOL Quiet Output Minimum Dynamic VOL VIHD Minimum HIGH Level (Note 3) Dynamic Input Voltage VILD Maximum HIGH Level (Note 3) Dynamic Input Voltage Note 3: Parameter guaranteed by design. 3 www.fairchildsemi.com 74VHC244 Absolute Maximum Ratings(Note 1) 74VHC244 AC Electrical Characteristics Symbol Parameter tPLH Propagation Delay tPHL Time VCC (V) TA Min 3.3 r 0.3 5.0 r 0.5 tPZL 3-STATE Output tPZH Enable Time 3.3 r 0.3 5.0 r 0.5 25qC TA 40qC to 85qC Typ Max Min Max 5.8 8.4 1.0 10.0 8.3 11.9 1.0 13.5 3.9 5.5 1.0 6.5 5.4 7.5 1.0 8.5 6.6 10.6 1.0 12.5 9.1 14.1 1.0 16.0 4.7 7.3 1.0 8.5 6.2 9.3 1.0 10.5 tPLZ 3-STATE Output 3.3 r 0.3 10.3 14.0 1.0 16.0 tPHZ Disable Time 5.0 r 0.5 6.7 9.2 1.0 10.5 tOSLH Output to Output 3.3 r 0.3 1.5 1.5 tOSHL Skew 5.0 r 0.5 1.0 1.0 CIN Input Capacitance 10 10 COUT Output Capacitance CPD Power Dissipation Capacitance Note 4: Parameter guaranteed by design. tOSLH Conditions ns ns ns RL 1 k: ns ns RL 1 k: CL 15 pF CL 50 pF CL 15 pF CL 50 pF CL 15 pF CL 50 pF CL 15 pF CL 50 pF CL 50 pF CL 50 pF CL 50 pF CL 50 pF ns (Note 4) pF VCC Open 6 pF VCC 5.0V 19 pF (Note 5) 4 |tPLHmax  tPLHmin|; tOSHL Units |tPHLmax  tPHLmin|. Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (OPR.) CPD * VCC * fIN  ICC/8 (per bit). www.fairchildsemi.com 4 74VHC244 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com 74VHC244 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6 74VHC244 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com 74VHC244 Octal Buffer/Line Driver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8