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74VHC374
Octal D-Type Flip-Flop with 3-STATE Outputs
tm
Features
General Description
■ High Speed: tPD = 5.4ns (typ) at VCC = 5V
■ High noise immunity: VNIH = VNIL = 28% VCC (Min.)
The VHC374 is an advanced high speed CMOS octal
flip-flop with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This 8-bit
D-type flip-flop is controlled by a clock input (CP) and an
output enable input (OE). When the OE input is HIGH,
the eight outputs are in a HIGH impedance state.
■ Power down protection is provided on all inputs
■ Low power dissipation: ICC = 4µA (Max) @ TA = 25°C
■ Pin and function compatible with 74HC374
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mismatched supply and input voltages.
Ordering Information
Order
Number
Package
Number
Package Description
74VHC374M
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHC374SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC374MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
Connection Diagram
Pin Descriptions
Pin Names
©1992 Fairchild Semiconductor Corporation
74VHC374 Rev. 1.3
Description
D0–D7
Data Inputs
CP
Clock Pulse Input
OE
3-STATE Output Enable Input
O0–O7
3-STATE Outputs
www.fairchildsemi.com
74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs
April 2007
Functional Description
IEEE/IEC
The VHC374 consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The buffered clock and buffered Output Enable are
common to all flip-flops. The eight flip-flops will store the
state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP)
transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs.
When the OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the
state of the flip-flops.
Truth Table
Inputs
Outputs
OE
On
H
L
H
L
L
L
H
Z
Dn
CP
X
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Transition
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
Figure 1.
©1992 Fairchild Semiconductor Corporation
74VHC374 Rev. 1.3
www.fairchildsemi.com
2
74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs
Logic Symbol
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Rating
VCC
Supply Voltage
–0.5V to +7.0V
VIN
DC Input Voltage
–0.5V to +7.0V
VOUT
DC Output Voltage
–0.5V to VCC + 0.5V
IIK
Input Diode Current
–20mA
IOK
Output Diode Current
±20mA
IOUT
DC Output Current
±25mA
ICC
DC VCC/GND Current
±75mA
TSTG
Storage Temperature
–65°C to +150°C
TL
Lead Temperature (Soldering, 10 seconds)
260°C
Recommended Operating Conditions(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
VCC
Supply Voltage
VIN
Input Voltage
VOUT
Output Voltage
TOPR
Operating Temperature
tr , tf
Rating
2.0V to +5.5V
0V to +5.5V
0V to VCC
–40°C to +85°C
Input Rise and Fall Time,
VCC = 3.3V ± 0.3V
0ns/V ∼ 100ns/V
VCC = 5.0V ± 0.5V
0ns/V ∼ 20ns/V
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
©1992 Fairchild Semiconductor Corporation
74VHC374 Rev. 1.3
www.fairchildsemi.com
3
74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs
Absolute Maximum Ratings
TA =
25°C
Symbol
Parameter
VIH
HIGH Level
Input Voltage
VIL
LOW Level Input
Voltage
VOH
HIGH Level
Output
Voltage
VCC (V)
Conditions
Min.
2.0
1.50
3.0–5.5
0.7 x VCC
3.0
LOW Level
Output Voltage
Min.
0.50
2.0
1.9
2.9
3.0
2.9
4.4
4.5
4.4
V
IOH = –4mA
2.58
2.48
IOH = –8mA
3.94
3.80
VIN = VIH IOL = 50µA
or VIL
4.5
3.0
4.5
0.0
0.1
0.1
0.0
0.1
0.1
0.0
IOL = 4mA
IOL = 8mA
V
0.3 x VCC
1.9
4.5
2.0
V
0.3 x VCC
VIN = VIH IOH = –50µA
or VIL
Units
0.7 x VCC
3.0
3.0
Max.
0.50
3.0–5.5
2.0
–40°C to +85°C
Max.
1.50
2.0
4.5
VOL
Typ.
0.1
0.1
0.36
0.44
V
0.36
0.44
5.5
VIN = VIH or VIL;
VOUT = VCC or GND
±0.25
±2.5
µA
Input Leakage
Current
0–5.5
VIN = 5.5V or GND
±0.1
±1.0
µA
Quiescent
Supply Current
5.5
VIN = VCC or GND
4.0
40.0
µA
IOZ
3-STATE Output
Off-State
Current
IIN
ICC
Noise Characteristics
TA = 25°C
Symbol
(2)
Parameter
VCC (V)
Conditions
Typ.
Limits
Units
Quiet Output Maximum
Dynamic VOL
5.0
CL = 50pF
0.6
0.9
V
VOLV(2)
Quiet Output Minimum
Dynamic VOL
5.0
CL = 50pF
–0.6
–0.9
V
VIHD(2)
Minimum HIGH Level
Dynamic Input Voltage
5.0
CL = 50pF
3.5
V
VILD(2)
Maximum LOW Level
Dynamic Input Voltage
5.0
CL = 50pF
1.5
V
VOLP
Note:
2. Parameter guaranteed by design.
©1992 Fairchild Semiconductor Corporation
74VHC374 Rev. 1.3
www.fairchildsemi.com
4
74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs
DC Electrical Characteristics
TA = –40°C
to +85°C
TA = 25°C
Symbol
Parameter
tPLH, tPHL Propagation Delay
Time (CP to On)
VCC (V)
Conditions
3.3 ± 0.3
5.0 ± 0.5
tPZL, tPZH 3-STATE Output
Enable Time
3.3 ± 0.3 RL = 1kΩ
Typ.
Max.
Min.
Max. Units
CL = 15pF
8.1
12.7
1.0
15.0
CL = 50pF
10.6
16.2
1.0
18.5
CL = 15pF
5.4
8.1
1.0
9.5
CL = 50pF
6.9
10.1
1.0
11.5
CL = 15pF
7.1
11.0
1.0
13.0
CL = 50pF
9.6
14.5
1.0
16.5
CL = 15pF
5.1
7.6
1.0
9.0
CL = 50pF
6.6
9.6
1.0
11.0
3.3 ± 0.3 RL = 1kΩ
CL = 50pF
10.2
14.0
1.0
16.0
5.0 ± 0.5
CL = 50pF
6.1
8.8
1.0
10.0
5.0 ± 0.5
tPLZ, tPHZ 3-STATE Output
Disable Time
Min.
(3)
tOSLH,
tOSHL
Output to Output
Skew
3.3 ± 0.3
CL = 50pF
1.5
1.5
5.0 ± 0.5
CL = 50pF
1.0
1.0
fMAX
Maximum Clock
Frequency
3.3 ± 0.3
CL = 15pF
80
130
70
CL = 50pF
55
85
50
CL = 15pF
130
185
110
CL = 50pF
85
120
75
5.0 ± 0.5
Input Capacitance
VCC = Open
COUT
Output Capacitance
CPD
Power Dissipation
Capacitance
VCC
(4)
CIN
4
= 5.0V
10
ns
ns
ns
ns
ns
ns
MHz
10
pF
6
pF
32
pF
Notes:
3. Parameter guaranteed by design. tOSLH = |tPLH max – tPLH min|; tOSHL = |tPHL max – tPHL min|
4. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load. Average operating current can be obtained by the equation:
ICC (opr.) = CPD • VCC • fIN + ICC / 8 (per F/F). The total CPD when n pcs. of the Octal D Flip-Flop operates
can be calculated by the equation: CPD (total) = 20 + 12n.
AC Operating Requirements
TA = 25°C
Symbol
Parameter
VCC (V)
Min.
Typ.
Max.
TA = –40°C to +85°C
Min.
tW(H), tW(L)
Minimum Pulse Width
(CP)
3.3 ± 0.3
5.0
5.5
5.0 ± 0.5
5.0
5.0
tS
Minimum Set-Up Time
3.3 ± 0.3
4.5
4.5
5.0 ± 0.5
3.0
3.0
3.3 ± 0.3
2.0
2.0
5.0 ± 0.5
2.0
2.0
tH
Minimum Hold Time
©1992 Fairchild Semiconductor Corporation
74VHC374 Rev. 1.3
Max.
Units
ns
ns
ns
www.fairchildsemi.com
5
74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs
AC Electrical Characteristics
74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs
Physical Dimensions
Dimensions are in inches (millimeters) unless otherwise noted.
Figure 2. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
©1992 Fairchild Semiconductor Corporation
74VHC374 Rev. 1.3
www.fairchildsemi.com
6
74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 3. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
©1992 Fairchild Semiconductor Corporation
74VHC374 Rev. 1.3
www.fairchildsemi.com
7
74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 4. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
©1992 Fairchild Semiconductor Corporation
74VHC374 Rev. 1.3
www.fairchildsemi.com
8
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HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
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As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
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2. A critical component in any component of a life support,
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reasonably expected to cause the failure of the life support
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Definition
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I24
©1992 Fairchild Semiconductor Corporation
74VHC374 Rev. 1.3
www.fairchildsemi.com
9
74VHC374 Octal D-Type Flip-Flop with 3-STATE Outputs
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designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
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