AMIS30623C6238G

DATA SHEET www.onsemi.com Micro-stepping Motor Driver AMIS-30623 INTRODUCTION The AMIS−30623 is a single−chip micro−stepping motordriver with position controller and control/diagnostic interface. It is ready to build dedicated mechatronics solutions connected remotely with a LIN master. The chip receives positioning instructions through the bus and subsequently drives the motor coils to the desired position. The on−chip position controller is configurable (OTP or RAM) for different motor types, positioning ranges and parameters for speed, acceleration and deceleration. The AMIS−30623 acts as a slave on the LIN bus and the master can fetch specific status information like actual position, error flags, etc. from each individual slave node. An integrated sensor−less step−loss detection prevents the positioner from loosing steps and stops the motor when running into stall. This enables silent, yet accurate position calibrations during a referencing run and allows semi−closed loop operation when approaching the mechanical end−stops. The chip is implemented in I2T100 technology, enabling both high voltage analog circuitry and digital functionality on the same chip. The AMIS−30623 is fully compatible with the automotive voltage requirements. PRODUCT FEATURES Motordriver • • • • • • • • Micro−stepping Technology Sensorless Step−loss Detection Peak Current up to 800 mA Fixed Frequency PWM Current−control Automatic Selection of Fast and Slow Decay Mode No external Fly−back Diodes Required Compliant with 14 V Automotive Systems and Industrial Systems up to 24 V Motion Qualification Mode (Note 1) SOIC−20 8 or 9 SUFFIX CASE 751AQ QFNW32 7x7, 0.65P CASE 484BB ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. Protection • • • • • • • Overcurrent Protection Undervoltage Management Open−circuit Detection High Temperature Warning and Management Low Temperature Flag LIN Bus Short−circuit Protection to Supply and Ground Lost LIN Safe Operation Power Saving • Powerdown Supply Current < 100 mA • 5 V Regulator with Wake−up On LIN Activity Controller with RAM and OTP Memory • Position Controller • Configurable Speeds and Acceleration • Input to Connect Optional Motion Switch EMI Compatibility • LIN Bus Integrated Slope Control • This is a Pb−Free Device LIN Interface • Physical Layer Compliant to LIN rev. 2.0. Data−link Layer • • • • Compatible with LIN rev. 1.3 (Note 2) Field−programmable Node Addresses Dynamically Allocated Identifiers Diagnostics and Status Information HV Outputs with Slope Control 1. Not applicable for “Product Versions AMIS30623C6238(R)G, AMIS30623C623B(R)G” 2. Minor exceptions to the conformance of the data−link layer to LIN rev. 1.3. © Semiconductor Components Industries, LLC, 2009 May, 2009 − Rev. 7 1 Publication Order Number: AMIS−30623/D AMIS−30623 APPLICATIONS The AMIS−30623 is ideally suited for small positioning applications. Target markets include: automotive (headlamp alignment, HVAC, idle control, cruise control), industrial equipment (lighting, fluid control, labeling, process control, XYZ tables, robots...) and building automation (HVAC, surveillance, satellite dish, renewable energy systems). Suitable applications typically have multiple axes or require mechatronics solutions with the driver chip mounted directly on the motor. Table 1. ORDERING INFORMATION Part No. Peak Current AMIS30623C6239G 800 mA AMIS30623C6239RG 800 mA Package* Shipping† SOIC−20 (Pb−Free) Tube/Tray SOIC−20 (Pb−Free) Tape & Reel QFNW32 7x7 (Pb−Free) Tube/Tray End Market/Version Industrial High Voltage Version AMIS30623C623AG 800 mA AMIS30623C623ARG 800 mA QFNW32 7x7 (Pb−Free) Tape & Reel AMIS30623C6238G 800 mA SOIC−20 (Pb−Free) Tube/Tray AMIS30623C6238RG 800 mA SOIC−20 (Pb−Free) Tape & Reel AMIS30623C623BG 800 mA QFNW32 7x7 (Pb−Free) Tube/Tray AMIS30623C623BRG 800 mA QFNW32 7x7 (Pb−Free) Tape & Reel Automotive High Temperature Version *For additional information on our Pb−Free strategy and soldering details, please download the onsemi Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. QUICK REFERENCE DATA Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Min Max Unit VBB, VHW2, VSWI Supply voltage, hardwired address and SWI pins −0.3 +40 (Note 1) V Vlin Bus input voltage −40 +40 V TJ Junction temperature range (Note 2) −50 +175 °C Tst Storage temperature −55 +160 °C Vesd (Note 3) HBM Electrostatic discharge voltage on LIN pin −4 +4 kV HBM Electrostatic discharge voltage on other pins (Note 4) −2 +2 kV MM Electrostatic discharge voltage on other pins (Note 5) −200 +200 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Table 3. OPERATING RANGES Parameter 1. 2. 3. 4. 5. Min Max Unit VBB Supply voltage +6.5 +29 V TJ Operating temperature range −40 +165 °C For limited time: VBB 15 seconds No action; flag will be evaluated when motor stops No action; flag will be evaluated when motor stops No action; flag will be evaluated when motor stops No action; flag will be evaluated when motor stops VBB < UV2 and t < 15 seconds → Stopped = ‘1’ ⇒ = ‘1’ → Shutdown → HardStop; = ‘1’ → HardStop; = ‘1’ Thermal shutdown [ = ‘1’] → Shutdown → SoftStop → SoftStop Motion finished n.a. → Stopped → Stopped → HardStop; = ‘1’ → Shutdown → Shutdown → Stopped; = → Stopped; = n.a. n.a. With the Following Color Code: Command Ignored NOTE: Transition to Another State Master is responsible for proper update (see Note 31) See table notes on the following page. www.onsemi.com 30 AMIS−30623 25. Leaving state is equivalent to power−on−reset. 26. After power−on−reset, the state is entered. 27. A DualPosition sequence runs with a separate set of RAM registers. The parameters that are not specified in a DualPosition command are loaded with the values stored in RAM at the moment the DualPosition sequence starts. is forced to ‘1’ during second motion. at ‘0’ will be taken into account after the DualPosition sequence. A GetFullStatus command will return the default parameters for and stored in RAM. 28. The flag is set to ‘1’ when a LIN timeout or a Sleep command occurs. It is reset by the next LIN command ( is cancelled if not activated yet). 29. Shutdown state can be left only when and flags are reset. 30. Flags can be reset only after the master could read them via a GetStatus or GetFullStatus command, and provided the physical conditions allow for it (normal temperature, correct battery voltage and no electrical or charge pump defect). 31. A SetMotorParam command sent while a motion is ongoing (state ) should not attempt to modify and values. This can be done during a DualPosition sequence since this motion uses its own parameters, the new parameters will be taken into account at the next SetPosition or SetPositionShort command. 32. Some transitions like → are actually done via several states: → → → (see diagram below). 33. Two transitions are possible from state when = ‘1’: 1) Transition to state if ( = ‘0’) or (( = ‘1’) and ( = )) or = ‘1’ 2) Otherwise transition to state , with = 34. = ‘1’ when register is loaded with a value different from the most negative value (i.e. different from 0x400 = “100 0000 0000”). 35. flag allows distinguishing whether state was entered after HardStop/SoftStop or not. is set to ‘1’ when leaving state or and is reset during first clock edge occurring in state . 36. Command for dynamic assignment of Ids is decoded in all states except and has no effect on the current state. 37. While in state , if → there is a transition to state . This transition has the lowest priority, meaning that , , , etceteras are first evaluated for possible transitions. 38. If is active, then SetPosition, SetPositionShort and GotoSecurePosition commands are not ignored. can only be cleared by a GetStatus or GetFullStatus command. POR Thermal Shutdown Referencing HardStop Shutdown HardStop Thermal ShutDown SoftStop HardStop Dual Positioning Motion finished Motion Finished GotoSecPos HardStop Thermal Shutdown Soft−stop HardStop SetPosition Stopped Motion Finished GotoPos GetFullStatus OR LIN timeout Motion Finished Any LIN command Priorities 1 2 3 Sleep AND (not OR AND ActPos = SecPos OR ) Vbb < UV2 or CPFAIL 4 Vbb < UV2 or CPFAIL Vbb > UV1 and not CPFAIL T > 15 sec Figure 16. Simplified State Diagram Remark: IF = 0, then the arrow from stopped state to sleep state does not exist. www.onsemi.com 31 HardUnder ShutUnder AMIS−30623 Motordriver Current Waveforms in the Coils Figure 17 below illustrates the current fed to the motor coils by the motordriver in half−step mode. Ix Coil X Iy t Coil Y Figure 17. Current Waveforms in Motor Coils X and Y in Halfstep Mode Whereas Figure 18 below shows the current fed to the coils in 1/16th micro stepping (1 electrical period). Coil X Iy Ix t Coil Y Figure 18. Current Waveforms in Motor Coils X and Y in 1/16th Micro−Step Mode PWM Regulation Table 22. PWM FREQUENCY SELECTION In order to force a given current (determined by or and the current position of the rotor) through the motor coil while ensuring high energy transfer efficiency, a regulation based on PWM principle is used. The regulation loop performs a comparison of the sensed output current to an internal reference, and features a digital regulation generating the PWM signal that drives the output switches. The zoom over one micro−step in the Figure 18 above shows how the PWM circuit performs this regulation. To reduce the current ripple, a higher PWM frequency is selectable. The RAM register PWMfreq is used for this. PWMfreq Applied PWM Frequency 0 22,8 kHz 1 45,6 kHz PWM Jitter To lower the power spectrum for the fundamental and higher harmonics of the PWM frequency, jitter can be added to the PWM clock. The RAM register is used for this. Table 23. PWM JITTER SELECTION PWMJEn www.onsemi.com 32 Status 0 Single PWM frequency 1 Added jitter to PWM frequency AMIS−30623 Motor Starting Phase Motor Stopping Phase At motion start, the currents in the coils are directly switched from to with a new sine/cosine ratio corresponding to the first half (or micro−) step of the motion. At the end of the deceleration phase, the currents are maintained in the coils at their actual DC level (hence keeping the sine/cosine ratio between coils) during the stabilization time tstab (see AC Table). The currents are then set to the hold values, respectively Ihold x sin(TagPos) and Ihold x cos(TagPos), as illustrated below. A new positioning order can then be executed. Iy Ix t Figure 19. Motor Stopping Phase t stab Charge Pump Monitoring Motor Shutdown Mode If the charge pump voltage is not sufficient for driving the high side transistors (due to failure), an internal HardStop command is issued. This is acknowledged to the master by raising flag (available with command GetFullStatus). In case this failure occurs while a motion is ongoing, the flag is also raised. A motor shutdown occurs when: • The chip temperature rises above the thermal shutdown threshold Ttsd (see Thermal Shutdown Mode). • The battery voltage goes below UV2 for longer than 15 seconds (see Battery Voltage Management). • The charge pump voltage goes below the charge pump comparator level for more than 15 seconds. • Flag = ‘1’, meaning an electrical problem is detected on one or both coils, e.g. a short circuit. Electrical Defect on Coils, Detection and Confirmation The principle relies on the detection of a voltage drop on at least one transistor of the H−bridge. Then the decision is taken to open the transistors of the defective bridge. This allows the detection the following short circuits: • External coil short circuit • Short between one terminal of the coil and Vbat or Gnd A motor shutdown leads to the following: • H−bridges in high impedance mode. • The register is loaded with the , except in autarkic states. • The LIN interface remains active, being able to receive orders or send status. One cannot detect an internal short in the motor. Open circuits are detected by 100% PWM duty cycle value during one electrical period with duration, determined by Vmin. The conditions to get out of a motor shutdown mode are: • Reception of a GetStatus or GetFullStatus • Table 24. ELECTRICAL DEFECT DETECTION Pins Fault Mode Yi or Xi Short−circuit to GND Yi or Xi Short−circuit to Vbat Yi or Xi Open Y1 and Y2 Short circuited X1 and X2 Short circuited Xi and Yi Short circuited command AND The four above causes are no longer detected This leads to H−bridges going in Ihold mode. Hence, the circuit is ready to execute any positioning command. www.onsemi.com 33 AMIS−30623 This can be illustrated in the following sequence given as an application example. The master can check whether there is a problem or not and decide which application strategy to adopt. Table 25. Example of Possible Sequence used to Detect and Determine Cause of Motor Shutdown Tj ≥ Tsd or VBB ≤ UV2 (>15s) or = ‘1’ or = ‘1’ (>15s) ↓ − The circuit is driven in motor shutdown mode − The application is not aware of this SetPosition frame ↓ GetFullStatus or GetStatus frame ↓ GetFullStatus or GetStatus frame ↓... − The position set−point is updated by the LIN Master − Motor shutdown mode ⇒ no motion − The application is still unaware − The application is aware of a problem − Possible confirmation of the problem Important: While in shutdown mode, since there is no hold current in the coils, the mechanical load can cause a step loss, which indeed cannot be flagged by the AMIS−30623. If the LIN communication is lost while in shutdown mode, the circuit enters the sleep mode immediately. Note: The Priority Encoder is describing the management of states and commands. Warning: The application should limit the number of consecutive GetStatus or GetFullStatus commands to try to get the AMIS−30623 out of shutdown mode when this proves to be unsuccessful, e.g. there is a permanent defect. The reliability of the circuit could be altered since Get(Full)Status attempts to disable the protection of the H−bridges. − Reset or or or or or by the application − Possible new detection of over temperature or low voltage or electrical problem ⇒ Circuit sets or or or or or again at ‘1’ senses the back emf, calculates a moving average and compares the value with two independent threshold levels: Absolute threshold (AbsThr[3:0]) and Delta threshold (). Instructions for correct use of these two levels in combination with three additional parameters (, and ) are available in a dedicated Application Note “Robust Motion Control with AMIS−3062x Stepper Motor Drivers”. If the motor is accelerated by a pulling or propelling force and the resulting back emf increases above the Delta threshold (+DTHR), then is set. When the motor is slowing down and the resulting back emf decreases below the Delta threshold (−DTHR), then is set. When the motor is blocked and the velocity is zero after the acceleration phase, the back emf is low or zero. When this value is below the Absolute threshold, is set. The flag is the OR function of OR OR . Motion Detection Motion detection is based on the back emf generated internally in the running motor. When the motor is blocked, e.g. when it hits the end−stop, the velocity and as a result also the generated back emf, is disturbed. The AMIS−30623 Velocity Vbemf +DTHR Vmax Motor speed Vmin Vbemf −DTHR t t Vbemf Vbemf DeltaStallHi VABSTH Back emf t t DeltaStallLo AbsStall t t Figure 20. Triggering of the Stall Flags in Function of Measured Backemf and the Set Threshold Levels www.onsemi.com 34 AMIS−30623 Table 26. TRUTH TABLE Condition Vbemf < Average − DelThr 1 0 0 1 Vbemf > Average + DelThr 0 1 0 1 Vbemf < AbsThr 0 0 1 1 By design, the motion will only be detected when the motor is running at the maximum velocity, not during acceleration or deceleration. If the motor is positioning when Stall is detected, an (internal) hardstop of the motor is generated and the and flags are set. These flags can only be reset by sending a GetFullStatus command. If Stall appears during DualPosition then the first phase is cancelled (via internal hardstop) and after timeout Tstab (see AC table) the second phase at Vmin starts. When the flag is set the position controller will generate an internal HardStop. As a consequence also the flag will be set. The position in the internal counter will be copied to the register. All flags can be read out with the GetStatus or GetFullStatus command. Table 27. ABSOLUTE AND DELTA THRESHOLD SETTINGS AbsThr Index AbsThr Level (V) (*) DelThr Index DelThr Level (V) (*) 0 Disable 0 Disable 1 0.5 1 0.25 2 1.0 2 0.50 3 1.5 3 0.75 4 2.0 4 1.00 5 2.5 5 1.25 6 3.0 6 1.50 7 3.5 7 1.75 8 4.0 8 2.00 9 4.5 9 2.25 Important Remark (limited to motion detection flags / parameters): A 5.0 A 2.50 B 5.5 B 2.75 Using GetFullStatus will read AND clear the following flags: , , , and . New positioning is possible and the register will be further updated. Using GetStatus will read AND clear ONLY the flag. The , , and flags are NOT cleared. New positioning is possible and the register will be further updated. Motion detection is disabled when the RAM registers and are zero. Both levels can be programmed using the LIN command SetStallParam in the registers and . Also the OTP register and can be set using the LIN command SetOTPParam. These values are copied in the RAM registers during power on reset. C 6.0 C 3.00 D 6.5 D 3.25 E 7.0 E 3.50 F 7.5 F 3.75 (*) Not tested in production. Values are approximations. MinSamples is a programmable delay timer. After the zero crossing is detected, the delay counter is started. After the delay time−out (tdelay) the back−emf sample is taken. For more information please refer to the Application Note “Robust Motion Control with AMIS−3062x Stepper Motor Drivers”. Table 28. BACK EMF SAMPLE DELAY TIME Index MinSamples[2:0] tDELAY (ms) 0 000 87 1 001 130 2 010 174 3 011 217 4 100 261 5 101 304 6 110 348 7 111 391 www.onsemi.com 35 AMIS−30623 FS2StallEn high as 100%. This indicates that the supply is too low to generate the required torque and might also result in erroneously triggering the stall detection. The bit enables stall detection when duty cycle is 100%. For more information please refer to the Application Note “Robust Motion Control with AMIS−3062x Stepper Motor Drivers”. If or 0 (i.e. motion detection is enabled), then stall detection will be activated AFTER the acceleration ramp + an additional number of full−steps, according to the following table: Table 29. ACTIVATION DELAY OF MOTION DETECTION Index FS2StallEn[2:0] Delay (Full Steps) 0 000 0 1 001 1 2 010 2 3 011 3 4 100 4 5 101 5 6 110 6 7 111 7 Motion Qualification Mode (*) This mode is useful to debug motion parameters and to verify the stability of stepper motor systems. The motion qualification mode is entered by means of the LIN command TestBemf. The SWI pin will be converted into an analogue output on which the Back EMF integrator output can be measured. Once activated, it can only be stopped after a POR. During the Back emf observation, reading of the SWI state is internally forbidden. (*) Note: Not applicable for product versions AMIS30623C6238(R)G and AMIS30623C623B(R)G. More information is available in the Application Note “Robust Motion Control with AMIS−3062x Stepper Motor Drivers”. DC100StEn When a motor with large bemf is operated at high speed and low supply voltage, then the PWM duty cycle can be as www.onsemi.com 36 AMIS−30623 LIN CONTROLLER • selectable length of Message Frame: 2, 4, and 8 bytes • configuration flexibility • data checksum (classic checksum, cf. LIN1.3) security General Description The LIN (local interconnect network) is a serial communications protocol that efficiently supports the control of mechatronics nodes in distributed automotive applications. The physical interface implemented in the AMIS−30623 is compliant to the LIN rev. 2.0 & 2.1 specifications. It features a slave node, thus allowing for: • single−master / multiple−slave communication • self synchronization without quartz or ceramics resonator in the slave nodes • guaranteed latency times for signal transmission • single−signal−wire communication • transmission speed of 19.2 kbit/s and error detection • detection of defective nodes in the network It includes the analog physical layer and the digital protocol handler. The analog circuitry implements a low side driver with a pull−up resistor as a transmitter, and a resistive divider with a comparator as a receiver. The specification of the line driver/receiver follows the ISO 9141 standard with some enhancements regarding the EMI behavior. VBB 30 kW RxD to control block LIN protocol handler Filter TxD LIN Slope Control LIN address HW0 from OTP HW1 HW2 Figure 21. LIN Interface Slave Operational Range for Proper Self Synchronization the characteristics of the transmitted and received signal. See AC Parameters for timing values. The LIN interface will synchronize properly in the following conditions: • Vbat ≥ 8 V • Ground shift between master node and slave node < ±1 V It is highly recommended to use the same type of reverse battery voltage protection diode for the Master and the Slave nodes. Functional Description Protocol Handler This block implements: • Bit synchronization • Bit timing • The MAC layer • The LLC layer • The supervisor Error Status Register Analog Part The LIN interface implements a register containing an error status of the LIN communication. This register is as follows: The transmitter is a low−side driver with a pull−up resistor and slope control. The receiver mainly consists of a comparator with a threshold equal to VBB/2. Figure 5 shows Table 30. LIN ERROR REGISTER Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Not used Not used Not used Not used Time Data Header Bit out error error Flag error Flag error Flag www.onsemi.com 37 Bit 2 Bit 1 Bit 0 AMIS−30623 LIN Frames With: Data error flag: (= Checksum error + StopBit error + Length error) Header error flag: (= Parity error + SynchField error) Time out flag: The message frame is not fully completed within the maximum length Bit error flag: Difference in bit sent and bit monitored on the LIN bus A GetFullStatus frame will reset the error status register. The LIN frames can be divided in writing and reading frames. A frame is composed of an 8−bit Identifier followed by 2, 4 or 8 data−bytes and a checksum byte. Note: The checksum is conform LIN1.3, classic checksum calculation over only data bytes. (Checksum is an inverted 8−bit sum with carry over all data bytes.) Writing frames will be used to: • Program the OTP Memory; • Configure the component with the stepper−motor parameters (current, speed, stepping−mode, etc.); • Provide set−point position for the stepper−motor; • Control the motion state machine. Physical Address of the Circuit The circuit must be provided with a physical address in order to discriminate this circuit from other ones on the LIN bus. This address is coded on 7 bits, yielding the theoretical possibility of 128 different circuits on the same bus. It is a combination of 4 OTP memory bits and of the 3 hardwired address bits (pins HW[2:0]). However the maximum number of nodes in a LIN network is also limited by the physical properties of the bus line. It is recommended to limit the number of nodes in a LIN network to not exceed 16. Otherwise the reduced network impedance may prohibit a fault free communication under worst case conditions. Every additional node lowers the network impedance by approximately 3%. Whereas reading frames will be used to: • Get the actual position of the stepper−motor; • Get status information such as error flags; • Verify the right programming and configuration of the component. Writing Frames The LIN master sends commands and/or information to the slave nodes by means of a writing frame. According to the LIN specification, identifiers are to be used to determine a specific action. If a physical addressing is needed, then some bits of the data field can be dedicated to this, as illustrated in the example below. AD6 AD5 AD4 AD3 AD2 AD1 AD0 Physical address ↑ ↑ PA3 ↑ PA2 PA1 PA0 OTP memory HW0 HW1 HW2 NOTE: Hardwired bits Pins HW0 and HW1 are 5 V digital inputs, whereas pin HW2 is compliant with a 12 V level, e.g. it can be connected to Vbat or Gnd via a terminal of the PCB. For SetPositionShort it is recommended to set HW0, HW1 and HW2 to ’1’. Identifier Byte ID0 ID1 ID2 ID3 ID4 Data Byte 1 ID5 ID6 ID7 phys. address command parameters (e.g. position) and are used for parity check over to , conform LIN1.3 specification. = ⊗ ⊗ ⊗ (even parity) and = NOT( ⊗ ⊗ ⊗ ) (odd parity). ID 0x3C Data Byte 1 00 Data Byte 2 Data Byte 3 command physical address Another possibility is to determine the specific action within the data field in order to use less identifiers. One can for example use the reserved identifier 0x3C and take advantage of the 8 byte data field to provide a physical address, a command and the needed parameters for the action, as illustrated in the example below. Data Byte 4 Data Byte 5 Data Byte 6 Data Byte 7 Data Byte 8 1 AppCmd NOTE: Data Byte 2 parameters Bit 7 of Data byte 1 must be at ‘1’ since the LIN specification requires that contents from 0x00 to 0x7F must be reserved for broadcast messages (0x00 being for the “Sleep” message). See also LIN command Sleep ( = ‘0’). If = ‘1’, the physical address of the slave node is provided by the 7 remaining bits of DATA2. DATA1 will contain the command code (see Dynamic assignment of Identifiers), while, if present, DATA3 to DATA4 will contain the command parameters, as shown below. The writing frames used with the AMIS−30623 are the following: Type #1: General purpose 2 or 4 data bytes writing frame with a dynamically assigned identifier. This type is dedicated to short writing actions when the bus load can be an issue. They are used to provide direct command to one ( = ‘1’) or all the slave nodes www.onsemi.com 38 AMIS−30623 Data1 ID ID0 ID1 NOTE: ID2 ID3 ID4 ID5 ID6 ID7 Data2 command Physical address Data3... Broad Parameters... and indicate the number of data bytes. ID5 ID4 Ndata (number of data fields) 0 0 2 0 1 2 1 0 4 1 1 8 1. A reading frame with indirect ID must always be consecutive to a preparing frame. It will otherwise not be taken into account. 2. A reading frame will always return the physical address of the answering slave node in order to ensure robustness in the communication. The reading frames, used with the AMIS−30623, are the following: Type #5: two, four or eight Data bytes reading frame with a direct identifier dynamically assigned to a particular slave node together with an application command. A preparing frame is not needed. Type #6: eight Data bytes reading frame with 0x3D identifier. This is intrinsically an indirect type, needing therefore a preparation frame. It has the advantage to use a reserved identifier. (Note: because of the parity calculation done by the master, the identifier becomes 0x7D as physical data over the bus). Type #2: two, four or eight data bytes writing frame with an identifier dynamically assigned to an application command, regardless of the physical address of the circuit. Type #3: two data bytes writing frame with an identifier dynamically assigned to a particular slave node together with an application command. This type of frame requires that there are as many dynamically assigned identifiers as there are AMIS−30623 circuits using this command connected to the LIN bus. Type #4: eight data bytes writing frame with 0x3C identifier. Preparing Frames A preparing frame is a frame from the master that warns a particular slave node that it will have to answer in the next frame (being a reading frame). A preparing frame is needed when a reading frame does not use a dynamically assigned direct ID. Preparing and reading frames must be consecutive. A preparing frame will contain the physical address of the LIN slave node that must answer in the reading frame and will also contain a command indicating which kind of information is awaited from the slave. The preparing frames used with the AMIS−30623 can be of type #7 or type #8 described below. Type #7: two data bytes writing frame with dynamically assigned identifier. The identifier of the preparing frame has to be assigned to ROM pointer 1000, see Table 34. Reading Frames A reading frame uses an in−frame response mechanism. That is: the master initiates the frame (synchronization field + identifier field), and one slave sends back the data field together with the check field. Hence, two types of identifiers can be used for a reading frame: • Direct ID, which points at a particular slave node, indicating at the same time which kind of information is awaited from this slave node, thus triggering a specific command. This ID provides the fastest access to a read command but is forbidden for any other action. • Indirect ID, which only specifies a reading command, the physical address of the slave node that must answer having been passed in a previous writing frame, called a preparing frame. Indirect ID gives more flexibility than a direct one, but provides a slower access to a read command. Table 31. PREPARING FRAME #7 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] 2 Data 2 1 AD[6:0] 3 Checksum Checksum over data Where: (*) According to parity computation www.onsemi.com 39 AMIS−30623 Type #8: eight data bytes preparing frame with 0x3C identifier. Table 32. PREPARING FRAME #8 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 3 Data 3 1 4 Data 4 Data4[7:0] FF 5 Data 5 Data5[7:0] FF 6 Data 6 Data6[7:0] FF 7 Data 7 Data7[7:0] FF AppCMD = ... CMD[6:0] AD[6:0] 8 Data 8 Data8[7:0] FF 9 Checksum Checksum over data Where: AppCMD: If = ‘0x80’ this indicates that Data 2 contains an application command CMD[6:0]: Application Command “byte” AD[6:0]: Slave node physical address Data[7:0]: Data transmitted Dynamic Assignment of Identifiers frame with identifier 0x3C issued by the LIN master will write dynamic identifiers into the RAM. One writing frame is able to assign 4 identifiers; therefore 3 frames are needed to assign all identifiers. Each ROM pointer place the corresponding dynamic identifier at the correct place in the RAM (see Table below: LIN – Dynamic Identifiers Writing Frame). When setting to zero broadcasting is active and each slave on the LIN bus will store the same dynamic identifiers, otherwise only the slave with the corresponding slave address is programmed. The identifier field in the LIN datagram denotes the content of the message. Six identifier bits and two parity bits are used to represent the content. The identifiers 0x3C and 0x3F are reserved for command frames and extended frames. Slave nodes need to be very flexible to adapt itself to a given LIN network in order to avoid conflicts with slave nodes from different manufacturers. Dynamic assignment of the identifiers will fulfill this requirement by writing identifiers into the circuits RAM. ROM pointers are linking commands and dynamic identifiers together. A writing Table 33. DYNAMIC IDENTIFIERS WRITING FRAME Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 0 Identifier 0x3C 1 AppCMD 0x80 2 CMD 1 3 Address Broad 4 Data 5 Data 6 Data 7 Data 8 Data 9 Checksum Bit 2 Bit 1 Bit 0 AD2 AD1 AD0 0x11 AD6 AD5 AD4 AD3 DynID_1[3:0] ROMp_1[3:0] DynID_2[1:0] ROMp_2[3:0] DynID_1[5:4] ROMp_3[3:0] DynID_2[5:2] ROMp_4[1:0] DynID_3[5:0] DynID_4[5:0] ROMp_4[3:2] Checksum over data Where: CMD[6:0]: 0x11, corresponding to dynamic assignment of four LIN identifiers Broad: If = ‘0’ all the circuits connected to the LIN bus will share the same dynamically assigned identifiers. Dyn_ID_x [5:0]: Dynamically assigned LIN identifier to the application command which ROM pointer is One frame allows only assigning of four identifiers. Therefore, additional frames could be needed in order to assign more identifiers (maximum three for the AMIS−30623). www.onsemi.com 40 AMIS−30623 Dynamic ID ROM pointer Application Command User Defined 0010 GetActualPos User Defined 0011 GetStatus User Defined 0100 SetPosition User Defined 0101 SetPositionShort (1 m) User Defined 0110 SetPositionShort (2 m) User Defined 0111 SetPositionShort (4 m) User Defined 0000 GeneralPurpose 2 bytes User Defined 0001 GeneralPurpose 4 bytes User Defined 1000 Preparation Frame Command assignment via Dynamic ID during operation Figure 22. Principle of Dynamic Command Assignment Commands Table Table 34. LIN COMMANDS WITH CORRESPONDING ROM POINTER Command Mnemonic Command Byte (CMD) Dynamic ID (example) ROM Pointer 0010 GetActualPos 000000 0x00 100xxx GetFullStatus 000001 0x01 n.a. GetOTPparam 000010 0x02 n.a. GetStatus 000011 0x03 000xxx GotoSecurePosition 000100 0x04 n.a. HardStop 000101 0x05 n.a. ResetPosition 000110 0x06 n.a. RunVelocity 010111 0x17 n.a. SetDualPosition 001000 0x08 n.a. SetMotorParam 001001 0x09 n.a. SetOTPparam 010000 0x10 n.a. SetStallParam 010110 0x16 n.a. SetPosition (16−bit) 001011 0x0B 010xxx 0100 SetPositionShort (1 motor) 001100 0x0C 001001 0101 SetPositionShort (2 motors) 001101 0x0D 101001 0110 SetPositionShort (4 motors) 001110 0x0E 111001 0111 SetPosParam 101111 0x2F 110xxx 1001 n.a. Sleep 0011 n.a. SoftStop 001111 0x0F n.a. TestBemf 011111 0x1F n.a. Dynamic ID assignment 010001 0x11 n.a. General purpose 2 Data bytes 011000 0000 General purpose 4 Data bytes 101000 0001 Preparing frame 011010 1000 NOTE: “xxx” allows addressing physically a slave node. Therefore, these dynamic identifiers cannot be used for more than eight stepper motors. Only ten ROM pointers are needed for the AMIS−30623. www.onsemi.com 41 AMIS−30623 LIN Lost Behavior communication occurred at (or before) power on reset or in normal powered operation. Introduction When the LIN communication is broken for a duration of 25000 consecutive frames (= 1,30s @ 19200 kbit/s) AMIS−30623 sets an internal flag called “LIN lost”. The functional behavior depends on the state of OTP bits and , and if this loss in LIN Sleep Enable The OTP bit enables or disables the entering in low−power sleep mode in case of LIN time−out. Default the entering of the sleep−mode is disabled. Table 35. SLEEP ENABLE SELECTION Behavior 0 Entering low−power sleep mode is disabled except from and 1 Entering low−power sleep mode enabled Fail Safe Motion The OTP bit enables or disables an automatic motion to a predefined secure position. See also Autonomous Motion. Table 36. FAIL SAFE ENABLE SELECTION Behavior 0 NO reference motion in case of LIN – lost 1 ENABLES reference motion to a secure position in case of LIN–lost (if the device has not been yet referenced with SetDualPosition) If OTP bit = 1, the reaction is the following: If the device has already been referenced, it is assumed that register contains the “real” actual position. At LIN – lost an absolute positioning to the stored secure position SecPos is done (identical to the case, when OTP bit = 0). If the device was not referenced yet, the register does not contain a valid position. At LIN – lost a referencing is started using DualPositioning. A first negative motion of half the positioner range is initiated until the stall position is reached. The motion parameters stored in OTP will be used for this. After this mechanical end−position is reached, will be reset to zero. A second motion of 10 Fullsteps is executed to assure that the motion is really at the end position. After the second motion, a third motion is executed to the Secure Position also stored in OTP; if = 0x400, this second motion is not executed. Following sequence will be followed. See Figure 24. 1. from RAM register will be used. This can be different from OTP register if earlier LIN master communication has updated this. See also Secure Position and command SetMotorParam. I. If = 0x400: No Secure Positioning will be performed II. If ≠ 0x400: Perform a Secure Positioning. This is an absolute positioning (slave knows its ActPos. will be copied in ) Depending on AMIS−30623 will enter the state or the state. See Table 35. AMIS−30623 is able to perform an Autonomous Motion to a preferred position. This positioning starts after the detection of lost LIN communication and depends on: − the OTP bit = 1. − RAM register ≠ 0x400 The functional behavior depends if LIN communication is lost during normal operation (see figure below case A) or at (or before) startup (case B): Power Up OTP content is copied in RAM No LIN Bus OK B Yes A Figure 23. Flow Chart Power−Up of AMIS−30623 (Case A: LIN lost during operation and Case B: LIN lost at startup) LIN Lost During Normal Operation If the LIN communication is lost during normal operation, it is assumed that AMIS−30623 is referenced (by Dual postioning or Resetposition). In other words the register contains the “real” actual position. At LIN – lost an absolute positioning to the stored secure position SecPos is done. This is further called Secure Positioning. www.onsemi.com 42 AMIS−30623 Important Remarks: 1. The Secure Position has a resolution of 11 bit. 2. Same behavior in case of HW2 float (= lost LIN address), except for entering Sleep mode. If HW2 is floating, but there is LIN communication, Sleep mode is not entered. See also Hardwired Address HW2. A Normal Operation GetFullStatus SetMotorParam (RAM content is overwritten) Yes No LIN bus OK FailSafe = 1 No Yes Yes Reference done? No First motion of DualPosition Half the position range Negative direction At Stall −> ActPos = ’0000’ No SecPos ≠ 0x400 Yes STOP Secure Positioning to SecPos stored in RAM SleepEn = 1 No Yes SLEEP STOP Figure 24. Case A: LIN Lost During Normal Operation www.onsemi.com 43 AMIS−30623 LIN Lost Before or At Power On positioner range is initiated until the stall position is reached. The motion parameters stored in OTP will be used for this. After this mechanical end position is reached, will be reset to zero. A second motion will start to the Secure Position also stored in OTP. More details are given below. If the LIN communication is lost before or at power on, the register does not reflect the “real” actual position. So at LIN – lost a referencing is started using DualPositioning. A first negative motion for half the B No FailSafe = 1 Yes First motion of DualPosition Half the position range Negative direction At Stall −> ActPos = ‘0000’ No SecPos ≠ 0x400 Yes STOP Secure Positioning to SecPos stored in RAM, copied from OTP SleepEn = 1 No Yes STOP SLEEP Figure 25. Case B: LIN Lost at or During Start−Up − If ≠ 0x400: A second motion to is performed. The direction is given by in combination with . Motion is done with parameters from OTP. Depending on SleepEn AMIS−30623 will enter the state or state. See Table 35. If LIN is lost before or at power on, following sequence will be followed. See Figure 25. 1. If the LIN communication is lost AND = 0, secure positioning will be done at absolute position (stored secure position .) Depending on SleepEn AMIS−30623 will enter the state or state. See Table 35. 2. If the LIN communication is lost AND = 1 a referencing is started using DualPositioning, meaning a negative motion for half the positioner range is initiated until the stall position is reached. The motion parameters stored in OTP will be used for this. After this mechanical end position is reached will be reset to zero. The direction of the motion is given by the Shaft bit. − If = 0x400: No Second Motion will be performed. Important Remarks: 1. The Secure Position has only a resolution of 9 bit because only the 9 MSB’s will be copied from OTP to RAM. See also Secure Position 2. The motion direction to SecPos is given by the Shaft bit in OTP. 3. In case of HW2 float (= lost LIN address), the behavior is the same as described above, except for going to sleep mode. In that case failsafe operation due to HW2 float is not leading to the sleep state, otherwise the LIN communication will wake−up the node and cycling through POR will occur. See also Hardwired Address HW2. www.onsemi.com 44 AMIS−30623 LIN APPLICATION COMMANDS Introduction The LIN Master will have to use commands to manage the different application tasks the AMIS−30623 can feature. The commands summary is given in Table 37 below. Table 37. COMMANDS SUMMARY Command Mnemonic Frames Code Prep # Read # Write # GetActualPos 0x00 7, 8 5, 6 Returns the actual position of the motor GetFullStatus 0x01 7, 8 6 Returns a complete status of the circuit GetOTPparam 0x02 7, 8 6 Returns the OTP memory content GetStatus 0x03 5 Returns a short status of the circuit Description READING COMMAND WRITING COMMANDS GotoSecurePosition 0x04 1 Drives the motor to its secure position HardStop 0x05 1 Immediate motor stop ResetPosition 0x06 1 Actual position becomes the zero position RunVelocity 0x17 1 Drives motor continuously SetDualPosition 0x08 4 Drives the motor to 2 different positions with different speeds SetMotorParam 0x09 4 Programs the motion parameters and values for the current in the motor’s coils SetOTPparam 0x10 4 Programs (and zaps) a selected byte of the OTP memory Programs the motion detection parameters SetStallparam 0x16 4 SetPosition 0x0B 1, 3, 4 SetPositionShort (1 m.) 0x0C 2 Drives the motor to a given position (half step mode only) SetPositionShort (2 m.) 0x0D 2 Drives two motors to 2 given positions (half step only) SetPositionShort (4 m.) 0x0E 2 Drives four motors to 4 given positions (half step only) SetPosParam 0x2F 2 Drives the motor to a given position and programs some of the motion parameters. 1 Drives circuit into sleep mode if = 1 Drives circuit into stopped mode if if = 0 Drives the motor to a given position SERVICE COMMANDS Sleep SoftStop 0x0F 1 Motor stopping with a deceleration phase TestBemf 0x1F 1 Outputs Bemf voltage on pin SWI These commands are described hereafter, with their corresponding LIN frames. Refer to LIN Frames for more details on LIN frames, particularly for what concerns dynamic assignment of identifiers. A color coding is used to distinguish between master and slave parts within the frames and to highlight dynamic identifiers. An example is shown below. Figure 26. Color Code Used in the Definition of LIN Frames Usually, the AMIS−30623 makes use of dynamic identifiers for general−purpose 2, 4 or 8 bytes writing frames. If dynamic identifiers are used for other purposes, this is acknowledged. www.onsemi.com 45 AMIS−30623 position () is returned in signed two’s complement 16−bit format. One should note that according to the programmed stepping mode, the LSB’s of may have no meaning and should be assumed to be ‘0’, as prescribed in Position Ranges. GetActualPos also provides a quick status of the circuit and the stepper−motor, identical to that obtained by command GetStatus (see further). Note: A GetActualPos command will not attempt to reset any flag. Some frames implement a bit that allows addressing a command to all the AMIS−30623 circuits connected to the same LIN bus. is active when at ‘0’, in which case the physical address provided in the frame is thus not taken into account by the slave nodes. Application Commands GetActualPos This command is provided to the circuit by the LIN master to get the actual position of the stepping−motor. This GetActualPos corresponds to the following LIN reading frames. 1. four data bytes in−frame response with direct ID (type #5) Table 38. READING FRAME TYPE #5 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 1 0 ID3 ID2 ID1 ID0 1 Data 1 ESW 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 5 Checksum VddReset AD[6:0] StepLoss ElDef UV2 TSD TW Tinfo[1:0] Checksum over data Where: (*) According to parity computation ID[5:0]: Dynamically allocated direct identifier. There should be as many dedicated identifiers to this GetActualPos command as there are stepper−motors connected to the LIN bus. Note: Bit 5 and bit 4 in byte 0 indicate the number of data bytes. 2. The master sends either a type#7 or type#8 preparing frame. After the type#7 or #8 preparing frame, the master sends a reading frame type#6 to retrieve the circuit’s in−frame response. Table 39. GetActualPos PREPARING FRAME TYPE #7 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x00 2 Data 2 1 AD[6:0] 3 Checksum Checksum over data www.onsemi.com 46 AMIS−30623 Table 40. GetActualPos PREPARING FRAME TYPE #6 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 ESW 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 5 Data 5 0xFF 6 Data 6 0xFF 7 Data 7 0xFF VddReset AD[6:0] StepLoss ElDef UV2 TSD 8 Data 8 0xFF 9 Checksum Checksum over data TW Tinfo[1:0] Where: (*) According to parity computation Table 41. GetActualPos PREPARING FRAME TYPE #8 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x00 3 Data 3 1 AD[6:0] 4 Data 4 Data4[7:0] FF 5 Data 5 Data5[7:0] FF 6 Data 6 Data6[7:0] FF 7 Data 7 Data7[7:0] FF AppCMD =80 8 Data 8 Data8[7:0] FF 9 Checksum Checksum over data Table 42. GetActualPos READING FRAME TYPE #6 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 ESW 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 5 Data 5 0xFF 6 Data 6 0xFF 7 Data 7 0xFF 8 Data 8 0xFF 9 Checksum Checksum over data VddReset AD[6:0] StepLoss ElDef UV2 www.onsemi.com 47 TSD TW Tinfo[1:0] AMIS−30623 GetFullStatus The master sends either type#7 or type#8 preparing frame. GetFullStatus corresponds to 2 successive LIN in−frame responses with 0x3D indirect ID. Note: It is not mandatory for the LIN master to initiate the second in−frame response if the data in the second response frame is not needed by the application. This command is provided to the circuit by the LIN master to get a complete status of the circuit and the stepper−motor. Refer to RAM Registers and Flags Table to see the meaning of the parameters sent to the LIN master. Note: A GetFullStatus command will attempt to reset flags , , , , , , , , , , , and . 1. The master sends a type #7 preparing frame. After the type#7 preparing frame, the master sends a reading frame type#6 to retrieve the circuit’s in−frame response. Table 43. GetFullStatus PREPARING FRAME TYPE #7 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x01 2 Data 2 1 AD[6:0] 3 Checksum Checksum over data Table 44. GetFullStatus READING FRAME TYPE #6 (1) Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 Data 1 1 1 1 0 1 2 Data 2 Irun[3:0] Ihold[3:0] 3 Data 3 Vmax[3:0] Vmin[3:0] 4 Data 4 AccShape 5 Data 5 VddReset 6 Data 6 7 Data 7 8 Data 8 9 Checksum AD[6:0] StepMode[1:0] StepLoss Shaft ElDef UV2 Motion[2:0] 1 1 Acc[3:0] 1 TSD TW Tinfo[1:0] ESW OVC1 OVC2 Stall CPFail 1 TimeE DataE HeadE BitE AbsThr[3:0] DelThr[3:0] Checksum over data Table 45. GetFullStatus READING FRAME TYPE #6 (2) Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 1 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 TagPos[15:8] 5 Data 5 TagPos[7:0] 6 Data 6 SecPos[7:0] 7 Data 7 8 Data 8 9 Checksum AD[6:0] FS2StallEn[2:0] AbsStall DelStallLo 1 DelStallHi DC100 SecPos[10:8] MinSamples[2:0] DC100StEn Checksum over data Where: (*) According to parity computation www.onsemi.com 48 PWMJEn AMIS−30623 2. The master sends a type #8 preparing frame. After the type#8 preparing frame, the master sends a reading frame type#6 to retrieve the circuit’s in−frame response. Table 46. GetFullStatus PREPARING FRAME TYPE#8 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x01 3 Data 3 1 AD[6:0] 4 Data 4 Data4[7:0] FF 5 Data 5 Data5[7:0] FF 6 Data 6 Data6[7:0] FF 7 Data 7 Data7[7:0] FF 8 Data 8 Data8[7:0] FF 9 Checksum Checksum over data AppCMD =80 Table 47. GetFullStatus READING FRAME TYPE #6 (1) Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 1 2 Data 2 Irun[3:0] Ihold[3:0] 3 Data 3 Vmax[3:0] Vmin[3:0] 4 Data 4 AccShape 5 Data 5 VddReset 6 Data 6 7 Data 7 8 Data 8 6 Checksum AD[6:0] StepMode[1:0] StepLoss Shaft ElDef Motion[2:0] 1 1 1 Acc[3:0] UV2 TSD TW ESW OVC1 OVC2 Stall CPFail 1 TimeE DataE HeadE BitE AbsThr[3:0] Tinfo[1:0] DelThr[3:0] Checksum over data Table 48. GetFullStatus READING FRAME TYPE #6 (2) Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 1 2 Data 2 ActPos[15:8] 3 Data 3 ActPos[7:0] 4 Data 4 TagPos[15:8] 5 Data 5 TagPos[7:0] 6 Data 6 SecPos[7:0] 7 Data 7 8 Data 8 9 Checksum AD[6:0] FS2StallEn[2:0] AbsStall DelStallLo 1 DelStallHi DC100 MinSamples[2:0] Checksum over data www.onsemi.com 49 SecPos[10:8] DC100StEn PWMJEn AMIS−30623 GetOTPparam This command is provided to the circuit by the LIN master after a preparing frame (see Preparing frames), to read the content of an OTP memory segment which address was specified in the preparation frame. GetOTPparam corresponds to a LIN in−frame response with 0x3D indirect ID. 1. The master sends a type #7 preparing frame. After the type#7 preparing frame, the master sends a reading frame type#6 to retrieve the circuit’s in−frame response. Table 49. GetOTPparam PREPARING FRAME TYPE #7 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x02 2 Data 2 1 AD[6:0] 3 Checksum Checksum over data Table 50. GetOTPparam READING FRAME TYPE #6 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 OTP byte @0x00 2 Data 2 OTP byte @0x01 3 Data 3 OTP byte @0x02 4 Data 4 OTP byte @0x03 5 Data 5 OTP byte @0x04 6 Data 6 OTP byte @0x05 7 Data 7 OTP byte @0x06 8 Data 8 OTP byte @0x07 9 Checksum Checksum over data Where: (*) According to parity computation 2.) The master sends a type #8 preparing frame. After the type#8 preparing frame, the master sends a reading frame type#6 to retrieve the circuit’s in−frame response. Table 51. GetOTPparam PREPARING FRAME TYPE #8 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x02 3 Data 3 1 AD[6:0] 4 Data 4 Data4[7:0] FF 5 Data 5 Data5[7:0] FF 6 Data 6 Data6[7:0] FF 7 Data 7 Data7[7:0] FF 8 Data 8 Data8[7:0] FF 9 Checksum Checksum over data AppCMD =80 www.onsemi.com 50 AMIS−30623 Table 52. GetOTPparam READING FRAME TYPE #6 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 1 1 1 1 1 0 1 1 Data 1 OTP byte @0x00 2 Data 2 OTP byte @0x01 3 Data 3 OTP byte @0x02 4 Data 4 OTP byte @0x03 5 Data 5 OTP byte @0x04 6 Data 6 OTP byte @0x05 7 Data 7 OTP byte @0x06 8 Data 8 OTP byte @0x07 9 Checksum Checksum over data GetStatus Note: A GetStatus command will attempt to reset flags , , , , and . This command is provided to the circuit by the LIN master to get a quick status (compared to that of GetFullStatus command) of the circuit and of the stepper−motor. Refer to Flags Table to see the meaning of the parameters sent to the LIN master. GetStatus corresponds to a 2 data bytes LIN in−frame response with a direct ID (type #5). Table 53. GetStatus READING FRAME TYPE #5 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 ESW 2 Data 2 VddReset 3 Checksum AD[6:0] StepLoss ElDef UV2 TSD TW Tinfo[1:0] Checksum over data Where: (*) According to parity computation ID[5:0]: Dynamically allocated direct identifier. There should be as many dedicated identifiers to this GetStatus command as there are stepper−motors connected to the LIN bus. GotoSecurePosition This command is provided by the LIN master to one or all of the stepper−motors to move to the secure position . It can also be internally triggered if the LIN bus communication is lost, after an initialization phase, or prior to going into sleep mode. See the priority encoder description for more details. The priority encoder table also acknowledges the cases where a GotoSecurePosition command will be ignored. Note: The dynamic ID allocation has to be assigned to ‘General Purpose 2 Data bytes’ ROM pointer, i.e. ‘0000’. The command is decoded only from the command data. www.onsemi.com 51 AMIS−30623 GotoSecurePosition corresponds to the following LIN writing frame (type #1). Table 54. GotoSecurePosition WRITING FRAME TYPE #1 Structure Bit 7 Bit 6 Bit 5 Bit 4 Identifier * * 0 ID4 Data 1 CMD[6:0] = 0x04 2 Data Broad AD[6:0] 3 Checksum Byte Content 0 1 Bit 3 Bit 2 Bit 1 Bit 0 ID3 ID2 ID1 ID0 Checksum over data Where: (*) according to parity computation Broad: If Broad = ‘0’ all the stepper motors connected to the LIN bus will reach their secure position HardStop Note: The dynamic ID allocation has to be assigned to ‘General Purpose 2 Data bytes’ ROM pointer, i.e. ‘0000’. The command is decoded only from the command data. A hardstop command can also be issued by the LIN master for some safety reasons. It corresponds then to the following two data bytes LIN writing frame (type #1). This command will be internally triggered when an electrical problem is detected in one or both coils, leading to shutdown mode. If this occurs while the motor is moving, the flag is raised to allow warning of the LIN master at the next GetStatus command that steps may have been lost. Once the motor is stopped, register is copied into register to ensure keeping the stop position. Table 55. HardStop WRITING FRAME TYPE #1 Structure Bit 7 Bit 6 Bit 5 Bit 4 Identifier * * ID5 ID4 Data 1 CMD[6:0] = 0x05 2 Data Broad AD[6:0] 3 Checksum Byte Content 0 1 Bit 3 Bit 2 Bit 1 Bit 0 ID3 ID2 ID1 ID0 Checksum over data Where: (*) according to parity computation Broad: If broad = ‘0’ all stepper motors connected to the LIN bus will stop ResetPosition Note: The dynamic ID allocation has to be assigned to ‘General Purpose 2 Data bytes’ ROM pointer, i.e. ‘0000’. The command is decoded only from the command data. This command is provided to the circuit by the LIN master to reset and registers to zero. This can be helpful to prepare for instance a relative positioning. The reset position command sets the internal flag “Reference done”. ResetPosition corresponds to the following LIN writing frames (type #1). Table 56. ResetPosition WRITING FRAME TYPE #1 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * ID5 ID4 ID3 ID2 ID1 ID0 1 Data 1 CMD[6:0] = 0x06 2 Data Broad AD[6:0] 3 Checksum Checksum over data Where: (*) according to parity computation Broad: If broad = ‘0’ all the circuits connected to the LIN bus will reset their and registers www.onsemi.com 52 AMIS−30623 Note: The dynamic ID allocation has to be assigned to ‘General Purpose 2 Data bytes’ ROM pointer, i.e. ‘0000’. The command is decoded only from the command data. Note: Continuous LIN communication is required. If not, Lost−LIN is detected and an autonomous motion will start. See also LIN lost behavior. RunVelocity This command is provided to the circuit by the LIN Master in order to put the motor in continuous motion state. Note: in this mode (RunVelocity), the shaft bit has no impact on the direction of movement. RunVelocity corresponds to the following LIN writing frames (type #1). Table 57. RunVelocity WRITING FRAME TYPE #1 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * ID5 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x17 2 Data 2 Broad AD[6:0] 3 Checksum Checksum over data Where: (*) according to parity computation Broad: If broad = ‘0’ all the stepper motors connected to the LIN bus will start continuous motion. SetDualPosition Note: This sequence cannot be interrupted by another positioning command. This command is provided to the circuit by the LIN master in order to perform a positioning of the motor using two different velocities. See Dual Positioning. After Dual positioning the internal flag “Reference done” is set. SetDualPosition corresponds to the following LIN writing frame with 0x3C identifier (type #4). Table 58. SetDualPositioning WRITING FRAME TYPE #4 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x08 3 Data 3 Broad AD[6:0] 4 Data 4 5 Data 5 Pos1[15:8] 6 Data 6 Pos1[7:0] 7 Data 7 Pos2[15:8] 8 Data 8 Pos2[7:0] 9 Checksum Checksum over data AppCMD = 0x80 Vmax[3:0] Vmin[3:0] Where: Broad: If broad = ‘0’ all the circuits connected to the LIN bus will run the dual positioning Vmax[3:0]: Max velocity for first motion Vmin[3:0]: Min velocity for first motion and velocity for the second motion Pos1[15:0]: First position to be reached during the first motion Pos2[15:0]: Relative position of the second motion www.onsemi.com 53 AMIS−30623 SetStallParam This command sets the motion detection parameters and the related stepper−motor parameters, such as the minimum and maximum velocity, the run and hold current, acceleration and step mode. See Motion detection for the meaning of the parameters sent by the LIN Master. SetStallParam corresponds to a 0x3C LIN command (type #4). Table 59. SetStallParam WRITING FRAME TYPE #4 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 3 Data 3 Broad 4 Data 4 Irun[3:0] Ihold[3:0] 5 Data 5 Vmax[3:0] Vmin[3:0] 6 Data 6 7 Data 7 8 Data 8 9 Checksum AppCMD = 0x80 CMD[6:0] = 0x16 AD[6:0] MinSamples[2:0] Shaft Acc[3:0] AbsThr[3:0] DelThr[3:0] FS2StallEn[2:0] AccShape StepMode[1:0] DC100StEn PWMJEn Checksum over data Where: Broad: If Broad = ‘0’ all the circuits connected to the LIN bus will set the parameters in their RAMs as requested SetMotorParam This command is provided to the circuit by the LIN master to set the values for the stepper motor parameters (listed below) in RAM. Refer to RAM Registers to see the meaning of the parameters sent by the LIN master. Important: If a SetMotorParam occurs while a motion is ongoing, it will modify at once the motion parameters (see Position Controller). Therefore the application should not change other parameters than and while a motion is running, otherwise correct positioning cannot be guaranteed. SetMotorParam corresponds to the following LIN writing frame with 0x3C identifier (type #4). Table 60. SetMotorParam WRITING FRAME TYPE #4 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 CMD[6:0] = 0x09 3 Data 3 Broad AD[6:0] 4 Data 4 Irun[3:0] Ihold[3:0] 5 Data 5 Vmax[3:0] Vmin[3:0] 6 Data 6 7 Data 7 8 Data 8 1 PWMJEn 9 Checksum AppCMD = 0x80 SecPos[10:8] Shaft Acc[3:0] SecPos[7:0] 1 PWMfreq 1 AccShape StepMode[1:0] Checksum over data Where: Broad: If Broad = ‘0’ all the circuits connected to the LIN bus will set the parameters in their RAMs as requested www.onsemi.com 54 AMIS−30623 SetOTPparam Important: This command must be sent under a specific VBB voltage value. See parameter VBBOTP in DC Parameters. This is a mandatory condition to ensure reliable zapping. This command is provided to the circuit by the LIN master to program the content D[7:0] of the OTP memory byte OTPA[2:0] and to zap it. SetMotorParam corresponds to a 0x3C LIN writing frames (type #4). Table 61. SetOTPparam WRITING FRAME TYPE #4 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 3 Data 3 Broad 4 Data 4 1 5 Data 5 D[7:0] 6 Data 6 0xFF 7 Data 7 0xFF 8 Data 8 0xFF 9 Checksum Checksum over data AppCMD = 0x80 CMD[6:0] = 0x10 AD[6:0] 1 1 1 1 OTPA[2:0] Where: Broad: If Broad = ‘0’ all the circuits connected to the LIN bus will set the parameters in their OTP memories as requested SetPosition This command is provided to the circuit by the LIN master to drive one or two motors to a given absolute position. See Positioning for more details. The priority encoder table (See Priority Encoder) describes the cases where a SetPosition command will be ignored. SetPosition corresponds to the following LIN write frames. 1. Two (2) Data bytes frame with a direct ID (type #3) Table 62. SetPosition WRITING FRAME TYPE #3 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 Pos[15 :8] 2 Data 2 Pos[7 :0] 3 Checksum Checksum over data Where: (*) According to parity computation ID[5:0]: Dynamically allocated direct identifier. There should be as many dedicated identifiers to this SetPosition command as there are stepper−motors connected to the LIN bus. www.onsemi.com 55 AMIS−30623 2. Four (4) Data bytes frame with general purpose identifier (type #1). Note: The dynamic ID allocation has to be assigned to ‘General Purpose 4 Data bytes’ ROM pointer, i.e. ‘0001’. Table 63. SetPosition WRITING FRAME TYPE #1 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 1 0 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x0B 2 Data 2 Broad AD[6:0] 3 Data 3 Pos[15:8] 4 Data 4 Pos[7:0] 5 Checksum Checksum over data Where: (*) According to parity computation Broad: If broad = ‘0’ all the stepper motors connected to the LIN will must go to Pos[15:0]. 3. Two (2) motors positioning frame with 0x3C identifier (type #4) Table 64. SetPosition WRITING FRAME TYPE #4 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 2 Data 2 1 3 Data 3 1 4 Data 4 Pos1[15:8] 5 Data 5 Pos1[7:0] 6 Data 6 7 Data 7 Pos2[15:8] 8 Data 8 Pos2[7:0] 9 Checksum Checksum over data AppCMD = 0x80 CMD[6:0] = 0x0B AD1[6:0] 1 AD2[6:0] Where: Adn[6:0] : Motor #n physical address (n ∈ [1,2]). Posn[15:0] : Signed 16−bit position set−point for motor #n. www.onsemi.com 56 AMIS−30623 SetPositionShort are corresponding to the bits PA[3:0] in OTP memory (address 0x02) See Physical Address of the Circuit. For SetPositionShort it is recommended to set HW0, HW1 and HW2 to ’1’. The priority encoder table (See Priority Encoder) describes the cases where a SetPositionShort command will be ignored. This command is provided to the circuit by the LIN Master to drive one, two or four motors to a given absolute position. It applies only for half stepping mode (StepMode[1:0] = “00”) and is ignored when in other stepping modes. See Positioning for more details. The physical address is coded on 4 bits, hence SetPositionShort can only be used with a network implementing a maximum of 16 slave nodes. These 4 bits SetPositionShort corresponds to the following LIN writing frames: 1. Two (2) data bytes frame for one (1) motor, with specific identifier (type #2) Table 65. SetPositionShort WRITING FRAME TYPE #2 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 2 Data 2 Pos [7:0] 3 Checksum Checksum over data Pos[10:8] Broad AD [3:0] Where: (*) According to parity computation Broad: If broad = ‘0’ all the stepper motors connected to the LIN bus will go to Pos[10:0]. ID[5:0]: Dynamically allocated identifier to two data bytes SetPositionShort command. 2. Four (4) data bytes frame for two (2) motors, with specific identifier (type # 2) Table 66. SetPositionShort WRITING FRAME TYPE #2 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 1 0 ID3 ID2 ID1 ID0 1 Data 1 2 Data 2 3 Data 3 4 Data 4 Pos2[7:0] 5 Checksum Checksum over data Pos1[10:8] 1 Pos2[10:8] 1 AD1[3:0] Pos1[7:0] AD2[3:0] Where: (*) according to parity computation ID[5:0]: Dynamically allocated identifier to four data bytes SetPositionShort command. Adn[3:0]: Motor #n physical address least significant bits (n ∈ [1,2]). Posn[10:0]: Signed 11−bit position set point for Motor #n (see RAM Registers) www.onsemi.com 57 AMIS−30623 3. Eight (8) data bytes frame for four (4) motors, with specific identifier (type #2) Table 67. SetPositionShort WRITING FRAME TYPE #2 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 1 1 ID3 ID2 ID1 ID0 1 Data 1 2 Data 2 3 Data 3 4 Data 4 5 Data 5 6 Data 6 7 Data 7 8 Data 8 Pos4[7:0] 9 Checksum Checksum over data Pos1[10:8] 1 AD1[3:0] Pos1[7:0] Pos2[10:8] 1 AD2[3:0] Pos2[7:0] Pos3[10:8] 1 AD3[3:0] Pos3[7:0] Pos4[10:8] 1 AD4[3:0] Where: (*) according to parity computation ID[5:0]: Dynamically allocated identifier to eight data bytes SetPositionShort command. Adn[3:0]: Motor #n physical address least significant bits (n ∈ [1,4]). Posn[10:0]: Signed 11−bit position set point for Motor #n (see RAM Registers) SetPosParam This command is provided to the circuit by the LIN Master to drive one motor to a given absolute position. It also sets some of the values for the stepper motor parameters such as minimum and maximum velocity. SetPosParam corresponds to a four (4) data bytes writing LIN frame with specific dynamically assigned identifier (type # 2). Table 68. SetPosParam WRITING FRAME TYPE #2 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 1 0 ID3 ID2 ID5 ID4 1 Data 1 Pos[15:8] 2 Data 2 Pos[7:0] 3 Data 3 Vmax[3:0] 4 Data 4 AbsThr[3:0] 5 Checksum Vmin[3:0] Acc[3:0] Checksum over data Where: (*) according to parity computation Broad: If broad = ‘0’ all the stepper motors connected to the LIN bus will stop with deceleration. ID[5:0]: Dynamically allocated direct identifier to 4 Data bytes SetPosParam command. There should be as many dedicated identifiers to this SetPosParam command as there are stepper−motors connected to the LIN bus. Pos [15:0]: Signed 16−bit position set−point. Sleep frame is a master request command frame (identifier 0x3C) with data byte 1 containing 0x00 while the followings contain 0xFF. Note: SleepEnable needs to be set to 1 in order to allow the device to go to sleep. If SleepEnable is 0 the device will go into “stopped state” This command is provided to the circuit by the LIN master to put all the slave nodes connected to the LIN bus into sleep mode. If this command occurs during a motion of the motor, TagPos is reprogrammed to SecPos (provided SecPos is different from “100 0000 0000”), or a SoftStop is executed before going to sleep mode. See LIN 1.3 specification and Sleep Mode. The corresponding LIN www.onsemi.com 58 AMIS−30623 Table 69. SLEEP WRITING FRAME Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier 0 0 1 1 1 1 0 0 1 Data 1 0x00 2 Data 2 0xFF 3 Checksum Checksum over data SoftStop Note: A SoftStop command occurring during a DualPosition sequence is not taken into account. Command SoftStop occurs in the following cases: • The chip temperature rises above the thermal shutdown threshold (see DC Parameters and Temperature Management); • The LIN master requests a SoftStop. Hence SoftStop will correspond to the following two data bytes LIN writing frame (type #1). If a SoftStop command occurs during a motion of the stepper motor, it provokes an immediate deceleration to Vmin (see Minimum Velocity) followed by a stop, regardless of the position reached. Once the motor is stopped, TagPos register is overwritten with value in ActPos register to ensure keeping the stop position. Note: The dynamic ID allocation has to be assigned to ‘General Purpose 2 Data bytes’ ROM pointer ‘0000’. The command is decoded only from the command data. Table 70. SoftStop WRITING FRAME TYPE #1 Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x0F 2 Data 2 Broad AD[6:0] 3 Checksum Checksum over data Where: (*) according to parity computation Broad: If broad = ‘0’ all the stepper motors connected to the LIN bus will stop with deceleration. TestBemf (not applicable for “Product Versions PGA & PNA”) Note: The dynamic ID allocation has to be assigned to ‘General Purpose 2 Data bytes’ ROM pointer, i.e. ‘0000’. The command is decoded only from the command data. TestBemf corresponds to the following LIN writing frames (type #1). This command is provided to the circuit by the LIN Master in order to output the Bemf integrator output to the SWI output of the chip. Once activated, it can be stopped only after POR. During the Bemf observation, reading of the SWI state is internally forbidden. Table 71. TestBemf WRITING FRAME Structure Byte Content Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 0 Identifier * * 0 ID4 ID3 ID2 ID1 ID0 1 Data 1 1 CMD[6:0] = 0x1F 2 Data 2 Broad AD[6:0] 3 Checksum Checksum over data Where: (*) according to parity computation Broad: If broad = ‘0’ all the stepper motors connected to the LIN bus will be affected. www.onsemi.com 59 AMIS−30623 PACKAGE DIMENSIONS SOIC 20 W CASE 751AQ−01 ISSUE O www.onsemi.com 60 AMIS−30623 PACKAGE DIMENSIONS QFNW32 7x7, 0.65P CASE 484BB ISSUE O DATE 14 DEC 2021 GENERIC MARKING DIAGRAM* XXXXXXXXX XXXXXXXXX AWLYYWWG XXXX = Specific Device Code A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. www.onsemi.com 61 AMIS−30623 onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. 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