ASM3P2182AF-08ST

ASM3P2182A LCD Panel EMI Reduction IC Features • FCC approved method of EMI attenuation. • Provides up to 15dB EMI reduction. • Generates a 1X low EMI spread spectrum clock of the input frequency. • Input frequency range: 25MHz to 210MHz. • Internal loop filter minimizes external components and board space. • Center spread. • 4 spread frequency deviation selections: ± 0.13% to ± 1.24%. • Low inherent Cycle-to-cycle jitter. • 3.3V Operating Voltage. • TTL or CMOS compatible inputs and outputs. • Low power CMOS design. • Supports notebook VGA and other LCD timing controller applications. The ASM3P2182A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data dependent signals. The ASM3P2182A allows significant system cost savings by reducing the number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass EMI regulations. The ASM3P2182A uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method. The ASM3P2182A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation.’ • Available in 8-pin SOIC Package. Product Description The ASM3P2182A is a versatile spread spectrum frequency modulator designed specifically for a wide range of input clock frequencies from 25MHz to 210MHz. (Refer to Input Frequency and Modulation Rate Table). The ASM3P2182A can generate an EMI reduced clock from an OSC or a system generated clock. The ASM3P2182A offers a Center Spread clock and with a percentage deviation from ± 0.13% or ± 1.24%. S0 FS0 FS1 Applications The ASM3P2182A is targeted towards EMI management for memory and LVDS interfaces in mobile graphic chipsets and high-speed digital applications such as PC peripheral devices, consumer electronics, and embedded controller systems. VDD Modulation CLKIN Crystal Oscillato r Frequency Divider Feedback Divider PLL Phase Detector Loop Filter VCO Output Divider ModOUT VSS ©2010 SCILLC. All rights reserved. JANUARY 2010 – Rev. 2 Publication Order Number: ASM3P2182/D ASM3P2182A Pin Configuration CLKIN 1 GND 2 ASM3P2182A S1 3 S0 4 8 FS1 7 FS0 6 VDD 5 ModOUT Pin Description Pin# Pin Name 1 2 3 4 5 6 7 CLKIN GND S1 S0 ModOUT VDD FS0 Type I P I I O P I Description Connect to externally generated clock signal. Ground to entire chip. Spread range select. Digital logic input used to select frequency deviation (Refer to Spread Deviation Table). This pin has an internal pull-up resistor. Spread range select. Digital logic input used to select frequency deviation (Refer to Spread Deviation Table). This pin has an internal pull-up resistor. Spread spectrum low EMI output. Power supply for the entire chip (3.3V). Frequency range select. Digital logic input used to select frequency range (Refer to Input Frequency and Modulation Rate Table). This pin has an internal pull-up resistor. Frequency range select. Digital logic input used to select frequency range (Refer to Input Frequency and Modulation Rate Table). This pin has an internal pull-up resistor. 8 FS1 I Input Frequency and Modulation Rate table FS1 (pin 8) 0 0 1 1 FS0 (pin 7) 0 1 0 1 Frequency Range 25MHz to 50MHz 50MHz to 103MHz 75MHz to 150MHz 160MHz to 210MHz Rev. 2 | Page 2 of 6 | www.onsemi.com ASM3P2182A Spread Deviation Selection table S1 0 0 1 1 S0 0 1 0 1 25 MHz 0.28 0.8 1.2 2.1 40 MHz 0.19 0.3 0.54 1.0 65 MHz 0.15 0.3 0.45 1.1 Spreading Range (± %) 1 2 81 81 108 MHz MHz MHz 0.12 0.2 0.4 0.9 0.18 0.5 0.8 1.4 0.15 0.3 0.6 1.1 120 MHz 0.1 0.19 0.36 0.75 162 MHz 0.1 0.3 1.0 1.9 200 MHz 0.06 0.1 0.6 1.2 Notes: 1. Frequency Range- 50MHz to 103MHz 2. Frequency Range- 75MHz to 150MHz Absolute Maximum Ratings Symbol VDD VIN VOUT TSTG Ts TJ TDV Parameter Rating -0.5 to +4.6 VSS-0.5 to VDD+0.5 VSS-0.5 to VDD+0.5 -55 to +125 260 150 2 Unit V V V ° C ° C ° C KV Supply Voltage pin with respect to Ground Input Voltage pin with respect to Ground Output Voltage pin with respect to Ground Storage temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22-A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Recommended Operating Conditions Parameter VDD TA CL CIN Operating Voltage Operating Temperature (Ambient Temperature) Load Capacitance Input Capacitance 5 Description Min 2.7 -40 Typ 3.3 Max 3.7 +85 15 Unit V ° C pF pF Rev. 2 | Page 3 of 6 | www.onsemi.com ASM3P2182A DC Electrical Characteristics Symbol Parameter VIL VIH IIL IIH VOL VOH ICC IDD VDD tON ZOUT Input low voltage Input high voltage Input low current Input high current Output low voltage (VDD = 3.3V, IOL = 20mA) Output high voltage (VDD = 3.3V, IOH = 20mA) Dynamic supply current Normal mode (3.3V and 10pF loading) Static supply current 1 Standby mode Operating voltage Power up time (first locked clock cycle after power up) Clock out impedance 2.5 8.46 12 0.6 2.7 3.3 0.18 50 3.7 17.78 Min GND – 0.3 2.0 Typ Max 0.8 VDD + 0.3 -35 35 0.4 Unit V V µA µA V V mA mA V mS Note: 1. CLKIN pin is pulled low. AC Electrical Characteristics Symbol CLKIN ModOUT 1 tLH Parameter Input frequency Output frequency Output rise time (measured at 0.8V to 2.0V) Output fall time (measured at 2.0V to 0.8V) Jitter (cycle to cycle) Output duty cycle Min 25 25 1.2 0.8 Typ Max 210 210 Unit MHz MHz nS nS pS % 1.32 0.9 1.4 1.0 ±360 tHL 1 tJC TD 45 50 55 Note: 1. tLH and tHL are measured into a capacitive load of 15pF. Rev. 2 | Page 4 of 6 | www.onsemi.com ASM3P2182A Package Information 8-lead (150-mil) SOIC Package E H D A2 A θ e A 1 B C L D Dimensions Inches Min A1 A A2 B C D E e H L θ 0.004 0.053 0.049 0.012 0.007 Symbol Max 0.010 0.069 0.059 0.020 0.010 Millimeters Min Max 0.10 1.35 1.25 0.31 0.18 4.90 BSC 3.91 BSC 1.27 BSC 6.00 BSC 0.41 0° 1.27 8° 0.25 1.75 1.50 0.51 0.25 0.193 BSC 0.154 BSC 0.050 BSC 0.236 BSC 0.016 0° 0.050 8° Rev. 2 | Page 5 of 6 | www.onsemi.com ASM3P2182A Ordering Information Part Number ASM3P2182AF-08ST ASM3P2182AF-08SR Marking ACV ACV Package 8-Pin SOIC, TUBE, Pb Free 8-Pin SOIC, TAPE & REEL, Pb Free Temperature 0° to +70° C C 0° to +70° C C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free. Licensed under US patent #5,488,627, #6,646,463 and #5,631,920. Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes ON Semiconductor and without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. 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