ASM3P2474A

ASM3P2474A Peak EMI Reducing Solution Features • • • • • • • • • • Generates an EMI optimized clock signal at the output. Integrated loop filter components. Operates with a 3.3V Supply. Operating current less than 6mA. CMOS design. Input frequency range : 13MHz to 30MHz Generates a 1X and 2X low EMI spread spectrum clock of the input frequency. Output Frequency Selection through FSEL pin Frequency deviation : -1.5% (Typ) @25MHz -1.5% (Typ) @50MHz Available in 6L-TSOP (6L-TSOT-23) package. The ASM3P2474A uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary all digital method. The ASM3P2474A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation.’ Applications The ASM3P2474A is targeted towards all portable devices like MP3 players and digital still cameras. Product Description The ASM3P2474A is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. The ASM3P2474A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of all clock dependent signals. The ASM3P2474A allows significant system cost savings by reducing the number of circuit board layers, ferrite beads and shielding that are traditionally required to pass EMI regulations. Key Specifications Description Supply voltages Cycle-to-Cycle Jitter Output Duty Cycle Modulation Rate Equation Frequency Deviation FSEL=0 FSEL=1 Specification VDD = 3.3V ± 0.3V ±200pS (Typ) 45/55% (worst case) FIN/640 -1.5% (Typ) @ 50MHz -1.5% (Typ) @ 25MHz Block Diagram VDD FSEL Modulation XIN / CLKIN XOUT Crystal Oscillator Frequency Divider Feedback Divider PLL Phase Detector Loop Filter VCO Output Divider ModOUT VSS ©2010 SCILLC. All rights reserved. JANUARY 2010 – Rev. 2 Publication Order Number: ASM3P2474/D ASM3P2474A Pin Configuration (6L-TSOP Package) FSEL 1 XOUT 2 6 VSS ASM3P2474A 5 4 ModOUT VDD XIN / CLKIN 3 Pin Description Pin# 1 2 3 4 5 6 Pin Name FSEL XOUT XIN / CLKIN VDD ModOUT VSS T ype I O I P O P Description Selection Pin for 1X and 2X Output Frequency Options. Please refer to the table Frequency Selection Options for further details. Crystal connection. If using an external reference, this pin must be left unconnected. Crystal connection or external reference frequency input. This pin has dual functions. It can be connected either to an external crystal or an external reference clock. Power supply for the entire chip. Spread spectrum clock output. Ground connection. Modulation Profile Specifications Description Frequency Range Modulation Equation Frequency Deviation FSEL=0 FSEL=1 Specification 13MHz < CLKIN < 30MHz FIN/640 -1.5% (Typ) @ 50MHz -1.5% (Typ) @ 25MHz Frequency Selection Options FSEL Pin 0 1 Input Frequency (MHz) 13-30 13-30 Output Frequency (MHz) 26-60 13-30 Rev. 2 | Page 2 of 7 | www.onsemi.com ASM3P2474A Absolute Maximum Ratings Symbol VDD, VIN TSTG Ts TJ TDV Storage temperature Max. Soldering Temperature (10 sec) Junction Temperature Static Discharge Voltage (As per JEDEC STD22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Parameter Voltage on any pin with respect to Ground Rating -0.5 to +4.6 -65 to +125 260 150 2 Unit V ° C ° C ° C KV Operating Conditions Parameter VDD TA CL CIN Supply Voltage Operating Temperature (Ambient Temperature) Load Capacitance Input Capacitance Description Min 3 0 Max 3.6 70 15 7 Unit V ° C pF pF DC Electrical Characteristics Symbol VIL VIH IIL IIH IXOL IXOH VOL VOH IDD ICC VDD tON ZOUT Input low voltage Input high voltage Input low current Input high current XOUT output low current (@ 0.4V, VDD = 3.3V) XOUT output high current (@ 2.5V, VDD = 3.3V) Output low voltage (VDD = 3.3V, IOL = 8mA) Output high voltage (VDD = 3.3V, IOH = 8mA) Static supply current Dynamic supply current (3.3V, 25MHz and no load and FSEL=1) Operating voltage Power-up time (first locked cycle after power-up) Output impedance 45 1 Parameter Min VSS-0.3 2.0 T yp Max 0.8 VDD+0.3 -35 35 Unit V V µA µA mA mA 3 3 0.4 2.5 1.6 4.0 3.0 3.3 3.6 5 V V mA mA V mS Note: 1. XIN /CLKIN pin is pulled low. Rev. 2 | Page 3 of 7 | www.onsemi.com ASM3P2474A AC Electrical Characteristics Symbol CLKIN ModOUT fd Input frequency Output frequency Frequency Deviation FSEL = 0 FSEL = 1 Output Frequency = 13MHz Output Frequency = 30MHz Output Frequency = 26MHz fd tLH tHL 1 1 Parameter Min 13 26 13 T yp Max 30 60 30 Unit MHz MHz % -1.8 -0.9 -1.8 -0.9 0.4 0.3 45 0.85 0.7 ±200 50 55 1.1 0.9 Frequency Deviation Output Frequency = 60MHz % nS nS pS % Output rise time (measured from 0.8 to 2.0V) Output fall time (measured at 2.0V to 0.8V) Jitter (cycle-to-cycle) Output duty cycle tJC tD Note: 1. tLH and tHL are measured into a capacitive load of 15pF. Typical Crystal Specifications Fundamental AT cut parallel resonant crystal Nominal frequency Frequency tolerance Operating temperature range Storage temperature Load capacitance(CP) Shunt capacitance ESR 25MHz ± 30 ppm or better at 25° C -25° to +85° C C -40° to +85° C C 18pF 7pF maximum 25 Ω Note: Note: CL is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency. Typical Crystal Interface Circuit R Crystal Rx CL CL CL = 2*(CP – CS), Where CP = Load capacitance of crystal CS = Stray capacitance due to CIN, PCB, Trace etc. Rev. 2 | Page 4 of 7 | www.onsemi.com ASM3P2474A Typical Application Schematic VDD C1 C2 2.2µF VDD 0.1µF ASM3P2474A Rs ModOUT ModOUT Clock VSS Rev. 2 | Page 5 of 7 | www.onsemi.com ASM3P2474A Package Information 6L-TSOP Package Dimensions Symbol Min A A1 A2 b H D B e C L θ 0.00 0.033 0.012 Inches Max 0.04 0.004 0.036 0.02 0.00 0.84 0.30 0.127 BSC 2.90 BSC 1.60 BSC 0.950 BSC 2.80 BSC 0.30 0° 0.50 4° Millimeters Min Max 1.00 0.10 0.90 0.50 0.005 BSC 0.114 BSC 0.06 BSC 0.0374 BSC 0.11 BSC 0.0118 0° 0.02 4° Rev. 2 | Page 6 of 7 | www.onsemi.com ASM3P2474A Ordering Information Part Number ASM3P2474AF-06OR Marking W 4L Package Type 6L-TSOP (6L-TSOT-23), TAPE & REEL, Pb Free Temperature 0° to +70° C C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free. Licensed under US Patent #5,488,627 and #5,631,921. Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes ON Semiconductor and without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. 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