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BSS123W
N-Channel Logic Level Enhancement Mode Field Effect
Transistor
Features
Description
• 0.17 A, 100 V, RDS(ON) = 6 Ω at VGS = 10 V
RDS(ON) = 10 Ω at VGS = 4.5 V
• High Density Cell Design for Low RDS(ON)
• Rugged and Reliable
• Ultra Small Surface Mount Package
• Very Low Capacitance
• Fast Switching Speed
• Lead Free / RoHS Compliant
This N-channel enhancement mode field effect transistor
is produced using high cell density, trench MOSFET
technology. This product minimizes on-state resistance
while providing rugged, reliable and fast switching performance. This product is particularly suited for low-voltage,
low-current applications such as small servo motor control, power MOSFET gate drivers, logic level transistor,
high speed line drivers, power management/power supply and switching applications.
D
D
S
SOT-323
G
G
S
Ordering Information
Part Number
Marking
Package
Packing Method
BSS123W
SA
SOT-323 3L
Tape and Reel
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. Values are at TA = 25°C unless otherwise noted.
Symbol
Value
Unit
VDSS
Drain-Source Voltage
100
V
VDGR
Drain-Gate Voltage RGS ≤ 20 kΩ
100
V
VGSS
Gate-Source Voltage
±20
V
ID
TJ, TSTG
Parameter
Drain Current
Operating and Storage Temperature Range
© 2015 Fairchild Semiconductor Corporation
BSS123W Rev. 1.0
Continuous
0.17
Pulsed
0.68
A
-55 to +150
°C
www.fairchildsemi.com
BSS123W — N-Channel Logic Level Enhancement Mode Field Effect Transistor
December 2015
Values are at TA = 25°C unless otherwise noted.
Symbol
PD
RθJA
Parameter
Value
Unit
Total Power Dissipation
200
mW
Derate Above 25°C
1.6
mW/°C
Thermal Resistance, Junction-to-Ambient(1)
625
°C/W
Note:
1. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch. Minimum land pad size.
Electrical Characteristics
Values are at TA = 25°C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
VGS = 0 V, ID = 250 μA
100
Typ.
Max.
Unit
VDS = 100 V, VGS = 0 V
1
μA
VDS = 20 V, VGS = 0 V
10
nA
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
V
IDSS
Zero Gate Voltage Drain Current
IGSSF
Gate-Body Leakage, Forward
VGS = 20 V, VDS = 0 V
50
nA
IGSSR
Gate-Body Leakage, Reverse
VGS = -20 V, VDS = 0 V
-50
nA
V
On
Characteristics(2)
VGS(th)
RDS(ON)
Gate Threshold Voltage
Static Drain-Source On-Resistance
VDS = VGS, ID = 1 mA
1.7
2.0
VGS = 10 V, ID = 0.17 A
0.8
1.39
6
VGS = 4.5 V, ID = 0.17 A
1.48
10
80
Ω
gFS
Forward Transconductance
VDS = 10 V, ID = 0.17 A
mS
VSD
Drain-Source Diode Forward
Voltage
VGS = 0 V, IS = 0.34 A
0.81
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
71
pF
6.6
pF
2.74
pF
1.30
V
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
(2)
tr
Turn-On Rise Time
tf
Turn-Off Fall Time
td(on)
Turn-On Delay
td(off)
Turn-Off Delay
VDD = 30 V, ID = 0.28 A,
VGS = 10 V, RGEN = 6 Ω
1.24
8
ns
5.73
16
ns
2.94
8
ns
8.4
13
ns
Note:
2. Pulse test: pulse width ≤ 300 μs, duty cycle ≤ 2.0%.
© 2015 Fairchild Semiconductor Corporation
BSS123W Rev. 1.0
www.fairchildsemi.com
2
BSS123W — N-Channel Logic Level Enhancement Mode Field Effect Transistor
Thermal Characteristics
1
1.6
VGS = 10V
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
3.5V
6.0V
ID, DRAIN CURRENT (A)
0.8
4.5V
3.0V
2.5V
0.6
0.4
0.2
1.5
1.4
VGS = 2.5V
1.3
1.2
3.0V
1.1
3.5V
4.5V
6.0V
10V
1
2.0V
0.9
0
0
1
2
3
4
0
5
0.2
2.2
0.8
1
3.4
ID = 170mA
VGS = 10V
2
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.6
Figure 2. On-Resistance Variation with Drain Current
and Gate Voltage
Figure 1. On-Region Characteristics
1.8
1.6
1.4
1.2
1
0.8
0.6
ID = 0.08A
3
TA = 125oC
2.6
2.2
1.8
1.4
TA = 25oC
1
0.4
-50
-25
0
25
50
75
100
125
0
150
2
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
o
TJ, JUNCTION TEMPERATURE ( C)
Figure 4. On-Resistance Variation with Gate-toSource Voltage
Figure 3. On-Resistance Variation with Temperature
1
1
IS, REVERSE DRAIN CURRENT (A)
VDS = 10V
ID, DRAIN CURRENT (A)
0.4
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
0.8
0.6
0.4
TA = 125oC
25oC
0.2
o
-55 C
0
VGS = 0V
0.1
TA = 125oC
25oC
0.01
-55oC
0.001
0.0001
1
1.5
2
2.5
3
0
VGS, GATE TO SOURCE VOLTAGE (V)
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation with
Source Current and Temperature
Figure 5. Transfer Characteristics
© 2015 Fairchild Semiconductor Corporation
BSS123W Rev. 1.0
0.2
www.fairchildsemi.com
3
BSS123W — N-Channel Logic Level Enhancement Mode Field Effect Transistor
Typical Performance Characteristics
f = 1 MHz
ID = 0.17A
VGS = 0 V
VDS = 30V
50V
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
10
8
70V
6
4
Ciss
100
Coss
10
Crss
2
0
0
0.4
0.8
1.2
1.6
1
0.1
2
10
100
Figure 8. Capacitance
Figure 7. Gate Charge Characteristics
© 2015 Fairchild Semiconductor Corporation
BSS123W Rev. 1.0
1
VDS - DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
www.fairchildsemi.com
4
BSS123W — N-Channel Logic Level Enhancement Mode Field Effect Transistor
Typical Performance Characteristics (Continued)
BSS123W — N-Channel Logic Level Enhancement Mode Field Effect Transistor
Physical Dimensions
Figure 9. 3-LEAD, SC70, EIAJ SC-70, 1.25MM WIDE
© 2015 Fairchild Semiconductor Corporation
BSS123W Rev. 1.0
www.fairchildsemi.com
5
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First Production
No Identification Needed
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Datasheet contains the design specifications for product development. Specifications may change
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Rev. I77
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