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BSS138L
N-Channel Logic Level Enhancement Mode Field Effect
Transistor
Features
Description
• High Density Cell Design for Low RDS(ON)
• Rugged and Reliable
• Compact Industry Standard SOT-23 Surface Mount
Package
• Very Low Capacitance
• Fast Switching Speed
This N-channel enhancement mode field effect transistor
is produced using high cell density, trench MOSFET
technology. This product minimizes on-state resistance
while providing rugged, reliable, and fast switching performance. This product is particularly suited for low-voltage, low-current applications such as small servo motor
control, power MOSFET gate drivers, logic level translator, high speed line drivers, power management/power
supply and switching applications.
D
D
S
G SOT-23
G
S
Ordering Information
Part Number
Marking
Package
Packing Method
BSS138L
SL
SOT-23 3L
Tape and Reel
© 2014 Fairchild Semiconductor Corporation
BSS138L Rev. 1.0.1
www.fairchildsemi.com
1
BSS138L — N-Channel Logic Level Enhancement Mode Field Effect Transistor
October 2014
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. Values are at TA = 25°C unless otherwise noted.
Symbol
Parameter
Value
Unit
VDSS
Drain-Source Voltage
50
V
VGSS
Gate-Source Voltage
±20
V
ID
TJ, TSTG
TL
Maximum Drain Current
Continuous
0.20
Pulsed
0.80
A
-55 to +150
°C
300
°C
Value
Unit
0.35
W
Derate Above 25°C
2.8
mW/°C
Thermal Resistance, Junction-to-Ambient(1)
380
°C/W
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering Purposes, 1/16 inch from Case
for 10 Seconds
Thermal Characteristics
Values are at TA = 25°C unless otherwise noted.
Symbol
Parameter
(1)
PD
RθJA
Maximum Power Dissipation
Note:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference
is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is
determined by the user's board design.
a) 380°C/W when mounted on a minimum pad.
Scale 1: 1 on letter size paper
ESD Rating(2)
Symbol
Parameter
Value
HBM
Human Body Model per ANSI/ESDA/JEDEC JS-001-2012
CDM
Charged Device Model per JEDEC C101C
Unit
50
V
>2000
Note:
2. ESD values are in typical, no over-voltage rating is implied, ESD CDM zap voltage is 2000 V maximum.
© 2014 Fairchild Semiconductor Corporation
BSS138L Rev. 1.0.1
www.fairchildsemi.com
2
BSS138L — N-Channel Logic Level Enhancement Mode Field Effect Transistor
Absolute Maximum Ratings
Values are at TA = 25°C unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 μA
50.0
65.4
V
58
mV/°C
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
Breakdown Voltage
Temperature Coefficient
ID = 250 μA, Referenced to 25°C
VDS = 50 V, VGS = 0 V
0.263
500
nA
Zero Gate Voltage Drain Current
VDS = 50 V, VGS = 0 V,
TJ = 125°C
0.109
5
μA
VDS = 30 V, VGS = 0 V
0.062
100
nA
IGSSF
Gate-Body Leakage, Forward
VGS = 20 V, VDS = 0 V
0.058
100
IGSSR
Gate-Body Leakage, Reverse
VGS = -20 V, VDS = 0 V
-0.06
-100
1.25
1.50
nA
On Characteristics(3)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 1 mA
ΔVGS(th)
ΔTJ
Gate Threshold Voltage
Temperature Coefficient
ID = 1 mA, Referenced to 25°C
RDS(ON)
Static Drain-Source
On-Resistance
VGS = 5 V, ID = 0.20 A
2.78
3.50
VGS = 2.75 V, ID = 0.20 A
3.78
10
On-State Drain Current
VGS = 10 V, VDS = 5 V
0.20
0.67
A
Forward Transconductance
VDS = 10 V, ID = 0.22 A
0.12
0.35
S
ID(ON)
gFS
0.80
-2.42
V
mV/°C
Ω
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
RG
Gate Resistance
Switching
Characteristics(3)
td(on)
Turn-On Delay
tr
td(off)
Turn-On Rise Time
Turn-Off Delay
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
VGS = 15 V, VGS = 1.0 MHz
VDD = 30 V, ID = 0.29 A,
VGS = 10 V
VDS = 25 V, ID = 0.22 A,
VGS = 10 V, IG = 0.1 mA
12.2
50
pF
3.04
25
pF
1.43
5
pF
Ω
26.6
2.2
5
ns
1.8
18
ns
5.3
36
ns
5.1
14
ns
0.549
2.4
nC
0.075
nC
0.117
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
VSD
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode
Forward Voltage
VGS = 0 V, IS = 115 mA
0.93
0.22
A
1.4
V
Note:
3. Pulse test: pulse width ≤ 300 μs, duty cycle ≤ 2.0%.
© 2014 Fairchild Semiconductor Corporation
BSS138L Rev. 1.0.1
www.fairchildsemi.com
3
BSS138L — N-Channel Logic Level Enhancement Mode Field Effect Transistor
Electrical Characteristics
3.0
ID, DRAIN CURRENT (A)
0.8
RDS(ON), NORMALIZED
DRAIN-SOUCE ON-RESISTANCE
1.0
6.0
VGS=10V
4.5
0.6
3.5
3.0
0.4
2.5
0.2
2.0
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
VGS=2.5V
2.6
3.0
3.5
2.2
4.5
6.0
1.8
10
1.4
1.0
5.0
0
0.2
VDS, DRAIN-SOURCE VOLTAGE (V)
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOUCE ON-RESISTANCE
ID = 0.11 A
7.5
1.7
1.5
1.3
1.1
0.9
0.7
7
6.5
6
5.5
5
4.5
TJ = 125oC
4
3.5
3
2.5
TJ = 25oC
2
1.5
0.5
-75
-50
-25
0
25
50
75
100
TJ, JUNCTION TEMPERATURE (oC)
125
1
150
Figure 3. On-Resistance Variation with Temperature
2
3
4
5
6
7
8
VGS, GATE TO SOURCE VOLTAGE (V)
9
10
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage
1
VDS = 10 V
0.9
IS, REVERSE DRAIN CURRENT (A)
1.0
ID, DRAIN CURRENT (A)
1
8
ID = 0.22A
VGS = 10V
1.9
0.8
Figure 2. On-Resistance Variation with Gate Voltage
and Drain Current
Figure 1. On-Region Characteristics
2.1
0.4
0.6
ID, DRAIN CURRENT (A)
TJ = 125oC
0.8
0.7
0.6
-55oC
0.5
25oC
0.4
0.3
0.2
VGS = 0V
0.1
TJ= 125oC
25oC
-55oC
0.01
0.1
0.0
0
1
2
3
4
5
6
0.001
7
0.2
VGS, GATE TO SOURCE VOLTAGE (V)
1.2
Figure 6. Body Diode Forward Voltage Variation with
Source Current and Temperature
Figure 5. Transfer Characteristics
© 2014 Fairchild Semiconductor Corporation
BSS138L Rev. 1.0.1
0.4
0.6
0.8
1.0
VSD, BODY DIODE FORWARD VOLTAGE (V)
www.fairchildsemi.com
4
BSS138L — N-Channel Logic Level Enhancement Mode Field Effect Transistor
Typical Performance Characteristics
VDS= 25V
Ciss
8
VDS= 8V
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
10
VDS= 30V
6
4
10
Coss
Crss
2
f = 1MHz
VGS = 0V
0
0
0.2
0.4
1
0.01
0.6
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
0.1
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
100
Figure 8. Capacitance Characteristics
1
PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
100
100 μs
0.2
RDS(ON) LIMIT
1ms
SINGLE PULSE
RθJA = 380oC/W
TA = 25oC
0.02
10ms
100ms
1s
10s
DC
10
1
SINGLE PULSE
R θJA = 380oC/W
TA = 25oC
0.1
0.0001
0.002
0.01
0.1
1
10
100
0.001
0.01
0.1
200
1
10
100
1000
t1 (s)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 10. Single Pulse Maximum Power Dissipation
Figure 9. Maximum Safe Operating Area
TRANSIENT THERMAL IMPEDANCE
Normalized Thermal Impedance ZoJA
10
1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
Single Pulse
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
t, Rectangular Pulse Duration
Figure 11. Transient Thermal Response Curve.
© 2014 Fairchild Semiconductor Corporation
BSS138L Rev. 1.0.1
www.fairchildsemi.com
5
BSS138L — N-Channel Logic Level Enhancement Mode Field Effect Transistor
Typical Performance Characteristics (Continued)
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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