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BTA08-600CW3G

BTA08-600CW3G

  • 厂商:

    ONSEMI(安森美)

  • 封装:

  • 描述:

    BTA08-600CW3G - Triacs Silicon Bidirectional Thyristors - ON Semiconductor

  • 数据手册
  • 价格&库存
BTA08-600CW3G 数据手册
BTA08-600CW3G, BTA08-800CW3G Triacs Silicon Bidirectional Thyristors Designed for high performance full-wave ac control applications where high noise immunity and high commutating di/dt are required. Features http://onsemi.com • • • • • • • • • Blocking Voltage to 800 V On-State Current Rating of 8 A RMS at 25°C Uniform Gate Trigger Currents in Three Quadrants High Immunity to dV/dt − 1500 V/ms minimum at 125°C Minimizes Snubber Networks for Protection Industry Standard TO-220AB Package High Commutating dI/dt − 1.5 A/ms minimum at 125°C Internally Isolated (2500 VRMS) These are Pb−Free Devices Rating Symbol VDRM, VRRM 600 800 IT(RMS) ITSM 8.0 90 A A Value Unit V 1 2 TRIACS 8 AMPERES RMS 600 thru 800 VOLTS MT2 G 4 MT1 MARKING DIAGRAM MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Peak Repetitive Off−State Voltage (Note 1) (TJ = −40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open) BTA08−600CW3G BTA08−800CW3G On-State RMS Current (Full Cycle Sine Wave, 60 Hz, TC = 80°C) Peak Non-Repetitive Surge Current (One Full Cycle Sine Wave, 60 Hz, TC = 25°C) Circuit Fusing Consideration (t = 8.3 ms) Non−Repetitive Surge Peak Off−State Voltage (TJ = 25°C, t = 10ms) Peak Gate Current (TJ = 125°C, t = 20ms) Peak Gate Power (Pulse Width ≤ 1.0 ms, TC = 80°C) Average Gate Power (TJ = 125°C) Operating Junction Temperature Range Storage Temperature Range RMS Isolation Voltage (t = 300 ms, R.H. ≤ 30%, TA = 25°C) BTA08−xCWG AYWW 3 TO−220AB CASE 221A STYLE 12 x A Y WW G = 6 or 8 = Assembly Location = Year = Work Week = Pb−Free Package I2t VDSM/ VRSM IGM PGM PG(AV) TJ Tstg Viso 36 VDSM/VRSM +100 4.0 20 1.0 − 40 to +125 − 40 to +150 2500 A2sec V A W W °C °C V 1 2 3 4 PIN ASSIGNMENT Main Terminal 1 Main Terminal 2 Gate No Connection ORDERING INFORMATION Device BTA08−600CW3G BTA08−800CW3G Package TO−220AB (Pb−Free) TO−220AB (Pb−Free) Shipping 50 Units / Rail 50 Units / Rail Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2008 August, 2008 − Rev. 0 1 Publication Order Number: BTA08−600CW3/D BTA08−600CW3G, BTA08−800CW3G THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction−to−Case (AC) Junction−to−Ambient Symbol RqJC RqJA TL Value 2.5 60 260 Unit °C/W °C Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 seconds ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted; Electricals apply in both directions) Characteristic OFF CHARACTERISTICS Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) ON CHARACTERISTICS Peak On-State Voltage (Note 2) (ITM = ± 11 A Peak) Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 30 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) Holding Current (VD = 12 V, Gate Open, Initiating Current = ±100 mA) Latching Current (VD = 24 V, IG = 42 mA) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) Gate Trigger Voltage (VD = 12 V, RL = 30 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) Gate Non−Trigger Voltage (TJ = 125°C) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) DYNAMIC CHARACTERISTICS Rate of Change of Commutating Current, See Figure 10. (Gate Open, TJ = 125°C, No Snubber) Critical Rate of Rise of On−State Current (TJ = 125°C, f = 120 Hz, IG = 2 x IGT, tr ≤ 100 ns) Critical Rate of Rise of Off-State Voltage (VD = 0.66 x VDRM, Exponential Waveform, Gate Open, TJ = 125°C) 2. Indicates Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%. (dI/dt)c dI/dt dV/dt 1.5 − 1500 − − − − 50 − A/ms A/ms V/ms VTM IGT − − 1.55 V mA 2.5 2.5 2.5 − − − − − 35 35 35 35 mA mA − − − 0.5 0.5 0.5 0.2 0.2 0.2 − − − − − − − − − 50 60 50 V 1.7 1.1 1.1 V − − − TJ = 25°C TJ = 125°C IDRM, IRRM mA − − − − 0.005 2.0 Symbol Min Typ Max Unit IH IL VGT VGD http://onsemi.com 2 BTA08−600CW3G, BTA08−800CW3G Voltage Current Characteristic of Triacs (Bidirectional Device) + Current Quadrant 1 MainTerminal 2 + Symbol VDRM IDRM VRRM IRRM VTM IH Parameter Peak Repetitive Forward Off State Voltage Peak Forward Blocking Current Peak Repetitive Reverse Off State Voltage Peak Reverse Blocking Current Maximum On State Voltage Holding Current Quadrant 3 MainTerminal 2 − IH VTM IRRM at VRRM on state IH VTM off state + Voltage IDRM at VDRM Quadrant Definitions for a Triac MT2 POSITIVE (Positive Half Cycle) + (+) MT2 (+) MT2 Quadrant II (−) IGT GATE MT1 REF (+) IGT GATE MT1 REF Quadrant I IGT − (−) MT2 (−) MT2 + IGT Quadrant III (−) IGT GATE MT1 REF (+) IGT GATE MT1 REF − MT2 NEGATIVE (Negative Half Cycle) Quadrant IV All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used. http://onsemi.com 3 BTA08−600CW3G, BTA08−800CW3G 125 TC, CASE TEMPERATURE (°C) 120 a = 120, 90, 60, 30° 115 a = 180° 110 DC 105 100 PAV, AVERAGE POWER (W) 12 DC 10 180° 8 6 4 2 0 0 1 a = 30° 60° 120° 90° 0 1 3 4 5 6 7 IT(RMS), RMS ON-STATE CURRENT (A) 2 8 2 3 4 5 6 IT(RMS), ON-STATE CURRENT (A) 7 8 Figure 1. RMS Current Derating Figure 2. On-State Power Dissipation 100 r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1 0.1 IT, INSTANTANEOUS ON−STATE CURRENT (A) 10 0.01 0.1 1 10 100 1000 1 · 104 t, TIME (ms) Figure 4. Thermal Response 55 1 IH, HOLDING CURRENT (mA) 45 35 MT2 POSITIVE 25 15 MT2 NEGATIVE 5 20 35 50 65 80 95 110 125 0.1 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5 40 −25 −10 − VT, INSTANTANEOUS ON-STATE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C) Figure 3. On-State Characteristics http://onsemi.com 4 Figure 5. Hold Current Variation BTA08−600CW3G, BTA08−800CW3G 100 IGT, GATE TRIGGER CURRENT (mA) GATE TRIGGER VOLTAGE (V) VD = 12 V RL = 30 W 2.00 1.80 1.60 1.40 1.20 1.00 0.80 0.60 0.40 −40 −25 −10 5 Q2 20 35 50 65 80 95 110 125 Q3 Q1 VD = 12 V RL = 30 W 10 Q2 Q3 Q1 1 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 6. Gate Trigger Current Variation dv/dt , CRITICAL RATE OF RISE OF OFF‐STATE VOLTAGE (V/ μ s) Figure 7. Gate Trigger Voltage Variation 5000 LATCHING CURRENT (mA) VD = 800 Vpk TJ = 125°C 120 100 80 Q1 60 Q2 40 20 Q3 VD = 800 Vpk TJ = 125°C 4K 3K 2K 1K 0 10 100 1000 10000 0 −40 −25 −10 5 20 35 50 65 80 95 110 125 RG, GATE TO MAIN TERMINAL 1 RESISTANCE (OHMS) TJ, TEMPERATURE (°C) Figure 8. Critical Rate of Rise of Off-State Voltage (Exponential Waveform) Figure 10. Latching Current Variation LL 200 VRMS ADJUST FOR ITM, 60 Hz VAC TRIGGER CHARGE CONTROL TRIGGER CONTROL MEASURE I 1N4007 + MT2 1N914 51 W G MT1 CHARGE 200 V NON‐POLAR CL Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information. Figure 9. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c http://onsemi.com 5 BTA08−600CW3G, BTA08−800CW3G PACKAGE DIMENSIONS TO−220 CASE 221A−07 ISSUE O −T− B F T C S SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.014 0.022 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.36 0.55 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 Q H Z L V G 4 A U K 123 R J D N STYLE 12: PIN 1. 2. 3. 4. MAIN TERMINAL 1 MAIN TERMINAL 2 GATE NOT CONNECTED ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 6 BTA08−600CW3/D
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