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CAT5115VI-00-GT3

CAT5115VI-00-GT3

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    SOIC8_150MIL

  • 描述:

    CAT5115 - 32-TAP DIGITALLY PROGR

  • 数据手册
  • 价格&库存
CAT5115VI-00-GT3 数据手册
CAT5115 32‐tap Digital Potentiometer (POT) Description The CAT5115 is a single digital POT designed as an electronic replacement for mechanical potentiometers and trim pots. Ideal for automated adjustments on high volume production lines, they are also well suited for applications where equipment requiring periodic adjustment is either difficult to access or located in a hazardous or remote environment. The CAT5115 contains a 32-tap series resistor array connected between two terminals RH and RL. An up/down counter and decoder that are controlled by three input pins, determines which tap is connected to the wiper, RW. The wiper is always set to the mid point, tap 15 at power up. The tap position is not stored in memory. Wiper-control of the CAT5115 is accomplished with three input control pins, CS, U/D, and INC. The INC input increments the wiper in the direction which is determined by the logic state of the U/D input. The CS input is used to select the device. The digital POT can be used as a three-terminal resistive divider or as a two-terminal variable resistor. Digital POTs bring variability and programmability to a wide variety of applications including control, parameter adjustments, and signal processing. For a pin-compatible device that recalls a stored tap position on power-up refer to the CAT5114 data sheet. http://onsemi.com SOIC−8 V SUFFIX CASE 751BD MSOP−8 Z SUFFIX CASE 846AD PDIP−8 L SUFFIX CASE 646AA TSSOP−8 Y SUFFIX CASE 948AL PIN CONFIGURATIONS INC U/D RH GND Features        32-position Linear Taper Potentiometer Low Power CMOS Technology Single Supply Operation: 2.5 V − 6.0 V Increment Up/Down Serial Interface Resistance Values: 10 kW, 50 kW and 100 kW Available in PDIP, SOIC, TSSOP, MSOP Packages These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant Applications        June, 2013 − Rev. 11 VCC CS RL RWB PDIP (L), SOIC (V), MSOP (Z) CS VCC INC U/D 1 RL RWB GND RH TSSOP (Y) (Top Views) Automated Product Calibration Remote Control Adjustments Offset, Gain and Zero Control Tamper-proof Calibrations Contrast, Brightness and Volume Controls Motor Controls and Feedback Systems Programmable Analog Functions  Semiconductor Components Industries, LLC, 2013 1 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. 1 Publication Order Number: CAT5115/D CAT5115 Functional Diagram RH RH/VH VCC VDD CS RW INC U/D 32−POSITION DECODER CS Control and Power−On Recall INC GND UP−DOWN COUNTER RH U/D RW/VW RW RL GND RL/VL Figure 1. General Figure 2. Detailed Function INC Increment Control U/D Up/Down Control RH Potentiometer High Terminal GND Ground RW Buffered Wiper Terminal RL Potentiometer Low Terminal CS Chip Select VCC Supply Voltage Figure 3. Electronic Potentiometer Implementation U/D and CS. Voltage applied to the RW terminal cannot exceed the supply voltage, VCC or go below ground, GND. RL: Low End Potentiometer Terminal RL is the low end terminal of the potentiometer. It is not required that this terminal be connected to a potential less than the RH terminal. Voltage applied to the RL terminal cannot exceed the supply voltage, VCC or go below ground, GND. RL and RH are electrically interchangeable. CS: Chip Select The chip select input is used to activate the control input of the CAT5115 and is active low. When in a high state, activity on the INC and U/D inputs will not affect or change the position of the wiper. Table 1. PIN DESCRIPTIONS Name RL Pin Function INC: Increment Control Input The INC input moves the wiper in the up or down direction determined by the condition of the U/D input. U/D: Up/Down Control Input The U/D input controls the direction of the wiper movement. When in a high state and CS is low, any high-to-low transition on INC will cause the wiper to move one increment toward the RH terminal. When in a low state and CS is low, any high-to-low transition on INC will cause the wiper to move one increment towards the RL terminal. RH: High End Potentiometer Terminal RH is the high end terminal of the potentiometer. It is not required that this terminal be connected to a potential greater than the RL terminal. Voltage applied to the RH terminal cannot exceed the supply voltage, VCC or go below ground, GND. RW: Wiper Potentiometer Terminal RW is the wiper terminal of the potentiometer. Its position on the resistor array is controlled by the control inputs, INC, Device Operation The CAT5115 operates like a digitally controlled potentiometer with RH and RL equivalent to the high and low terminals and RW equivalent to the mechanical potentiometer’s wiper. There are 32 available tap positions including the resistor end points, RH and RL. There are 31 resistor elements connected in series between the RH and RL terminals. The wiper terminal is connected to one of the 32 taps and controlled by three inputs, INC, U/D and CS. These inputs control a five-bit up/down counter whose output is decoded to select the wiper position. With CS set LOW the CAT5115 is selected and will respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement the wiper (depending on the state of the U/D input and five-bit counter). The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. When the CAT5115 is powered-down, the wiper position is reset. When power is restored, the counter is set to the mid point, tap 15. http://onsemi.com 2 CAT5115 Table 2. OPERATION MODES INC CS U/D Operation High to Low Low High Wiper toward H High to Low Low Low Wiper toward L High Low to High X Store Wiper Position Low Low to High X No Store, Return to Standby X High X Standby RH CH RWI RW CW CL RL Figure 4. Potentiometer Equivalent Circuit Table 3. ABSOLUTE MAXIMUM RATINGS Parameters Ratings Supply Voltage VCC to GND −0.5 to +7 Inputs CS to GND −0.5 to VCC +0.5 Units V V INC to GND −0.5 to VCC +0.5 V U/D to GND −0.5 to VCC +0.5 V H to GND −0.5 to VCC +0.5 V L to GND −0.5 to VCC +0.5 V W to GND −0.5 to VCC +0.5 V Operating Ambient Temperature Industrial (‘I’ suffix) C −40 to +85 Junction Temperature +150 C Storage Temperature −65 to 150 C +300 C Lead Soldering (10 s max) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 4. RELIABILITY CHARACTERISTICS Symbol Parameter VZAP (Note 1) ESD Susceptibility MIL−STD−883, Test Method 3015 2000 V Latch-up JEDEC Standard 17 100 mA Data Retention MIL−STD−883, Test Method 1008 100 Years Endurance MIL−STD−883, Test Method 1003 1,000,000 Stores ILTH (Notes 1, 2) TDR NEND Test Method Min Typ 1. This parameter is tested initially and after a design or process change that affects the parameter. 2. Latch-up protection is provided for stresses up to 100 mA on address and data pins from −1 V to VCC + 1 V. http://onsemi.com 3 Max Units CAT5115 Table 5. DC ELECTRICAL CHARACTERISTICS (VCC = +2.5 V to +6 V unless otherwise specified) Parameter Symbol Conditions Min Typ Max Units 2.5 – 6.0 V VCC = 6 V, f = 1 MHz, IW = 0 – – 100 mA POWER SUPPLY VCC Operating Voltage Range ICC1 Supply Current (Increment) VCC = 6 V, f = 250 kHz, IW = 0 – – 50 mA Supply Current (Standby) CS = VCC − 0.3 V U/D, INC = VCC − 0.3 V or GND – 0.01 1 mA IIH Input Leakage Current VIN = VCC – – 10 mA IIL Input Leakage Current VIN = 0 V – – −10 mA VIH1 TTL High Level Input Voltage 4.5 V  VCC  5.5 V 2 – VCC V VIL1 TTL Low Level Input Voltage 0 – 0.8 V VIH2 CMOS High Level Input Voltage VCC x 0.7 – VCC + 0.3 V VIL2 CMOS Low Level Input Voltage −0.3 – VCC x 0.2 V ISB1 (Note 4) LOGIC INPUTS 2.5 V  VCC  6 V POTENTIOMETER CHARACTERISTICS RPOT Potentiometer Resistance −10 Device 10 −50 Device 50 −00 Device 100 Pot. Resistance Tolerance VRH Voltage on RH pin 0 VRL Voltage on RL pin 0 Resolution 20 % VCC V VCC 3.2 V % INL Integral Linearity Error IW  2 mA 0.5 1 LSB DNL Differential Linearity Error IW  2 mA 0.25 0.5 LSB RWI Wiper Resistance VCC = 5 V, IW = 1 mA 70 200 W VCC = 2.5 V, IW = 1 mA 150 400 W 1 mA 50 300 ppm/C 20 ppm/C IW Wiper Current TCRPOT TC of Pot Resistance TCRATIO Ratiometric TC VN CH/CL/CW fc 3. 4. 5. 6. kW Noise (1) 100 kHz / 1 kHz Potentiometer Capacitances Frequency Response Passive Attenuator, 10 kW 8/24 nV/Hz 8/8/25 pF 1.7 MHz This parameter is tested initially and after a design or process change that affects the parameter. Latch-up protection is provided for stresses up to 100 mA on address and data pins from −1 V to VCC + 1 V. IW = source or sink. These parameters are periodically sampled and are not 100% tested. http://onsemi.com 4 CAT5115 Table 6. AC TEST CONDITIONS VCC Range 2.5 V  VCC  6.0 V Input Pulse Levels 0.2 x VCC to 0.7 x VCC Input Rise and Fall Times 10 ns Input Reference Levels 0.5 x VCC Table 7. AC OPERATING CHARACTERISTICS (VCC = +2.5 V to +6.0 V, VH = VCC, VL = 0 V, unless otherwise specified) Parameter Symbol Min Typ (Note 7) Max Units 100 − − ns tCI CS to INC Setup tDI U/D to INC Setup 50 − − ns tID U/D to INC Hold 100 − − ns tIL INC LOW Period 250 − − ns tIH INC HIGH Period 250 − − ns tIC INC Inactive to CS Inactive 1 − − ms 100 − − ns INC to VOUT Change − 1 5 ms INC Cycle Time 1 − − ms INC Input Rise and Fall Time − − 500 ms – – 1 ms tCPH CS Deselect Time tIW tCYC tR, tF (Note 8) tPU (Note 8) Power-up to Wiper Stable 7. Typical values are for TA = 25C and nominal supply voltage. 8. This parameter is periodically sampled and not 100% tested. 9. MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position. CS tCI tIL tCYC tIC tIH (store) tCPH 90% INC 90% 10% tDI tID tF U/D tR MI(3) tIW RW Figure 5. A.C. Timing http://onsemi.com 5 CAT5115 APPLICATIONS INFORMATION (a) resistive divider (b) variable resistance (c) two−port Figure 6. Potentiometer Configuration Applications R3 R4 – R1 +5 V 4A 9 – 3 10 8 + 11 R2 R2 2 1 7 +5 V 8 Digital POT 1 +5 V 8 Digital POT 2 1 7 + +5 V R1 RA 6 4 VO RB 7 0.01 F CS 7 +5 V +200 mV 8 4 1 0.01 mF Figure 8. Programmable Sq. Wave Oscillator (555) ICIB 20 kW + VCORR – 6 CAT5111/5112 IC2 499 kW 2 +5 V 4 – 1 3 + 5 499 kW Figure 9. Sensor Auto Referencing Circuit http://onsemi.com VOUT = 1 V  1 mV 11 ICIA −5 V VSENSOR = 1 V  50 mV 6 VREF = 1 V 499 kW 499 kW Sensor 10 kW 5 2 0.01 mF 0.003 mF C IC3A 74HC132 2 1 7 3 6 A1 = A2 = A3 = 1/4 LM6064 R2 = R3 = R4 = 5 kW RPOT = 10 kW Digital POT OSC 8 555 +2.5 V Figure 7. Programmable Instrumentation Amplifier 1/ 4 4 R2 R4 R3 7 5 (1−p)R POT 3 4 – CAT5113/5114/5115 6 V2 (+) + 5 pRPOT + 2 – 3 V1 (−) VSHIFT = 100 mV CAT5115 100 kW VIN (UNREG) SHUTDOWN VO (REG) 2952 SD FB GND 2 1 7 1.23 V R1 11 kW 6 2 R3 10 kW 6 3 IS +5 V 7 – + – 1 OSC CLO CHI 7 – + 3 3 VS +2.5 V + 4 A2 +2.5 V R3 5 +5 V VUL C1 0.001 mF 1 mF R1 VO 2 1 7 2.5  VO  5 V AI IC4 50 kW +5 V 8 R3 100 kW +5 V 2 7 – C2 0.001 mF R2 10 kW 3 + 4 6 A1 4 Figure 12. Automatic Gain Control Figure 13. Programmable Bandpass Filter CAT5111/5112 2 – + +2.5 V R1 100 kW R1 100 kW 3 +5 V 7 + R 2.5 kW 11 7 A2 – R1 VS 100 kW – + Serial Bus R1 100 kW +5 V 1 7 IS 5 +2.5 V 6 A1 = A2 = LMC6064A Figure 14. Programmable Current Source/Sink http://onsemi.com VO +2.5 V CAT5113/5114 0  VS  2.5 V +5 V VO 6 R2 6 – + +5 V 7 R1 VLL VS 5 – Figure 11. Programmable I to V Convertor +5 V 6 3 Digital POT 0.1 mF IC3 CAT5114/5113 +5 V 8 2 10 kW U/D 1 INC 7 CS 4 + 10 kW 2 2 10 k LT1097 IC1 393 IC2 74HC132 5 A1 1 MW 330 W 3 6 4 Figure 10. Programmable Voltage Regulator +5 V pR (1−p)R 330 W 3 CAT5113/5114 4 0.1 mF 6.8 mF R2 820 W +5 V 1 mF 8 2 Control 1 and 7 Memory 5 POR 4 CAT5113/5114/5115 Digital POT VOUT +5 V 8 CAT5115 Table 8. ORDERING INFORMATION Orderable Part Numbers Reset Threshold Voltage Package−Pin Lead Finish Shipping† CAT5115LI−10−G 10 50 Units / Tube CAT5115LI−50−G 50 CAT5115LI−00−G 100 50 Units / Tube CAT5115VI−10−GT3 10 3000 / Tape & Reel CAT5115VI−50−GT3 50 CAT5115VI−00−GT3 100 3000 / Tape & Reel CAT5115YI−10−GT3 10 3000 / Tape & Reel CAT5115YI−50−GT3 50 CAT5115YI−00−GT3 100 3000 / Tape & Reel CAT5115ZI−10−GT3 10 3000 / Tape & Reel CAT5115ZI−50−GT3 50 CAT5115ZI−00−GT3 100 PDIP−8 SOIC−8 TSSOP−8 MSOP−8 NiPdAu NiPdAu NiPdAu NiPdAu 50 Units / Tube 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 10. For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Device Nomenclature document, TND310/D, available at www.onsemi.com. 11. Contact factory for package availability. 12. All packages are RoHS-compliant (Lead-free, Halogen-free). 13. The standard lead finish is NiPdAu. 14. For additional package and temperature options, please contact your nearest ON Semiconductor Sales office. http://onsemi.com 8 CAT5115 PACKAGE DIMENSIONS PDIP−8, 300 mils CASE 646AA ISSUE A SYMBOL MIN NOM A E1 5.33 A1 0.38 A2 2.92 3.30 4.95 b 0.36 0.46 0.56 b2 1.14 1.52 1.78 c 0.20 0.25 0.36 D 9.02 9.27 10.16 E 7.62 7.87 8.25 E1 6.10 6.35 7.11 e PIN # 1 IDENTIFICATION MAX 2.54 BSC eB 7.87 L 2.92 10.92 3.30 3.80 D TOP VIEW E A2 A A1 c b2 L e eB b SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. http://onsemi.com 9 CAT5115 PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD ISSUE O E1 E SYMBOL MIN A 1.35 1.75 A1 0.10 0.25 b 0.33 0.51 c 0.19 0.25 D 4.80 5.00 E 5.80 6.20 E1 3.80 MAX 4.00 1.27 BSC e PIN # 1 IDENTIFICATION NOM h 0.25 0.50 L 0.40 1.27 θ 0º 8º TOP VIEW D h A1 θ A c e b L END VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. http://onsemi.com 10 CAT5115 PACKAGE DIMENSIONS MSOP 8, 3x3 CASE 846AD ISSUE O SYMBOL MIN NOM MAX 1.10 A E A1 0.05 0.10 0.15 A2 0.75 0.85 0.95 b 0.22 0.38 c 0.13 0.23 D 2.90 3.00 3.10 E 4.80 4.90 5.00 E1 2.90 3.00 3.10 E1 0.65 BSC e L 0.60 0.40 0.80 L1 0.95 REF L2 0.25 BSC θ 0º 6º TOP VIEW D A A2 A1 DETAIL A e b c SIDE VIEW END VIEW q L2 Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-187. L L1 DETAIL A http://onsemi.com 11 CAT5115 PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL ISSUE O b SYMBOL MIN NOM 1.20 A E1 E MAX A1 0.05 A2 0.80 b 0.19 0.15 0.90 1.05 0.30 c 0.09 D 2.90 3.00 3.10 E 6.30 6.40 6.50 E1 4.30 4.40 4.50 0.20 0.65 BSC e L 1.00 REF L1 0.50 θ 0º 0.60 0.75 8º e TOP VIEW D A2 c q1 A A1 L1 SIDE VIEW L END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 12 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative CAT5115/D
CAT5115VI-00-GT3 价格&库存

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