CAT706SVI-G

CAT705, CAT706, CAT813 µP Supervisory Circuits FEATURES n Reset guaranteed valid for 1.0 V VCC n 6µA supply current n 200ms Reset pulse width n Watchdog timer function 1.6s timeout n Accurate brownout detection reset in 3.0, 3.6, and 5.0 volt systems n Secondary low supply monitoring on PFI input n Pin and function compatible with the MAX705/MAX706/MAX813L products n Operating Range from -40°C to +85°C n RoHS Compliant SOIC 8-lead and MSOP 8-lead packages DESCRIPTION The CAT705, CAT706, and CAT813 provide reset and monitoring functions for the electronic systems. Each device monitors the system voltage and maintains a reset output until that voltage reaches the device’s specified trip value and then maintains the reset output active condition until the device’s internal timer allows the system power supply to stabilize. The devices have a watchdog input which can be ¯¯¯¯ used to monitor a system signal and causes WDO to go low if the signal fails to change state prior to a timeout condition. The supervisory circuits provide a ¯¯¯ input which MR initiates a reset if pulled low. The CAT705 and ¯¯¯¯¯¯ CAT706 provide an active low RESET output. The CAT813 provides an active high RESET output. There is a secondary supply monitor (PFI) included for power-fail warning. APPLICATIONS n Microprocessor and microcontroller based systems n Instrument and control systems n Portable equipment For Ordering Information details, see page 13. PIN CONFIGURATION SOIC 8-Lead MR VCC GND PFI 1 2 3 4 8 7 6 5 WDO RESET (RESET for CAT813) PIN FUNCTIONS Pin Name ¯¯¯ MR VCC GND PFI ¯¯¯¯ PFO W DI WDI PFO Function Manual Reset Input Power Supply Ground Power Fail voltage monitor Input. Power Fail Output Watchdog Timer Input CMOS Push-Pull Active Low Reset Output (CAT705 & CAT706) CMOS Push-Pull Active High Reset Output (CAT813) Watchdog Timer Output MSOP 8-Lead RESET (RESET for CAT813) 1 2 3 4 8 7 6 5 WDI PFO PFI GND ¯¯¯¯¯¯ RESET RESET ¯¯¯¯¯ W DO WDO MR VCC © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice 1 Doc. No. MD-3030, Rev. D CAT705, CAT706, CAT813 BLOCK DIAGRAM VCC 70µA MR VCC RESET CONTROLLER RESET (RESET for CAT813) VRST TIMER WDI 52kΩ WATCHDOG TRANSITION DETECTION WATCHDOG TIMER WDO PFI PFO 1.25V Device CAT705 CAT706 CAT813 ¯¯¯¯¯¯ RESET @ 4.65 V x RESET ¯¯¯ MR x x WDI x x x ¯¯¯¯¯ WDO x x x PFI @ 1.25 V @ 1.25 V @ 1.25 V @ 4.65 V x Doc. No. MD-3030, Rev. D 2 © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice CAT705, CAT706, CAT813 (1) ABSOLUTE MAXIMUM RATINGS Parameters Supply Voltage All other pins Ratings 6.5 -0.3 to (VCC + 0.3) 20 471 330 -65 to 150 +300 2000 200 Units V V mA mW ºC ºC V V ¯¯¯¯¯¯ ¯¯¯¯ Output Current RESET, RESET,WDO Continuous Power Dissipations (TA = +70ºC) SOIC 8-lead (derate 5.9mW/ºC above +70ºC) MSOP 8-lead (derate 4.1mW/ºC above +70ºC) Storage Temperature Lead Soldering (10 seconds max) ESD Rating: Human Body Model ESD Rating: Machine Model RECOMMENDED OPERATING CONDITIONS Parameter VCC (TA = -40ºC to +85ºC) All Other Pins Ambient Temperature Range 1.0 to 5.5 -0.1 to (VCC + 0.1) -40 to +85 Units V V ºC Notes: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice 3 Doc. No. MD-3030, Rev. D CAT705, CAT706, CAT813 ELECTRICAL OPERATING CHARACTERISTICS Typical values at TA = 25ºC and VCC = 5V for CAT705, CAT706 and CAT813 versions. (1) VCC = 3.3V for the CAT706 T/S versions; VCC = 3.0V for the CAT706 R version. Symbol Parameter Conditions CAT705 CAT706 CAT813 CAT706 (R/S/T Versions) CAT705 & CAT813 at -40ºC ≤ TA ≤ +85ºC CAT706 at -40ºC ≤ TA ≤ +85ºC CAT706T at -40ºC ≤ TA ≤ +85ºC CAT706S at -40ºC ≤ TA ≤ +85ºC CAT706R at -40ºC ≤ TA ≤ +85ºC Reset Threshold (1) Tempco Reset Threshold (1) Hysteresis tRD tRP VCC to Reset Delay Reset Active Timeout Period ¯¯¯¯¯¯ RESET Output High Voltage CAT705 & CAT706, VCC = VRST max, ISOURCE = -120µA CAT705 & CAT706, VCC = VRST max, ISOURCE = -30µA CAT705 & CAT706, VCC = VRST min, ISINK = 3.2mA CAT705 &CAT706, VCC = 1.2V ISINK = 100µA CAT813, VCC = VRST max, ISOURCE = -120µA CAT813, VCC = VRST max, ISOURCE = -30µA CAT813, VCC = VRST min, ISINK = 3.2mA CAT813, VCC = 1.2V ISINK = 100µA VCC - 1.5V V 0.8 x VCC 0.4 V 0.3 (2) Min Typ 6 4 Max 17 12 4.75 4.50 3.15 3.00 2.70 Units µA µA V V V V V ppm/ºC mV mV µs ICC Supply Current 4.50 4.25 3.00 2.85 2.55 4.65 4.40 3.08 2.93 2.63 40 VRST Reset Threshold CAT705 & CAT813 CAT706 VCC = VTH to (VTH - 100mV) 140 VCC - 1.5V 0.8 x VCC 10 5 20 200 400 ms VOH V 0.4 0.3 VOL ¯¯¯¯¯¯ RESET Output Low Voltage VOH RESET Output High Voltage VOL RESET Output Low Voltage Notes: (1) Limits are guaranteed by design and not production tested. (2) The RESET short-circuit current is the maximum pull-up current when reset is driven low by a bidirectional output. 4 © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice Doc. No. MD-3030 Rev. D CAT705, CAT706, CAT813 ELECTRICAL OPERATING CHARACTERISTICS (continued) Typical values at TA = 25°C and VCC = 5V for CAT705, CAT706, and CAT813 versions; VCC = 3.3V for the CAT706 T/S versions; VCC = 3.0V for the CAT706 R version. Symbol tWD tWP VIL VIH Parameter W atchdog Timeout Period W DI Pulse Width W DI Input Voltage W DI Input Current (3) Conditions Min 1.00 Typ 1.6 Max 2.25 0.3 x VCC Units s ns V µA WATCHDOG INPUT VIL = 0.4 V, VIH = 0.8 x VCC 50 0.7 x VCC W DI = VCC, Time Average W DI = 0V, Time Average VRST (max) < VCC < 3.6 V ISOURCE = -500 µA 4.5 V < VCC < 5.5 V, ISOURCE = -800 µA VRST (max) < VCC < 3.6 V, ISINK = +500 µA 4.5 V < VCC < 5.5 V, ISINK = 1.2 mA 0.1 -150 0.8 x VCC VCC – 1.5 VCC – 0.25 V 0.3 0.4 50 -50 150 (4) VW_OH W DO Output Voltage VW_OL M ANUAL RESET INPUT VIL VIH tPB tPDLY ¯¯¯ Input Voltage MR ¯¯¯ Pull-up Current MR ¯¯¯ Pulse Width MR ¯¯¯ low to Reset Delay MR PFI Input Threshold PFI Input Current VRST (max) < VCC < 3.6 V, ISOURCE = -500 µA 4.5 V < VCC < 5.5 V, ISOURCE = -800 µA VRST (max) < VCC < 3.6 V, ISINK = +1.2 mA 4.5 V < VCC < 5.5 V, ISINK = 3.2 mA (5) 0.3 x VCC 0.7 x VCC ¯¯¯ = 0 V MR 40 1 5 VCC = 5 V 1.2 -25 0.8 x VCC VCC - 1.5V 0.4 1.25 0.01 1.3 25 70 140 V µA µs µs V nA POWER-FAIL INPUT VP_OH ¯¯¯¯ Output Voltage PFO VP_OL V 0.3 0.4 Notes: (3) WDI is internally serviced within the watchdog period if WDI is left open. (4) The WDI input current is specified as an average input current when the WDI input is driven high or low. The WDI input if connected to a three-stated output device can be disabled in the tristate mode as long as the leakage current is less than 10µA and a maximum capacitance of less than 200pF. To clock the WDI input in the active mode the drive device must be able to source or sink at least 200µA when active. (5) ¯¯¯¯¯¯ for CAT705 & CAT706 & RESET for CAT813. RESET © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice 5 Doc. No. MD-3030, Rev. D CAT705, CAT706, CAT813 TYPICAL ELECTRICAL OPERATING CHARACTERISTICS TABLES VCC Supply Current vs. Temperature NORMALIZED RESET THRESHOLD (V) Normalized Reset Threshold Voltage vs. Temperature 1.06 1.04 1.02 1.00 0.98 0.96 0.94 -40 9 SUPPLY CURRENT (µA) 8 7 6 5 4 3 2 1 -40 -20 0 20 40 60 80 100 120 -20 0 20 40 60 80 100 TEMPERATURE (ºC) TEMPERATURE (°C) TEMPERATURE (ºC) Doc. No. MD-3030 Rev. D 6 © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice CAT705, CAT706, CAT813 FUNCTIONAL DESCRIPTION PROCESSOR RESET The CAT705, CAT706 & CAT813 detect supply voltage (VCC) conditions that are below the specified voltage trip value (VRST) and provide a reset output to maintain correct system operation. On power-up, ¯¯¯¯¯¯ RESET (or RESET for the CAT813) are kept active for a minimum delay tRP of 140ms after the supply voltage (VCC) rises above VRST to allow the power supply and processor to stabilize. When VCC drops below the voltage trip value (VRST), the reset output signals ¯¯¯¯¯¯ ¯¯¯¯¯¯ RESET (or RESET) are pulled active. RESET (or RESET) is specifically designed to provide the reset input signals for processors. This provides reliable and consistent operation as power is turned on, off or during brownout conditions by maintaining the processor operation in known conditions. M ANUAL RESET The CAT705, CAT706 & CAT813 each have a Manual ¯¯¯ Reset (MR ) input to allow for alternative control of the reset outputs. The ¯¯¯ input is designed for direct MR connection to a pushbutton (see Figure 1). The ¯¯¯ MR input is internally pulled up by 52kΩ resistor and must be pulled low to cause the reset output to go active. Internally, this input is debounced and timed such that ¯¯¯¯¯¯ RESET (or RESET) signals of at least 140ms minimum will be generated. The min 140ms tRP delay commences as the Manual Reset input is released from the low level. (see Figure 2) MR VCC GND PFI WDO RESET/RESET WDI PFO CAT705 CAT706 CAT813 Figure 1. Pushbutton RESET tPB tPDLY VIL tRP RESET VOH VOL VIH MR RESET Figure 2. Timing Diagram – Pushbutton RESET © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice 7 Doc. No. MD-3030, Rev. D CAT705, CAT706, CAT813 WATCHDOG TIMER The CAT705, CAT706, & CAT813 provide a Watchdog input (WDI). The watchdog timer function ¯¯¯¯ controls the watchdog output (WDO) signal and forces ¯¯¯¯ the WDO to be low (active) when the WDI input does not have a transition from low-to-high or high-to-low within 1.6s typical. If a transition occurs on the WDI input pin prior to the watchdog time-out, the watchdog timer is restarted. The timing diagram is shown in Figure 3. The watchdog timer starts as soon as reset condition becomes inactive. When the VCC supply drops below the reset threshold, ¯¯¯¯ the WDO output becomes active and goes low independently of the watchdog timing stage. Figure 4 below shows a typical implementation of a watchdog function. Any processor signal that repeats dependant on the normal operation of the processor or directed by the software operating on the processor can be used to strobe the watchdog input. The most reliable is a dedicated I/O output transitioned by a specific software instruction. The watchdog can be disabled by floating (or tristating) the WDI input (see Figure 5). If the watchdog is disabled the WDI pin will be pulled low for the first th 7/8 ’s of the watchdog period (tWD) and pulled high for th the last 1/8 of the watchdog period. This pulling low of the WDI input and then high is used to detect an open or tri-state condition and will continue to repeat until the WDI input is driven high or low. For most efficient operation of devices with the watchdog function the WDI input should be held low the majority of the time and only strobed high as required to reset the watchdog timer. tWP tWD +5 V WDI 0V +5 V WDO 0V +5 V RESET 0V RESET EXTERNALLY TRIGGERED BY MR +5 V (RESET) 0V (() Are for CAT813 Only) tRS tWD tWD Figure 3. Watchdog Timing Diagram PIC µC MCLR ADDRESS DECODER MR VCC GND PFI WDO RESET/RESET WDI PFO CAT705 CAT706 CAT813 Figure 4. Watchdog Timer Circuit Doc. No. MD-3030 Rev. D 8 © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice CAT705, CAT706, CAT813 VCC MR VCC GND PFI WDO RESET/RESET WDI PFO Tristate CAT705 CAT706 CAT813 150kΩ µC OUTPUT 110kΩ Figure 5. Watchdog Disable Circuit VCC VRST (MAX) VRST VRST (MIN) tRD RESET (CAT705 & CAT706) VOH RESET Slews with VCC RESET (CAT813) VOL Figure 6. Timing Diagram – Power Down VRST (MAX) VRST VRST (MIN) VCC tRP RESET (CAT705 & CAT706) VOH VOL RESET (CAT813) Figure 7. Timing Diagram – Power Up © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice 9 Doc. No. MD-3030, Rev. D CAT705, CAT706, CAT813 APPLICATION NOTES µP’s with Bidirectional Reset Pins ¯¯¯¯¯¯ The RESET output can be pulled low by processors like the 68HC11 allowing for a system reset issued by the processor. The maximum pullup current that can be sourced by the CAT705 & CAT706 1.5mA (and by the CAT706 T/R/S is 800µA) allowing the processor to pull the output low even when the CAT70x is pulling it high. Power Transients Generally short duration negative-going transients of less than 2µs on the power supply at VRST minimum will not cause a reset condition. However the lower the voltage of the transient the shorter the required time to cause a reset output. These issues can usually be remedied by the proper location of bypass capacitance on the circuit board. OUTPUT VALID CONDITIONS ¯¯¯¯¯¯ The RESET output uses a push-pull output which can maintain a valid output down to a VCC of 1.0 volts. To sink current below 0.8V a resistor can be connected ¯¯¯¯¯¯ from RESET to Ground (see Figure 8.) This ¯¯¯¯¯¯ arrangement will maintain a valid value on the RESET output during both power up and down but will draw ¯¯¯¯¯¯ current when the RESET output is in the high state. A resistor value of about 100kΩ should be adequate in most situations to maintain a low condition valid output down to VCC equal to 1.0V. µC MR VCC GND PFI WDO RESET/RESET RESET/RESET WDI CAT705 CAT706 CAT813 100kΩ PFO ¯¯¯¯¯¯ Figure 8. RESET Valid for VCC < 1.0V 5V Push Switch MR UNREGULATED DC VCC GND PFI WDO RESET/RESET RESET/RESET WDI PFO I/O LINE INTERRUPT VCC NMI µC CAT705 CAT706 CAT813 Figure 9. Typical Operating Circuit Doc. No. MD-3030 Rev. D 10 © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice CAT705, CAT706, CAT813 PACKAGE OUTLINE DRAWINGS MSOP 8-Lead 3.0 x 3.0mm (Z) (1) (2) SYMBOL MIN NOM MAX A A1 A2 b c D E E1 1.10 0.05 0.75 0.22 0.13 2.90 4.80 2.90 0.40 3.00 4.90 3.00 0.65 BSC 0.60 0.95 REF 0.25 BSC 0º 6º 0.80 0.10 0.85 0.15 0.95 0.38 0.23 3.10 5.00 3.10 E E1 e L L1 L2 θ TOP VIEW D A A2 DETAIL A A1 e SIDE VIEW b c END VIEW θ L2 L L1 DETAIL A Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-187 © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice 11 Doc. No. MD-3030, Rev. D CAT705, CAT706, CAT813 SOIC 8-Lead 150 mils (V) (1) (2) SYMBOL MIN NOM MAX A A1 b c E1 E 1.35 0.10 0.33 0.19 4.80 5.80 3.80 1.27 BSC 0.25 0.40 0º 1.75 0.25 0.51 0.25 5.00 6.20 4.00 0.50 1.27 8º D E E1 e h L PIN # 1 IDENTIFICATION TOP VIEW θ D h θ c A1 A e b L SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. Doc. No. MD-3030 Rev. D 12 © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice CAT705, CAT706, CAT813 EXAMPLE OF ORDERING INFORMATION (1) Prefix CAT Optional Company ID Device # 706 Product Number Suffix R V Package V: SOIC 8-Lead Z: MSOP 8-Lead Reset Threshold Voltage Blank: See Ordering Part Number table T: 3.08V S: 2.93V R: 2.63V I -G Lead Finish G:NiPdAu T3 Tape & Reel T: Tape & Reel 3: 3000/Reel 705 706 813 Temperature Range I = Industrial (-40ºC to 85ºC) TOP MARKING INFORMATION (FOR ALL THRESHOLDS) NiPdAu Finish (-G) Device # CAT705 CAT706 CAT813 Package MSOP MSOP MSOP Top Marking ABRT ABRT ABRS Device # CAT705 CAT706 CAT813 Package SOIC SOIC SOIC Top Marking CAT705V CAT706 V CAT813V ORDERING PART NUMBER Order Part Number CAT705VI-G CAT705ZI-G CAT706VI-G CAT706ZI-G CAT706RVI-G CAT706RZI-G CAT706SVI-G CAT706SZI-G CAT706TVI-G CAT706TZI-G CAT813VI-G CAT813ZI-G Threshold Voltage 4.65V 4.40V 2.63V 2.93V 3.08V 4.65V Notes: (1) All packages are RoHS-compliant (Lead-free, Halogen-free). (2) (3) (4) The standard lead finish is NiPdAu. This device used in the above example is a CAT706RVI -GT3 (2.63V, SOIC 8-Lead, Industrial Temperature, NiPdAu, Tape & Reel, 3,000/reel) Contact factory for package availability. © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice 13 Doc. No. MD-3030, Rev. D CAT705, CAT706, CAT813 REVISION HISTORY Date 21-Jan-08 3-Nov-08 Rev. A B Description Initial Issue Change logo and fine print to ON Semiconductor Update Features Update Applications Update Description Update Block Diagram Update Recommended Operating Conditions Update Electrical Operating Characteristics Update Watchdog Timing Update Top Marking Information Update Electrical Operating Characteristics 27-Oct-09 C 06-July-10 D ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center: Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative Doc. No. MD-3030 Rev. D 14 © 2010 SCILLC. All rights reserved. Characteristics subject to change without notice