CM1401-03CP

CM1401-03 4-Channel ESD/EMI Filter Array Plus 4-Channel ESD Array for USB Product Description The CM1401−03 is a multichannel array with four low−pass filter + ESD channels and four ESD−only channels. The CM1401−03 reduces EMI/RFI emissions on a data port and protects against ESD on a USB port. Each EMI/RFI channel integrates a high quality pi−style filter (C−R−C) that provides greater than 30 dB attenuation in the 800−2700 MHz range relative to the pass band attenuation. These pi−style filters are bidirectional, controlling EMI both to and from a data port connector. The CM1401−03 provides a high−level of ESD protection on all eight channels for sensitive electronic components that may be subjected to electrostatic discharge (ESD). The input pins safely dissipate ESD strikes of ±15 kV, exceeding the maximum requirement of the IEC 61000−4−2 international standard. Using the MIL−STD−883 (Method 3015) specification for Human Body Model (HBM) ESD, the device provides protection for contact discharges to greater than ±30 kV. The CM1401−03 is particularly well suited for portable electronics (e.g., cellular telephones, PDAs, notebook computers) because of its small package footprint and low weight. The CM1401−03 incorporates OptiGuardt coating for improved reliability at assembly and comes in a space−saving, low−profile Chip Scale Package with RoHS−compliant lead−free finishing. Features • • • • • • • • • • • Functionally and Pin−Compatible with CSPEMI307A Device OptiGuardt Coated for Improved Reliability at Assembly Four Channels of Combined EMI/RFI Filtering + ESD Protection Four Additional Channels of ESD−Only Protection 40 dB Absolute Attenuation (Typical) at 1 GHz 35 dB Attenuation (Typical) at 1 GHz Relative to Pass Band ±15 kV ESD Protection on All Channels (IEC 61000−4−2 Level 4, Contact Discharge) ±30 kV ESD Protection on All Channels (HBM) 15−Bump, 2.960 mm X 1.330 mm Footprint Chip Scale Package (CSP) Features Extremely Low Lead Inductance for Optimum Filter and ESD Performance These Devices are Pb−Free and are RoHS Compliant Applications • EMI Filtering and ESD Protection for Both Data and • • • • • • I/O Ports Outer Four Channels Provide ESD Protection for USB Lines and Other I/O Port Applications Wireless Handsets © Semiconductor Components Industries, LLC, 2011 March, 2011 − Rev. 4 1 http://onsemi.com WLCSP15 CP SUFFIX CASE 567BS MARKING DIAGRAM N013 MG G N013 = CM1401−03CP M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping† CM1401−03CP CSP−15 (Pb−Free) 3500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Handheld PCs / PDAs MP3 Players Notebooks Desktop PCs Publication Order Number: CM1401−03/D CM1401−03 BLOCK DIAGRAM 100 W FILTER + ESDn* FILTER + ESDn* 30 pF ESDn* 30 pF 30 pF GND (Pins B1−B3) 1 of 4 EMI/RFI + ESD Channels. 1 of 4 ESD−only Channels *See Package/Pinout Diagram for expanded pin information. PACKAGE / PINOUT DIAGRAMS Table 1. PIN DESCRIPTIONS Top View (Bumps Down View) 15−bump CSP Package Pin Name Description A1 ESD_1 A2 FILTER + ESD_1 Filter + ESD Channel 1 A3 FILTER + ESD_2 Filter + ESD Channel 2 A4 FILTER + ESD_3 Filter + ESD Channel 3 A5 FILTER + ESD_4 Filter + ESD Channel 4 A6 ESD_2 ESD Channel 2 B1−B3 GND Device Ground C1 ESD_3 ESD Channel 3 C2 FILTER + ESD_1 Filter + ESD Channel 1 C3 FILTER + ESD_2 Filter + ESD Channel 2 ESD Channel 1 C4 FILTER + ESD_3 Filter + ESD Channel 3 C5 FILTER + ESD_4 Filter + ESD Channel 4 C6 ESD_4 Orientation Marking A 1 2 + 3 4 5 6 N013 B C Bottom View (Bumps Up View) ESD_3 C1 FILTER+ESD_2 C2 C3 C4 FILTER+ESD_4 C5 FILTER+ESD_1 FILTER+ESD_3 GND B2 GND B1 ESD Channel 4 Orientation Marking ESD_1 A1 A1 A3 ESD_4 GND B3 FILTER+ESD_2 A2 C6 A4 FILTER+ESD_4 A5 FILTER+ESD_1 FILTER+ESD_3 A6 ESD_2 CM1401−03 CSP Package SPECIFICATIONS Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Rating Units –65 to +150 °C DC Power per Resistor 100 mW DC Package Power Rating 600 mW Storage Temperature Range Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 3. STANDARD OPERATING CONDITIONS Parameter Operating Temperature Range http://onsemi.com 2 Rating Units –40 to +85 °C CM1401−03 Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1) Symbol Parameter R Resistance C Capacitance Conditions At 2.5 V DC TCR Temperature Coefficient of Resistance TCC Temperature Coefficient of Capacitance At 2.5 V DC Diode Voltage (reverse bias) IDIODE = 10 mA ILEAK Diode Leakage Current (reverse bias) VDIODE = 3.3 V VSIG Signal Voltage Positive Clamp Negative Clamp ILOAD = 10 mA VESD In−system ESD Withstand Voltage a) Human Body Model, MIL−STD−883, Method 3015 b) Contact Discharge per IEC 61000−4−2 Level 4 (Note 2) Clamping Voltage during ESD Discharge MIL−STD−883 (Method 3015), 8 kV Positive Transients Negative Transients (Notes 2 and 3) Cut−off Frequency ZSOURCE = 50 W, ZLOAD = 50 W R = 100 W, C = 30 pF VDIODE VCL fC Min Typ Max Units 80 100 120 W 24 30 36 pF 1200 ppm/°C −300 ppm/°C 6.0 V 100 5.6 −1.5 6.8 –0.8 9.0 −0.4 nA V kV ±30 ±15 V +10 –5 58 MHz 1. TA = 25°C unless otherwise specified. 2. ESD applied to input and output pins with respect to GND, one at a time. 3. Clamping voltage is measured at the opposite side of the EMI filter to the ESD pin. For example, if ESD is applied to Pin A2, then clamping voltage is measured at Pin C2. http://onsemi.com 3 CM1401−03 PERFORMANCE INFORMATION Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 1. Insertion Loss vs. Frequency (A2−C2 to GND B2) Figure 2. Insertion Loss vs. Frequency (A3−C3 to GND B2) http://onsemi.com 4 CM1401−03 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, DC Bias = 0 V, 50 W Environment) Figure 3. Insertion Loss vs. Frequency (A4−C4 to GND B2) Figure 4. Insertion Loss vs. Frequency (A5−C5 to GND B2) http://onsemi.com 5 CM1401−03 PERFORMANCE INFORMATION (Cont’d) Typical Filter Performance (TA = 255C, 50 W Environment) Figure 5. Comparison of Filter Response Curves for CM1401−03CS with DC Bias http://onsemi.com 6 CM1401−03 PERFORMANCE INFORMATION (Cont’d) Figure 6. Filter Capacitance vs. Input Voltage over Temperature (normalized to capacitance at 2.5 VDC and 255C) Figure 7. Resistance vs. Temperature (normalized to resistance at 255C) http://onsemi.com 7 CM1401−03 APPLICATION INFORMATION Table 5. PRINTED CIRCUIT BOARD RECOMMENDATIONS Parameter Value Pad Size on PCB 0.240 mm Pad Shape Round Pad Definition Non−Solder Mask defined pads Solder Mask Opening 0.290 mm Round Solder Stencil Thickness 0.125 − 0.150 mm Solder Stencil Aperture Opening (laser cut, 5% tapered walls) 0.300 mm Round Solder Flux Ratio 50/50 by volume Solder Paste Type No Clean Pad Protective Finish OSP (Entek Cu Plus 106A) Tolerance − Edge To Corner Ball ±50 mm Solder Ball Side Coplanarity ±20 mm Maximum Dwell Time Above Liquidous (183°C) 60 seconds Maximum Soldering Temperature for Lead−free Devices using a Lead−free Solder Paste Non−Solder Mask Defined Pad 0.240 mm DIA. Solder Stencil Opening 0.300 mm DIA. Solder Mask Opening 0.290 mm DIA. Figure 8. Recommended Non−Solder Mask Defined Pad Illustration Figure 9. Lead−free (SnAgCu) Solder Ball Reflow Profile http://onsemi.com 8 260°C CM1401−03 PACKAGE DIMENSIONS WLCSP15, 2.96x1.33 CASE 567BS−01 ISSUE O PIN A1 REFERENCE 2X D ÈÈ A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. B E DIM A A1 A2 b D E eD eE 0.05 C 2X 0.05 C TOP VIEW A2 0.05 C A RECOMMENDED SOLDERING FOOTPRINT* 0.05 C NOTE 3 A1 C SIDE VIEW SEATING PLANE eD/2 15X 0.05 C A B 0.03 C PACKAGE OUTLINE A1 0.87 eD b eE 0.44 C 15X 0.50 PITCH B A 1 2 3 4 5 6 MILLIMETERS MIN MAX 0.65 0.56 0.21 0.27 0.40 REF 0.29 0.35 2.96 BSC 1.33 BSC 0.50 BSC 0.435 BSC 0.25 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 7 8 9 BOTTOM VIEW OptiGuardt is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative CM1401−03/D