CM6136 Single-Channel Transient Voltage Suppressor
Product Description
ON Semiconductor’s CM6136 is an Application Specific Integrated Passivet (ASIPt) component in a 2 x 2, 4−bump, 0.4 mm pitch, CSP form factor. This device is designed for:
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• • • •
Fuse Transient Voltage Suppression (TVS) Electrostatic Discharge Protection Electrical Overstress Protection
WLCSP4 CP SUFFIX CASE 567CA
Features
• 4−Bump, 0.8 mm X 0.8 mm Footprint Chip Scale Package (CSP) • These Devices are Pb−Free and are RoHS Compliant
A1
ELECTRICAL SCHEMATIC
Fuse A2
Table 1. PIN DESCRIPTIONS
4−bump CSP Package Pin A1 A2 B1 & B2 Fuse Terminal 1 TVS Channel / Fuse Terminal 2 Device Ground GND B1 & B2 Description TVS
PACKAGE / PINOUT DIAGRAMS
Orientation Marking 1 2 A B 2 A2 B2 1 A1 A1 B1 Orientation Marking F X
MARKING DIAGRAM
FX
A B
+
FX
= CM6136 = Single Digit Date Code
Top View (Bumps Down View)
Bottom View (Bumps Up View) X = Single Digit Date Code
ORDERING INFORMATION
Device CM6136 Package WLCSP4 (Pb−Free) Shipping† 10,000/Tape & Reel
4−Bump CSP Package
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2011
April, 2011 − Rev. 1
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Publication Order Number: CM6136/D
CM6136
ELECTRICAL SPECIFICATIONS AND CONDITIONS
Table 2. ABSOLUTE RATINGS
Parameter Failing to nonconductive, I2t − from A1 pin to device ground (Maximum IPP value using 10/1000 ms pulse). See Notes 1 and 2. Failing to nonconductive, I2t − from A2 pin to device ground (Maximum IPP value using 10/1000 ms pulse). See Notes 1 and 2. 1. The device must not burn to open−circuit, when the value is below maximum IPP. 2. This parameter is characterized at 25°C using an ON Semiconductor−specific test board. Rating 4 50 Units A A
Table 3. PARAMETERS AND OPERATING CONDITIONS
Parameter Storage Temperature Range Operating Temperature Range Rating –55 to +150 –30 to +85 Units °C °C
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Symbol R ROPEN tFUSE tLIFE IOFF VBR Parameter Resistance A1 − A2 Resistance after open fuse Fusing time Fuse life time Stand−off quiescent current Break down voltage Conditions B1 and B2 floating (Note 2) B1 and B2 floating B1 and B2 floating; I = 5 A (Note 3) B1 and B2 floating; I = 2 A (Notes 3, 4 and 9) From A1 pin to B1 and B2 pins; Stand−off voltage VOFF = 12 V From A1 pin to B1 and B2 pins; Break down current IBR = 20 mA (Note 6) From A1 pin to B1 and B2 pins; Clamping current ICL = 1 A (Notes 6 and 7) From A1 pin to B1 and B2 pins; Forward current IF = 850 mA VBIAS = 0 V VBIAS = 5 V ESD protection peak discharge Voltage at A1 pin or A2 to B1 and B2 a) Contact Discharge per IEC 61000−4−2 standard b) Air Discharge per IEC 61000−4−2 standard Minimum attenuation Freq = 80 MHz − 1 GHz Freq = 1 − 4 GHz (Note 8) ±30 ±30 RSOURCE = RLOAD = 50 W 8 20 dB 73 190 92 15.5 4000 100 1 100 Min Typ Max 50 Units mW MW ms Hours nA V
VCL
Clamping voltage during transient
19.5
V
VF CL1 CL2 VESD
Forward voltage Line capacitance
1.3
V pF pF kV
fC
1. 2. 3. 4. 5. 6. 7. 8. 9.
All parameters specified for TA = 25°C unless otherwise noted. Characterization data for DC parameters is taken from −30°C to 85°C. This parameter is measured using low current to avoid self−heating. These parameters are characterized using ON Semiconductor−specific test boards. Fuse is considered failed when its resistance is higher than 1 W. Cumulative distribution of VBR between 15.5 V and 16.0 V is about 4.5%. Transient: 8 x 20 ms current pulse. Cumulative distribution of VCL between 19.0 V and 19.5 V is about 4.5%. Standard IEC 61000−4−2 with CDischarge = 150 pF, RDischarge = 330 W. Fuse lifetime is extrapolated from Accelerated Life Test (ALT) at 125°C.
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CM6136
RF CHARACTERISTICS TA = 255C, 50 W Environment
0 dB
− 10 dB
5V
IN SER TION LOS S
−20 dB
0V
− 30 dB
−40 dB
−50 dB
3 10 100 FR EQUEN CY (MH z) 1000 2000 60 00
Figure 1. Insertion Loss (0 V and 5 V Bias)
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CM6136
PACKAGE DIMENSIONS
WLCSP4, 0.8x0.8 CASE 567CA−01 ISSUE O
D A B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. DIM A A1 A2 b D E e MILLIMETERS MIN MAX 0.47 0.53 0.17 0.24 0.30 REF 0.24 0.29 0.80 BSC 0.80 BSC 0.40 BSC
2X 2X
0.05 C 0.05 C
TOP VIEW A2 0.05 C A 0.05 C
NOTE 3
A1
SIDE VIEW
4X
b
B A 1 2
0.05 C A B 0.03 C
BOTTOM VIEW
Application Specific Integrated Passive is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
È È
e e
PIN A1 REFERENCE
E
RECOMMENDED SOLDERING FOOTPRINT*
C
SEATING PLANE
A1
PACKAGE OUTLINE
0.40 PITCH
4X
0.40 PITCH
0.25
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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CM6136/D
