CMPWR101

250mA SmartORTM Regulator with VAUX Switch CMPWR101 Features • • • • • • • • • • Automatic detection of VCC input supply Glitch-free output during supply transitions Built-in hysteresis during supply selection 250mA output maximum load current Fully integrated VAUX switch Overload current protection Short circuit current protection Operates from either VCC or VAUX 8-pin SOIC package RoHS compliant (lead-free) finishing Applications • • • • PCI adapter cards Network Interface Cards (NICs) Dual power systems Systems with standby capabilities Product Description The California Micro Devices’ SmartORTM CMPWR101 is a low dropout regulator that delivers up to 250mA of load current at a fixed 3.3V output. An internal threshold level (typically 4.1V) is used to prevent the regulator from being operated below dropout voltage. The device continuously monitors the input supply and will automatically disable the regulator when VCC falls below the threshold level. When the regulator is disabled, a low impedance, fully integrated switch is enabled which allows the output to be directly powered from an auxiliary 3.3V supply. When VCC is restored to a level above the select threshold, the low impedance switch is disabled and the regulator is once again enabled. All the necessary control circuitry needed to provide a smooth and automatic transition between the supplies has been incorporated. This allows VCC to be dynamically switched without loss of output voltage. An output logic signal, DRIVE, is active LOW whenever the internal regulator is disabled. The CMPWR101 is housed in a 8-pin SOIC package and is available with RoHS compliant lead-free finishing. ©2010 SCILLC. All rights reserved. June 2010 Rev. 3 Publication Order Number: CMPWR101/D CMPWR101 Typical Application Circuit Simplified Electrical Schematic PIN DESCRIPTIONS PIN(S) 1 NAME VCC DESCRIPTION VCC is the power source for the internal regulator and is monitored continuously by an internal controller circuit. Whenever VCC exceeds VCCSEL (4.25V typically), the internal regulator will be enabled and deliver a fixed 3.3V at VOUT. When VCC falls below VCCDES (4.10V typically), the regulator will be disabled. Internal loading on this pin is typically 0.6mA when the regulator is enabled, which reduces to 0.1mA whenever the regulator is disabled. If VCC falls below the voltage on the VAUX pin, the VCC loading will further reduce to only a few microamperes. During a VCC power-up or power-down sequence, there will be an effective step increase in VCC line current when the regulator is enabled/disabled. This line current transient will cause a voltage disturbance at the VCC pin. The magnitude of the disturbance will be directly proportional to the effective power supply source impedance being delivered to the VCC input. A built-in hysteresis voltage of 150mV has been incorporated to minimize any chatter during supply changeover. It is recommended that the power supply connected to the VCC input should have a source resistance of less than 0.25Ω to minimize the event of chatter during the enabling/disabling of the regulator. If the VCC pin is within a few inches of the main input filter, a capacitor may not be necessary. Otherwise an input filter capacitor in the range of 1µF to 10µF will help to lower the effective source impedance. VAUX is the auxiliary power source. When selected, (VCC < VCCDES), the auxiliary supply is directly connected to VOUT, via the low impedance (0.3Ω typically) fully integrated switch. The internal loading on this pin is typically less than 10µA and will increase to 100µA if VCC falls below the voltage on VAUX. When VAUX = 0V, the VCCDES voltage is inhibited which prevents the regulator from being disabled. GND is the negative reference for all voltages. The current that flows in the ground connection is very low (typically 0.6mA) and has minimal variation over all load conditions. NC is an unconnected pin which is electrically isolated from the internal circuitry VOUT is the regulator output voltage connection used to power the load. An output capacitor of 4.7µF is used to provide the necessary phase compensation, thereby preventing oscillation. The capacitor also helps to minimize the peak output disturbance during power supply changeover. DRIVE is a CMOS output logic signal (Active Low) referenced to the VCC supply. This output is taken low whenever the internal regulator is not enabled. This output is intended only as a control signal for external circuitry. 2-3 VAUX 4 GND 5 6-7 NC VOUT 8 DRIVE Rev. 3 | Page 2 of 12 | www.onsemi.com CMPWR101 VCC VAUX VAUX GND 1 2 3 4 8 7 6 5 DRIVE VOUT VOUT NC 8-pin SOIC Ordering Information PART NUMBERING INFORMATION Pins 8 Package Power SOIC Ordering Part Number1 CMPWR101R Part Marking CMPWR 101R Note 1: Parts are shipped in Tape & Reel form unless otherwise specified. Specifications ABSOLUTE MAXIMUM RATINGS PARAMETER ESD Protection (HBM) Pin Input Voltages VCC VAUX DRIVE Storage Temperature Range Operating Temperature Range Ambient Junction Power Dissipation (See Note 1) RATING +2000 UNITS V [GND - 0.5] to +6.0 [GND - 0.5] to +4.0 [GND - 0.5] to [VCC + 0.5] -40 to +150 0 to +70 0 to +125 0.5 V V °C °C °C W Note 1: The power rating is based on a printed circuit board heat spreading capability equivalent to 2 square inches of copper connected to the GND pins. Typical multi-layer boards using power plane construction will provide this heat spreading ability without the need for additional dedicated copper area. (Please consult with factory for thermal evaluation assistance). Rev. 3 | Page 3 of 12 | www.onsemi.com CMPWR101 STANDARD OPERATING CONDITIONS PARAMETER VCC VAUX Ambient Operating Temperature Range Load Current CEXT VALUE 5.0 +0.5 3.3 +0.3 0 to +70 0 to 250 4.7 +20% UNITS V V °C mA μF Rev. 3 | Page 4 of 12 | www.onsemi.com CMPWR101 ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1) SYMBOL VOUT ILIM VCCSEL VCCDES VCCHYST VR LOAD VR LINE RSW IRCC IRAUX IGND PARAMETER Regulator Output Voltage Regulator Current Limit VCC Select Voltage VCC Deselect Voltage Hysteresis Voltage Load Regulation Line Regulation xx VAUX Switch Resistance VCC Reverse Leakage VAUX Reverse Leakage Ground Current Regulator enabled Regulator disabled See Note 2 VCC=5V, 5mA < ILOAD < 250mA ILOAD = 5mA; 4.5V < VCC < to 5.5V VCCDES > VCC, VAUX = 3.3V VAUX = 3.3V, VCC = 0V VAUX = 0V, VCC = 5V VCC < VCCDES, ILOAD = 0mA VCC > VCCSEL, ILOAD = 0mA VCC > VCCSEL, ILOAD = 250mA VAUX > VCC VCC > VAUX RPULLUP to VCC, VCC > VCCSEL RPULLDOWN to GND, VCCDES > VCC 3.90 CONDITIONS 0mA < ILOAD < 250mA MIN TYP MAX UNITS V mA 4.30 4.10 0.20 20 2 0.25 2 2 0.20 0.60 0.70 0.20 0.02 4.0 0.1 0.40 50 50 0.40 1.00 1.20 0.40 0.10 8.0 0.4 4.45 V V V mV mV Ω 3.135 3.300 3.465 275 μA μA mA mA mA mA mA kΩ kΩ IAUX VAUX Supply Current ROH ROL DRIVE Pull-up Resistance DRIVE Pull-down Resistance Note 1: Operating Characteristics are over Standard Operating Conditions unless otherwise specified. Note 2: The hysteresis defines the maximum level of acceptable disturbance on VCC during switching. It is recommended that the VCC source impedance be kept below 0.25Ω to ensure the switching disturbance remains below the hysteresis during select/deselect transitions. An input capacitor may be required to help minimize the switching transient. Rev. 3 | Page 5 of 12 | www.onsemi.com CMPWR101 Performance Information CMPWR101 Typical DC Characteristics (nominal conditions unless specified otherwise) Rev. 3 | Page 6 of 12 | www.onsemi.com CMPWR101 Rev. 3 | Page 7 of 12 | www.onsemi.com CMPWR101 Performance Information (cont’d) CMPWR101 Transient Characteristics (nominal conditions unless specified otherwise) (VCC source resistance set to 0.2Ω) Rev. 3 | Page 8 of 12 | www.onsemi.com CMPWR101 Performance Information (cont’d) CMPWR101 Typical Thermal Characteristics The overall junction to ambient thermal resistance (θJA) for device power dissipation (PD) consists primarily of two paths in series. The first path is the junction to the case (θJC) which is defined by the package style, and the second path is case to ambient (θCA) thermal resistance which is dependent on board layout. The final operating junction temperature for any set of conditions can be estimated by the following thermal equation: TJUNC = TAMB + PD (θJA) The CMPWR101 uses a standard SOIC package. When this package is mounted on a double-sided printed circuit board with two square inches of copper allocated for "heat spreading", the resulting θJA is 85°C/W. Based on a maximum power dissipation of 0.43W (1.7V x 250mA) with an ambient of 70°C, the resulting junction temperature will be: TJUNC = TAMB + PD (θJA) = 70°C + 0.43W (80°C/W) = 70°C + 37°C = 103°C Thermal characteristics were measured using a double-sided board with two square inches of copper area connected to the GND pin for "heat spreading". Measurements showing performance up to junction temperature of 125°C were performed under light load conditions (5mA). This allows the ambient temperature to be representative of the internal junction temperature. Note: The use of multi-layer board construction with separate ground and power planes will further enhance the overall thermal performance. In the event of no copper area being dedicated for heat spreading, a multi-layer board construction, using only the minimum size pad layout, will provide the CMPWR101 with an overall θJA of 100°C/W which allows up to 500mW to be safely dissipated. = TAMB + PD (θJC) + PD (θCA) Rev. 3 | Page 9 of 12 | www.onsemi.com CMPWR101 Rev. 3 | Page 10 of 12 | www.onsemi.com CMPWR101 Mechanical Details SOIC-8 Mechanical Specifications Dimensions for CMPWR101 devices packaged in 8-pin SOIC packages are presented below. For complete information on the SOIC-8 package, see the California Micro Devices SOIC Package Information document. PACKAGE DIMENSIONS Package Pins Millimeters Dimensions Min A A1 B C D E e H L # per tube # per tape and reel 1.35 0.10 0.33 0.19 4.80 3.80 Max 1.75 0.25 0.51 0.25 5.00 4.19 Min 0.053 0.004 0.013 0.007 0.189 0.150 Max 0.069 0.010 0.020 0.010 0.197 0.165 SOIC 8 Inches 1.27 BSC 5.80 0.40 6.20 1.27 0.050 BSC 0.228 0.016 0.244 0.050 100 pieces* 2500 pieces Controlling dimension: inches Package Dimensions for SOIC-8 * This is an approximate number which may vary. Rev. 3 | Page 11 of 12 | www.onsemi.com CMPWR101 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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