DM74ALS374N

Revised February 2000 DM74ALS374 Octal 3-STATE D-Type Edge-Triggered Flip-Flop General Description Features This 8-bit register features totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provides this register with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. It is particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. ■ Switching specifications at 50 pF The eight flip-flops of the DM74ALS374 are edge-triggered D-type flip-flops. On the positive transition of the clock, the Q outputs will be set to the logic states that were set up at the D inputs. ■ Switching specifications guaranteed over full temperature and VCC range ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ Functionally and pin-for-pin compatible with LS TTL counterpart ■ Improved AC performance over DM74LS374 at approximately half the power ■ 3-STATE buffer-type outputs drive bus lines directly A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the flip-flops. That is, the old data can be retained or new data can be entered even while the outputs are OFF. Ordering Code: Order Number Package Number DM74ALS374WM M20B Package Description DM74ALS374SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74ALS374N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram © 2000 Fairchild Semiconductor Corporation DS006113 www.fairchildsemi.com DM74ALS374 Octal 3-STATE D-Type Edge-Triggered Flip-Flop September 1986 DM74ALS374 Function Table Output Control Clock D Output Q L ↑ H H L ↑ L L L L X Q0 H X X Z L = LOW State H = HIGH State X = Don’t Care ↑ = Positive Edge Transition Z = High Impedance State Q0 = Previous Condition of Q Logic Diagram www.fairchildsemi.com 2 Supply Voltage 7V Input Voltage 7V Voltage Applied to Disabled Output 5.5V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range (Note 2) Typical θJA N Package 60.0°C/W M Package 79.0°C/W Note 2: This product meets application requirements of 500 temperature cycles from −65°C to +150°C. Recommended Operating Conditions Symbol Parameter Min Nom Max Units 4.5 5 5.5 V VCC Supply Voltage VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −2.6 mA IOL LOW Level Output Current fCLOCK Clock Frequency tW Width of Clock Pulse 2 V 0 24 mA 35 MHz HIGH 14 ns LOW 14 ns tSU Data Setup Time (Note 3) 10↑ ns tH Data Hold Time (Note 3) 0↑ ns TA Free Air Operating Temperature 0 °C 70 Note 3: The (↑) arrow indicates the positive edge of the Clock is used for reference. DC Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol Parameter Conditions Min Typ Max Input Clamp Voltage VCC = 4.5V, II = −18 mA VOH HIGH Level Output VCC = 4.5V IOH = Max Voltage VCC = 4.5V to 5.5V IOH = −400 µA LOW Level Output VCC = 4.5V IOL = 12 mA 0.25 0.4 IOL = 24 mA 0.35 0.5 V 0.1 mA VOL Voltage II Input Current @ Max. −1.5 Units VIK 2.4 3.2 V V VCC − 2 V VCC = 5.5V, VIH = 7V Input Voltage V IIH HIGH Level Input Current VCC = 5.5V, VIH = 2.7V 20 µA IIL LOW Level Input Current VCC = 5.5V, VIL = 0.4V −0.2 mA IO Output Drive Current VCC = 5.5V −112 mA IOZH OFF-State Output Current, VCC = 5.5V, VO = 2.7V 20 µA −20 µA mA VO = 2.25V −30 HIGH Level Voltage Applied IOZL OFF-State Output Current, VCC = 5.5V, VO = 0.4V LOW Level Voltage Applied ICC Supply Current VCC = 5.5V Outputs HIGH 11 19 Outputs Open Outputs LOW 19 28 mA Outputs Disabled 20 31 mA 3 www.fairchildsemi.com DM74ALS374 Absolute Maximum Ratings(Note 1) DM74ALS374 AC Electrical Characteristics Symbol Parameter Conditions fMAX Maximum Clock Frequency VCC = 4.5V to 5.5V tPLH Propagation Delay Time RL = 500Ω LOW-to-HIGH Level Output CL = 50 pF tPHL From tPZL tPHZ tPLZ Propagation Delay Time Max MHz Any Q 3 12 ns Clock Any Q 5 16 ns Any Q 5 17 ns Any Q 7 18 ns Any Q 2 10 ns Any Q 3 18 ns Output to HIGH Level Output Control Output Enable Time Output to LOW Level Output Control Output Disable Time Output from HIGH Level Output Control Output Disable Time Output from LOW Level Output Control 4 Units Clock Output Enable Time www.fairchildsemi.com Min 35 HIGH-to-LOW Level Output tPZH To DM74ALS374 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com DM74ALS374 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D www.fairchildsemi.com 6 DM74ALS374 Octal 3-STATE D-Type Edge-Triggered Flip-Flop Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com