DM74ALS645AWMX

Revised February 2000 DM74ALS645A Octal Bus Transceivers General Description Features These octal bus transceivers are designed for asynchronous two-way communication between data busses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control (DIR) input. The enable input (G) can be used to disable the device so the busses are effectively isolated. ■ Advanced Oxide-isolated Ion-implanted Schottky TTL process ■ Switching performance is guaranteed over full temperature and VCC supply range ■ Switching performance specified at 50 pF ■ PNP input design reduces input loading Ordering Code: Order Number Package Number DM74ALS645AWM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Description DM74ALS645AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Logic Diagram Function Table Control Inputs G Operation DIR L L B Data to A Bus L H A Data to B Bus H X Isolation L = LOW Logic Level H = HIGH Logic Level X = Either LOW or HIGH Logic Level © 2000 Fairchild Semiconductor Corporation DS009304 www.fairchildsemi.com DM74ALS645A Octal Bus Transceivers March 1987 DM74ALS645A Absolute Maximum Ratings(Note 1) Supply Voltage 7V Input Voltage; Control Inputs 7V I/O Ports 5.5V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Typical θJA N Package 53.0°C/W M Package 72.0°C/W Recommended Operating Conditions Symbol Parameter Min Typ Max Units 4.5 5 5.5 V LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −15 mA IOL LOW Level Output Current 24 mA TA Operating Free Air Temperature Range 70 °C VCC Supply Voltage VIH HIGH Level Input Voltage VIL 2 V 0 Electrical Characteristics Over Recommended Free Air Temperature Range Symbol Parameter Test Conditions VIC Input Clamp Voltage VCC = Min, II = −18 mA VOH HIGH Level Output Voltage VCC = 4.5 to 5.5V VCC = Max Min IOH = −0.4 mA VCC − 2 IOH = − 3 mA 2.4 IOH = Max VOL II LOW Level Output Voltage VCC = Min VCC = Max Input Current at Maximum Input Voltage Typ Max Units −1.5 V 3.2 V 2 IOL = 12 mA 0.25 0.4 IOL = 24 mA 0.35 0.5 I/O Ports, VI = 5.5V 100 Control Inputs, VI = 7V 100 V µA IIH HIGH Level Input Current VCC = Max, VI = 2.7V (Note 2) 20 IIL LOW Level Input Current VCC = Max, VI = 0.4V (Note 2) −100 µA IO Output Drive Current VCC = Max, VO = 2.25V −112 mA ICC Supply Current VCC = Max −30 µA Outputs HIGH 30 45 Outputs LOW 36 55 Outputs Disabled 38 58 Min Max Units 3 10 ns 3 10 ns mA Note 2: For I/O ports, IIH and IIL parameters include the 3-STATE output current (IOZL and IOZH). Switching Characteristics Over Recommended Operating Free Air Temperature Range Symbol tPLH Parameter Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output From To (Input) (Output) A or B B or A A or B B or A Conditions VCC = 4.5 to 5.5V, CL = 50 pF, R1 = R2 = 500Ω tPZH Output Enable Time to HIGH Level Output G A or B 5 20 ns tPZL Output Enable Time to LOW Level Output G A or B 5 20 ns tPHZ Output Disable Time from HIGH Level Output G A or B 2 10 ns tPLZ Output Disable Time from LOW Level Output G A or B 4 15 ns www.fairchildsemi.com 2 DM74ALS645A Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 3 www.fairchildsemi.com DM74ALS645A Octal Bus Transceivers Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 4