Revised March 2000
DM74AS640
3-STATE Octal Bus Transceiver
General Description
Features
This advanced Schottky device contains 8 pairs of 3STATE logic elements configured as octal bus transceiver.
This circuit is designed for use in memory, microprocessor
systems and in asynchronous bidirectional data buses.
This device transmits data from the A bus to the B bus, or
vice versa, depending upon the logic level of the direction
control input (DIR). The enable input (G) can be used to
disable the devices, effecting isolation of buses A and B.
■ Switching specifications at 50 pF
The 3-STATE circuitry also contains a protection feature
that prevents these transceivers from glitching the bus during power-up or power-down.
■ Switching specifications guaranteed over full temperature and VCC range
■ Advanced oxide-isolated, ion-implanted Schottky TTL
process
■ Functionally and pin for pin compatible with Schottky,
low power Schottky, and advanced low power Schottky
TTL counterpart
■ Improved AC performance over Schottky, low power
Schottky, and advanced low power Schottky counterparts
■ 3-STATE outputs independently controlled on A and B
buses
■ Low output impedance drive to drive terminated transmission lines to 133Ω
■ Specified to interface with CMOS at VOH = VCC − 2V
Ordering Code:
Order Number
Package Number
DM74AS640WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Description
DM74AS640N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Control Inputs
Operation
G
DIR
L
L
B Data to A Bus
L
H
A Data to B Bus
H
X
Isolation
H = HIGH Logic Level
L = LOW Logic Level
X = Immaterial
Logic Diagram
Top View
© 2000 Fairchild Semiconductor Corporation
DS006708
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DM74AS640 3-STATE Octal Bus Transceiver
October 1986
DM74AS640
Absolute Maximum Ratings(Note 1)
Supply Voltage
7V
Input Voltage
Control Inputs
7V
I/O Ports
5.5V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
0°C to +70°C
Operating Free Air Temperature Range
−65°C to +150°C
Storage Temperature Range
Typical θJA
N Package
51.5°C
M Package
69.0°C
Recommended Operating Conditions
Symbol
Parameter
Min
Typ
Max
Units
4.5
5
5.5
V
VCC
Supply Voltage
VIH
HIGH Level Input Voltage
VIL
LOW Level Input Voltage
0.8
V
IOH
HIGH Level Output Current
−15
mA
IOL
LOW Level Output Current
64
mA
TA
Free Air Operating Temperature
70
°C
2
V
0
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Min
Conditions
Typ
Max
(Note 2)
Input Clamp Voltage
VCC = Min, II = −18 mA
VOH
HIGH Level
VCC = 4.5V to 5.5V, IOH = −2 mA
Output Voltage
VCC = 4.5V, IOH = −3 mA
2.4
V
VCC = 4.5V, IOH = Max
2.4
V
VOL
LOW Level Output Voltage
VCC = Min, IOL = Max
II
Input Current at Max
VCC = Max, VI = 7V,
Input Voltage
(VI = 5.5V for A or B Ports)
IIH
IIL
−1.2
Units
VI
VCC − 2
V
0.35
0.55
V
0.1
mA
HIGH Level
VCC = Max
Control Inputs
20
Input Current
VI = 2.7V (Note 3)
A or B Ports
70
LOW Level
VCC = Max,
Control Inputs
−0.5
Input Current
VI = 0.4V (Note 3)
A or B Ports
−0.75
IO
Output Drive Current
VCC = Max, VO = 2.25V
ICCH
Supply Current with Outputs HIGH
VCC = Max
ICCL
Supply Current with Outputs LOW
ICCZ
Supply Current with Outputs
in 3-STATE
Note 2: All typicals are at VCC = 5.0V, TA = 25°C.
Note 3: For I/O ports, the parameters IIH and IIL include the OFF-State output current, IOZH and IOZL.
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2
V
−50
µA
mA
−150
mA
37
58
mA
78
123
mA
51
80
mA
over recommended operating free air temperature range (unless otherwise noted)
From
Symbol
tPLH
Parameter
Propagation Delay Time
LOW-to-HIGH Level Output
tPHL
Propagation Delay Time
HIGH-to-LOW Level Output
tPZH
Output Enable Time to
HIGH Level Output
tPZL
Output Enable Time to
LOW Level Output
tPHZ
Output Disable Time from
HIGH Level Output
tPLZ
Output Disable Time from
LOW Level Output
(Input)
To
VCC = Min to Max,
(Output)
CL = 50 pF, R1 = R2 = 500Ω
Min
Max
Units
A or B
B or A
2
7
ns
A or B
B or A
2
6
ns
G
A or B
2
8
ns
G
A or B
2
10
ns
G
A or B
2
8
ns
G
A or B
2
13
ns
3
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DM74AS640
Switching Characteristics
DM74AS640
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
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4
DM74AS640 3-STATE Octal Bus Transceiver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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5
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