DM74AS648WMX

Revised July 2003 DM74AS646 • DM74AS648 Octal Bus Transceiver and Register General Description Features This device incorporates an octal bus transceiver and an octal D-type register configured to enable multiplexed transmission of data from bus to bus or internal register to bus. ■ Switching specifications at 50 pF This bus transceiver features totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive provide this device with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. It is particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. ■ Switching specifications guaranteed over full temperature and VCC range ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ Functionally and pin-for-pin compatible with LS TTL counterpart ■ 3-STATE buffer-type outputs drive bus lines directly The registers in the DM74AS646, DM74AS648 are edgetriggered D-type flip-flops. On the positive transition of the clock (CAB or CBA), the input bus data is stored. The SAB and SBA control pins are provided to select whether real-time data or stored data is transferred. A LOW input level selects real-time data, and a HIGH level selects stored data. The select controls have a “make before break” configuration to eliminate a glitch which would normally occur in a typical multiplexer during the transition between stored and real-time data. The enable G and direction control pins provide four modes of operation; real-time data transfer from bus A to B, realtime data transfer from bus B to A, real-time bus A and/or B data transfer to internal storage, or internal store data transfer to bus A or B. When the enable G pin is LOW, the direction pin selects which bus receives data. When the enable G pin is HIGH, both buses become disabled yet their input function is still enabled. Ordering Code: Order Number Package Number DM74AS646WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Description DM74AS646NT N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide DM74AS648WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide DM74AS648NT N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 2003 Fairchild Semiconductor Corporation DS006324 www.fairchildsemi.com DM74AS646 • DM74AS648 Octal Bus Transceiver and Register October 1986 DM74AS646 • DM74AS648 Connection Diagram Function Table Inputs G DIR H X CAB CBA H or L H or L Data I/O (Note 1) SAB SBA A1 thru A8 B1 thru B8 X X X ↑ ↑ X X L L X X X L L X H or L X H L H X X L X Input Input Output Input Input Output Operation or Function DM74AS646 Isolation, Hold Storage Store A and B Data Store A and B Data Real Time B Data to A Bus Real Time B Data to A Bus Stored B Data to A Bus H H or L X H X X X ↑ X X X Input X X X ↑ X X Unspecified (Note 1) Stored B Data to A Bus Real Time A Data to B Bus Real Time A Data to B Bus Stored A Data to B Bus Unspecified Store A, B Unspecified (Note 1) (Note 1) Input DM74AS648 Isolation, Hold Storage Store B, A Unspecified (Note 1) Stored A Data to B Bus Store A, B Unspecified (Note 1) Store B, A Unspecified (Note 1) H—HIGH level; L—LOW level; X—irrelevant; ↑—LOW-to-HIGH level transition Note 1: The data output functions may be enabled or disabled by various signals at the G and DIR inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. www.fairchildsemi.com 2 DM74AS646 • DM74AS648 Logic Diagrams (positive logic) DM74AS646 DM74AS648 Different Modes of Control for DM74AS646, DM74AS648 Storage From A, B or A and B Transfer Stored Data to A or B (Note 2) Real-Time Transfer Bus A to Bus B (Note 2) Real-Time Transfer Bus B to Bus A (Note 2) Note 2: The complement of A and B data are stored and transferred for DM74AS648 3 www.fairchildsemi.com DM74AS646 • DM74AS648 Absolute Maximum Ratings(Note 3) Supply Voltage 7V Input Voltage Control Inputs 7V I/O Ports 5.5V 0°C to +70°C Operating Free Air Temperature Range Note 3: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. −65°C to +150°C Storage Temperature Range Typical θJA N Package 41.1°C/W M Package 81.5°C/W Recommended Operating Conditions Symbol Parameter Min Nom Max 4.5 5 5.5 Units VCC Supply Voltage VIH HIGH Level Input Voltage VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −15 mA IOL LOW Level Output Current fCLK Clock Frequency tW Width of Clock Pulse V 2 V 0 48 mA 90 MHz HIGH 5 ns LOW 6 ns ns tSU Data Setup Time (Note 4) 6↑ tH Data Hold Time (Note 4) 0↑ TA Free Air Operating Temperature 0 ns °C 70 Note 4: The (↑) arrow indicates the positive edge of the Clock is used for reference. Electrical Characteristics over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25°C. Symbol Parameter Conditions Min VIK Input Clamp Voltage VCC = 4.5V, II = −18 mA VOH HIGH Level VCC = 4.5V, VIL = Max IOH = Max Output Voltage VIH = Min IOH = −3 mA VCC = 4.5V to 5.5V, IOH = −2 mA VOL II LOW Level VCC = 4.5V, VIL = Min Output Voltage VIH = 2V, IOL = Max Input Current @ Max VCC = 5.5V Input Voltage IIH IIL HIGH Level Input Current LOW Level Input Current Max Units −1.2 V 2 2.4 3.2 V VCC − 2 0.35 0.5 VI = 7V Control Inputs 0.1 VI = 5.5V A or B Ports 0.1 VCC = 5.5V, VIH = 2.7V Control Inputs 20 (Note 5) A or B Ports 70 VCC = 5.5V, VIL = 0.4V Control Inputs −0.5 (Note 5) A or B Ports −0.75 IO Output Drive Current VCC = 5.5V, VO = 2.25V ICC Supply Current VCC = 5.5V −30 Outputs HIGH DM74AS646 DM74AS648 4 −112 120 V mA µA mA mA 195 Outputs LOW 130 211 Outputs Disabled 130 211 Outputs HIGH 110 185 Outputs LOW 120 195 Outputs Disabled 120 195 Note 5: For I/O ports, the parameters IIH and IIL include the OFF-State current, IOZH and IOZL. www.fairchildsemi.com Typ mA Symbol fMAX tPLH Parameter Conditions Maximum Clock VCC = 4.5V to 5.5V, Frequency R1 = R2 = 500Ω Propagation Delay Time CL = 50 pF To (Output) CBA or CAB Propagation Delay Time Propagation Delay Time LOW-to-HIGH Level Output tPHL A or B Propagation Delay Time Propagation Delay Time LOW-to-HIGH Level Output tPHL SBA or SAB Propagation Delay Time HIGH-to-LOW Level Output tPZH (Note 6) Output Enable Time Output Enable Time to LOW Level Output tPHZ Enable G Output Disable Time Output Disable Time from LOW Level Output tPZH Output Enable Time to HIGH Level Output tPZL Output Enable Time to LOW Level Output tPHZ DIR Output Disable Time ns 2 9 ns 2 9 ns 1 7 ns 2 11 ns 2 9 ns 2 9 ns 3 14 ns 2 9 ns 2 9 ns 3 16 ns 3 18 ns 2 10 ns 2 10 ns A or B from HIGH Level Output tPLZ 8.5 A or B from HIGH Level Output tPLZ 2 A or B to HIGH Level Output tPZL MHz B or A HIGH-to-LOW Level Output tPLH Units Max A or B HIGH-to-LOW Level Output tPLH Min 90 LOW-to-HIGH Level Output tPHL From (Input) Output Disable Time from LOW Level Output Note 6: These parameters are measured with the internal output state of the storage register opposite to that of the bus input. 5 www.fairchildsemi.com DM74AS646 • DM74AS648 DM74AS646 Switching Characteristics DM74AS646 • DM74AS648 DM74AS648 Switching Characteristics Symbol Parameter Conditions fMAX Maximum Clock Frequency VCC = 4.5V to 5.5V, tPLH Propagation Delay Time R1 = R2 = 500Ω LOW-to-HIGH Level Output tPHL From To (Input) (Output) CL = 50 pF CAB or CBA Propagation Delay Time A or B Propagation Delay Time Propagation Delay Time LOW-to-HIGH Level Output tPHL SBA or SAB Propagation Delay Time HIGH-to-LOW Level Output tPZH (Note 7) Output Enable Time Output Enable Time to LOW Level Output tPHZ Enable G Output Disable Time Output Disable Time from LOW Level Output tPZH Output Enable Time to HIGH Level Output tPZL Output Enable Time to LOW Level Output tPHZ DIR Output Disable Time Output Disable Time from LOW Level Output Note 7: These parameters are measured with the internal output state of the storage register opposite to that of the bus input. www.fairchildsemi.com 6 ns 2 9 ns 2 8 ns 1 7 ns 2 11 ns 2 9 ns 2 9 ns 3 15 ns 2 9 ns 2 9 ns 3 16 ns 3 18 ns 2 10 ns 2 10 ns A or B from HIGH Level Output tPLZ 8.5 A or B from HIGH Level Output tPLZ 2 A or B to HIGH Level Output tPZL MHz B or A HIGH-to-LOW Level Output tPLH Units A or B Propagation Delay Time LOW-to-HIGH Level Output tPHL Max 90 HIGH-to-LOW Level Output tPLH Min DM74AS646 • DM74AS648 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M24B 7 www.fairchildsemi.com DM74AS646 • DM74AS648 Octal Bus Transceiver and Register Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N24C Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8