DM74LS377N

Revised March 2000 DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock General Description Features The DM74LS377 is an 8-bit register built using advanced low power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common input enable. The device is packaged in the space-saving (0.3 inch row spacing) 20-pin package. ■ 8-bit high speed parallel registers ■ Positive edge-triggered D-type flip-flops ■ Fully buffered common clock and enable inputs Ordering Code: Order Number Package Number Package Description DM74LS377WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS377N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Logic Symbol VCC = Pin 20 GND = Pin 10 Pin Descriptions Pin Names Truth Table Description Inputs E Enable Input (Active LOW) E D0–D7 Data Inputs H CP Clock Pulse Input (Active Rising Edge) L Q0–Q7 Flip-Flop Outputs L Output CP Dn Qn   X No Change H H L L X H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial © 2000 Fairchild Semiconductor Corporation DS009831 www.fairchildsemi.com DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock October 1988 DM74LS377 Functional Description The DM74LS377 consists of eight edge-triggered D flip-flops with individual D inputs and Q outputs. The Clock (CP) and Enable input (E) are common to all flip-flops. When E is LOW, new data is entered into the register on the next LOW-to-HIGH transition of CP. When E is HIGH, the register will retain the present data independent of the CP. Logic Diagram www.fairchildsemi.com 2 Supply Voltage Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 7V Input Voltage 7V 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Recommended Operating Conditions Symbol Parameter Min Nom Max 4.75 5 5.25 Units VCC Supply Voltage VIH HIGH Level Input Voltage V VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −0.4 mA 8 mA 70 °C 2 IOL LOW Level Output Current TA Free Air Operating Temperature 0 tS (H) Setup Time HIGH or LOW 10 tS (L) Dn to CP 10 tH (H) Hold Time HIGH or LOW 5.0 tH (L) Dn to CP 5.0 tS (H) Setup Time HIGH or LOW 10 tS (L) E to CP 20 tH (H) Hold Time HIGH or LOW 5.0 tH (L) E to CP 5.0 tW (H) CP Pulse Width HIGH or LOW 20 tW (L) V ns ns ns ns ns 20 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = −18 mA VOH HIGH Level VCC = Min, IOH = Max Output Voltage VIL = Max VOL LOW Level VCC = Min, IOL = Max Output Voltage VIH = Min Min 2.7 IOL = 4 mA, VCC = Min II Input Current @ Max VCC = Max, VI = 7V Input Voltage VI = 10V Typ (Note 2) Max Units −1.5 V 3.4 V 0.35 0.5 0.25 0.4 V 0.1 mA IIH HIGH Level Input Current VCC = Max, VI = 2.7V 20.0 µA IIL LOW Level Input Current VCC = Max, VI = 0.4V −0.4 mA IOS Short Circuit Output Current VCC = Max (Note 3) ICC Supply Current VCC = Max −20 −100 mA 28 mA Note 2: All typicals are at VCC = 5V, TA = 25°C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second. Switching Characteristics VCC = +5.0V, TA = +25°C Symbol RL = 2 kΩ, CL = 15 pF Parameter Min fMAX Maximum Clock Frequency tPLH Propagation Delay 30 25 tPHL CP to Qn 25 3 Units Max MHz ns www.fairchildsemi.com DM74LS377 Absolute Maximum Ratings(Note 1) DM74LS377 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B www.fairchildsemi.com 4 DM74LS377 Octal D-Type Flip-Flop with Common Enable and Clock Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com