DM74LS534N

Revised March 2000 DM74LS534 Octal D-Type Flip-Flop with 3-STATE Outputs General Description The DM74LS534 is a high speed, low power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus oriented applications. A buffered Clock (CP) and Output Enable (OE) is common to all flip-flops. The DM74LS534 is the same as the DM74LS374 except that the outputs are inverted. Ordering Code: Order Number Package Number DM74LS534N N20A Package Description 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram Logic Symbol VCC = Pin 20 GND = Pin 10 Truth Table Pin Descriptions Pin Name Inputs Description D0–D7 Data Inputs Dn CP Clock Pulse Input (Active Rising Edge) H OE 3-STATE Output Enable Input (Active LOW) L O0–O7 Complementary 3-STATE Outputs X Outputs   CP X OE On L L L H H Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance = LOW-to-HIGH Clock (CP) transistion  © 2000 Fairchild Semiconductor Corporation DS009812 www.fairchildsemi.com DM74LS534 Octal D-Type Flip-Flop with 3-STATE Outputs March 1989 DM74LS534 Functional Description sistion. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. The DM74LS534 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock (CP) tran- Logic Diagram www.fairchildsemi.com 2 Supply Voltage Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 7V Input Voltage 7V 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Recommended Operating Conditions Symbol Parameter Min Nom Max Units 4.75 5 5.25 V LOW Level Input Voltage 0.8 V VCC Supply Voltage VIH HIGH Level Input Voltage VIL 2 V VOH HIGH Level Output Current −2.6 mA IOL LOW Level Output Current 24 mA TA Free Air Operating Temperature 0 70 °C tS (H) Setup Time HIGH or LOW 20 tS (L) Dn to CP 20 tH (H) Hold Time HIGH or LOW 0 tH (L) Dn to CP 0 tW (H) CP Pulse Width HIGH or LOW 15 tW (L) ns ns ns 15 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = −18 mA VOH HIGH Level VCC = Min, IOH = Max Output Voltage VIL = Max VIH = Min VOL LOW Level VCC = Min, IOL = Max Output Voltage VIL = Max, VIH = Min Min 2.4 IOL = 12 mA, VCC = Min Typ (Note 2) Max Units −1.5 V 3.3 V 0.35 0.5 0.25 0.4 V II Input Current @ Max Input Voltage VCC = Max, VI = 7V 0.1 mA IIH HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA IIL LOW Level Input Current VCC = Max, VI = 0.5V −400 µA IOZH Off-State Output Current with VCC = Max, VO = 2.4V HIGH Level Output Voltage Applied VIH = Min, VIL = Max 20 µA −20 µA −100 mA Off-State Output Current with VCC = Max, VO = 0.4V LOW Level Output Voltage Applied VIH = Min, VIL = Max IOS Short Circuit Output Current VCC = Max (Note 3) ICC Supply Current VCC = Max (Note 4) IOZL −20 45 mA Note 2: All typicals are at VCC = 5V, TA = 25°C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 4: ICC is measured with the DATA inputs grounded and the OUTPUT CONTROLS at 4.5V. 3 www.fairchildsemi.com DM74LS534 Absolute Maximum Ratings(Note 1) DM74LS534 Switching Characteristics VCC = +5.0V, TA = +25°C Symbol RL = 2 kΩ, CL = 45 pF Parameter Min Max fMAX Maximum Clock Frequency 35 tPLH Propagation Delay 28 tPHL CP to Qn 28 tPZH Output Enable Time 28 tPHZ MHz 28 tPZL Output Disable Time 20 tPLZ www.fairchildsemi.com 25 4 Units ns ns ns DM74LS534 Octal D-Type Flip-Flop with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com