MOSFET – Power,
Dual, N-Channel, for 3-Cells
Lithium-ion Battery Protection,
WLCSP8
30 V, 2.6 mW, 30 A
EFC4C002NL
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T h i s N −C h a n n e l P o w e r M O S F E T i s p r o d u c e d u s i n g
ON Semiconductor’s trench technology, which is specifically
designed to minimize gate charge and ultra low on resistance.
This device is suitable for applications of Drone or Notebook PC.
VSSS
RSS(on) Max
IS Max
2.6 mW @ 10 V
30 V
30 A
3.3 mW @ 8 V
5.1 mW @ 4.5 V
Features
•
•
•
•
Ultra Low On−Resistance
Low Gate Charge
Common−Drain Type
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
ELECTRICAL CONNECTION
N−Channel
6, 8
7
Applications
• 3−Cells Lithium−ion Battery Charging and Discharging Switch
1. Source 1
2. Gate 1
3. Source 1
4. Drain
5. Drain
6. Source 2
7. Gate 2
8. Source 2
4, 5
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS at TA = 25_C (Note 1)
Parameter
Symbol
Value
Unit
Source to Source Voltage
VSSS
30
V
Gate to Source Voltage
VGSS
±20
V
Source Current (DC)
IS
30
A
Source Current (Pulse)
PW ≤ 10 μs, Duty Cycle ≤ 1%
ISP
120
A
Total Dissipation (Note 1)
PT
2.6
W
Junction Temperature
Tj
150
_C
Storage Temperature
Tstg
−55 to +150
_C
1, 3
2
PIN ASSIGNMENT
Pin1:S1
Pin3:S1
Pin2:G1
Pin4:D
Pin6:S2
Pin8:S2
Pin7:G2
Pin5:D
(Bottom View)
WLCSP8
CASE 567MC
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
MARKING DIAGRAM
THERMAL RESISTANCE RATINGS
Parameter
Junction to Ambient (Note 1)
Symbol
Value
Unit
RθJA
48
_C/W
1. Surface mounted on ceramic substrate (5000
mm2 ×
0.8 mm).
4C2
AAYWWZ G
4C2
AA
Y
WW
Z
G
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Lot Traceability
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
January, 2021 − Rev. 1
1
Publication Order Number:
EFC4C002NL/D
EFC4C002NL
ELECTRICAL CHARACTERISTICS at TA = 25_C
Value
Parameter
Source to Source Breakdown Voltage
Symbol
Conditions
Min
Typ
Max
Unit
V(BR)SSS
IS = 1 mA, VGS = 0 V
Test Circuit 1
Zero−Gate Voltage Source Current
ISSS
VSS = 24 V, VGS = 0 V
Test Circuit 1
1
μA
Gate to Source Leakage Current
IGSS
VGS = 20 V, VSS = 0 V
Test Circuit 2
200
nA
VGS(th)
VSS = 10 V, IS = 1 mA
Test Circuit 3
2.2
V
gFS
VSS = 10 V, IS = 10 A
Test Circuit 4
RSS(on)
VGS = 10 V, IS = 10 A
Test Circuit 5
1.5
2.0
2.6
mW
VGS = 8 V, IS = 10 A
Test Circuit 5
1.6
2.1
3.3
mW
VGS = 4.5 V, IS = 10 A
Test Circuit 5
2.2
2.9
5.1
mW
Gate Threshold Voltage
Forward Transconductance
Static Source to Source On−State
Resistance
Static Drain to Source On−State
Resistance
Gate Resistance
Turn−ON Delay Time
Rise Time
Turn−OFF Delay Time
Fall Time
RDS(on)
V
1.3
16
S
10
mW
3
W
40
ns
750
ns
td(off)
280
ns
tf
105
ns
6.200
pF
45
nC
RG
td(on)
tr
Input Capacitance
Ciss
Total Gate Charge
Qg
Forward Source to Source Voltage
VGS = 10 V, IS = 1 A
30
VF(S−S)
VSS = 15 V, VGS= 10 V
IS = 10 A
Test Circuit 6
VSS = 15 V, VGS= 0 V, f = 1 MHz
VSS = 15 V, VGS = 4.5 V, IS = 15 A
Test Circuit 7
IS = 10 A, VGS = 0 V
Test Circuit 8
0.75
1.2
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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2
EFC4C002NL
Test circuits are example of measuring FET1 side.
IGSS
VSSS/ISSS
S2
S2
G2
G2
A
G1
VSS
G1
A
S1
S1
When FET1 is measured,
Gate and Source of FET2
are short−circuited.
Figure 2. Test Circuit 2
Figure 1. Test Circuit 1
gFS
VGS(th)
S2
S2
G2
G2
A
A
When FET1 is measured,
Gate and Source of FET2
are short−circuited.
VGS
G1
VSS
G1
VGS
S1
VSS
S1
Figure 4. Test Circuit 4
Figure 3. Test Circuit 3
td(on), tr, td(off), tf
RSS(on)
S2
S2
IS
RL
G2
G2
V
V
G1
VGS
When FET1 is measured,
Gate and Source of FET2
are short−circuited.
G1
VSS
S1
S1
PG
Figure 6. Test Circuit 6
Figure 5. Test Circuit 5
VF(S−S)
Qg
S2
When FET1 is measured,
Gate and Source of FET2
are short−circuited.
When FET1 is measured,
Gate and Source of FET2
are short−circuited.
S2
A
G2
G2
G1
G1
IS
V
IG = 1 mA
RL
S1
PG
S1
VGS = 0 V
VSS
Figure 8. Test Circuit 8
Figure 7. Test Circuit 7
NOTES: When FET2 is measured, the position of FET1 and FET2 is switched.
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3
When FET1 is
measured,+10 V is added to
VGS of FET2.
EFC4C002NL
TYPICAL CHARACTERISTICS
20
TA = 25°C
Single Pulse
50
8V
10 V
VGS = 4.5 V
40
VSS = 10 V
Single Pulse
18
6V
IS, SOURCE CURRENT (A)
IS, SOURCE CURRENT (A)
60
12 V
30
20
10
16
14
25°C
12
TA = 75°C
10
8
6
4
−25°C
2
0
0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
0
0.5
1.0
1.5
2.5
2.0
VSS, SOURCE−TO−SOURCE VOLTAGE (V)
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 9. On−Region Characteristics
Figure 10. Transfer Characteristics
8
RSS(on), STATIC SOURCE−TO−SOURCE
ON−STATE RESISTANCE (mW)
0
IS = 10 A
Single Pulse
6
4
25°C
75°C
2
TA = −25°C
0
3
5
7
9
11
13
15
5.0
VGS = 4.5 V
4.0
3.5
VGS = 8 V
3.0
2.5
VGS = 10 V
2.0
1.5
1.0
0.5
0
−60
−30
0
30
60
90
120
150
VGS, GATE−TO−SOURCE VOLTAGE (V)
TA, AMBIENT TEMPERATURE (°C)
Figure 12. On−Resistance vs. Temperature
2
VSS = 10 V
Single Pulse
10
2
TA = −25°C
75°C
7
5
25°C
3
2
1.0
0.1
2
3
5 7 1.0
2
3
5
7 10
10
7
5
180
VGS = 0 V
Single Pulse
TA = 75°C
3
2
25°C
−25°C
1.0
7
5
3
2
0.1
0.2
2
3.0
IS = 10 A
Single Pulse
4.5
Figure 11. On−Resistance vs. Gate−to−Source Voltage
IS, SOURCE CURRENT (A)
gFS, FORWARD TRANSCONDUCTANCE (S)
RSS(on), STATIC SOURCE−TO−SOURCE
ON−STATE RESISTANCE (mW)
0
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
VF(S−S), FORWARD SOURCE−TO−SOURCE VOLTAGE (V)
IS, SOURCE CURRENT (A)
Figure 14. Forward Source−to−Source Voltage
vs. Current
Figure 13. Forward Transconductance vs. Current
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4
SW, SWITCHING TIME (ns)
10000
VGS, GATE−TO−SOURCE VOLTAGE (V)
EFC4C002NL
VSS = 15 V
VGS = 10 V
1000
tf
td(off)
100
td(on)
tr
0.1
IS, SOURCE CURRENT (A)
100
2
3
5
7 1.0
2
5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
10
5
15
20
25
30
35
40
45
QG, TOTAL GATE CHARGE (nC)
Figure 16. Gate−to−Source Voltage vs. Total
Gate Charge
ISP = 120 A
(PW ≤ 10 ms)
IS = 30 A
3.0
10 ms
100 ms
1 ms
10 ms
1.0
3.5
IS, SOURCE CURRENT (A)
Operation in this area
is limited by RSS(on)
100 ms
DC Operation
TA = 25°C
Single Pulse
Surface mounted on ceramic substrate
(5000 mm2 x 0.8 mm)
0.01
0.01 2 3 5 7 0.1 2 3 5 7 1.0 2 3 5 7 10
RqJA, THERMAL RESISTANCE (°C/W)
2
7 10
VSS = 15 V
IS = 15 A
4.0
Figure 15. Switching Time vs. Current
10
0.1
3
PT, TOTAL DISSIPATION (W)
10
4.5
2 3
Surface mounted on ceramic substrate
(5000 mm2 x 0.8 mm)
2.5
2.0
1.5
1.0
0.5
0
5
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
Figure 17. Safe Operating Area
Figure 18. Total Dissipation vs. Temperature
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
1.0
0.01
Surface mounted on ceramic substrate
(5000 mm2 x 0.8 mm)
Single Pulse
0.1
0.00001
150
VSS, SOURCE−TO−SOURCE VOLTAGE (V)
100
10
50
0.0001
0.001
0.01
PT, PULSE TIME (sec)
Figure 19. Thermal Response
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5
0.1
1.0
10
EFC4C002NL
ORDERING INFORMATION
Device
EFC4C002NLTDG
Marking
Package
Shipping (Qty / Packing)†
NP
WLCSP8 6.00x2.50
(Pb−Free / Halogen Free)
5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WLCSP8, 6.00x2.50 / EFCP6025−8EGJ−021
CASE 567MC
ISSUE O
SCALE 2:1
D
PIN A1
REFERENCE
2X
ÈÈÈÈ
ÈÈÈÈ
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
B
DIM
A
b
b1
D
D1
D2
E
e
e1
L
E
0.05 C
2X
0.05 C
TOP VIEW
A
C
SIDE VIEW
b
e
0.05
D1
1
D2
2
3
4
MILLIMETERS
MIN
MAX
0.23
0.19
0.22
0.28
0.32
0.38
5.95
6.05
0.305 BSC
1.740 BSC
2.45
2.55
1.375 BSC
1.25 BSC
1.97
2.03
SEATING
PLANE
4X
e
DATE 22 JUL 2015
M
C A B
e1/2
e1
b1
C A B
4X
0.05
M
8
4X
0.05
M
7
L
6
5
RECOMMENDED
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
4X
1.375
C A B
1.375
1.74
0.25
BOTTOM VIEW
1.25
4X
0.35
1
4X
2.00
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON00386G
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
WLCSP8, 6.00X2.50 / EFCP6025−8EGJ−021
PAGE 1 OF 1
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