DATA SHEET
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MOSFET – Power, Dual
N-Channel, for 1-Cell
Lithium-ion Battery
Protection
VSSS
12 V
IS MAX
3.2 mW @ 4.5 V
27 A
3.2 mW @ 4.0 V
3.2 mW @ 3.8 V
4.4 mW @ 3.1 V
6.3 mW @ 2.5 V
12V, 3.2mW, 27A
ELECTRICAL CONNECTION
N−Channel
EFC8811R
This Power MOSFET features a low on−state resistance. This
device is suitable for applications such as power switches of portable
machines. Best suited for 1−cell lithium−ion battery applications.
4, 6
Rg
5
Features
•
•
•
•
•
RSS(on) MAX
2.5 V Drive
2 kV ESD HBM
Common−Drain Type
ESD Diode−Protected Gate
Pb−Free, Halogen Free and RoHS Compliance
Rg
2
Applications
• 1−Cell Lithium−ion Battery Charging and Discharging Switch
1: Source1
2: Gate1
3: Source1
4: Source2
5: Gate2
6: Source2
1, 3
Rg = 200 W
MARKING
DIAGRAM
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Parameter
Symbol
Value
Unit
Source to Source Voltage
VSSS
12
V
Gate to Source Voltage
VGSS
±8
V
Source Current (DC)
IS
27
A
Source Current (Pulse)
PW ≤ 100 ms, Duty Cycle ≤ 1%
ISP
100
A
Total Dissipation
Surface mounted on ceramic substrate
(5000 mm2 x 0.8 mm)
PT
2.5
W
Junction Temperature
Tj
150
°C
Storage Temperature
Tstg
−55 to +150
°C
ML
YMZZ
CSP6, 1.77x3.54/
EFCP3517−6DGH−020
CASE 568AL
ML
Y
M
ZZ
= Device Code
= Year of Production
= Month of Assembly Operation
= Assembly Lot Number
PIN CONNECTIONS
1
2
Unit
6
5
°C/W
1: Source1
2: Gate1
3: Source1
3
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE RATINGS
Parameter
Junction to Ambient
Surface mounted on ceramic substrate
(5000 mm2 x 0.8 mm)
Symbol
RqJA
Value
50
4
4: Source2
5: Gate2
6: Source2
ORDERING INFORMATION
See detailed ordering and shipping information on page 2
of this data sheet.
© Semiconductor Components Industries, LLC, 2016
October, 2022 − Rev. 1
1
Publication Order Number:
EFC8811R/D
EFC8811R
ELECTRICAL CHARACTERISTICS (TA = 25°C)
Parameter
Source to Source Breakdown Voltage
Symbol
Test Condition
Min
Typ
Max
Unit
V(BR)SSS
IS = 1 mA, VGS = 0 V (Test Circuit 1)
12
−
−
V
Zero−Gate Voltage Source Current
ISSS
VSS = 10 V, VGS = 0 V (Test Circuit 1)
−
−
1
mA
Gate to Source Leakage Current
IGSS
VGS = ±8 V, VSS = 0 V (Test Circuit 2)
−
−
±1
mA
0.5
−
1.3
V
−
19
−
S
Gate Threshold Voltage
Forward Transconductance
Static Source to Source On−State
Resistance
Turn−ON Delay Time
Rise Time
VGS(th)
gFS
Fall Time
Total Gate Charge
Forward Source to Source Voltage
VSS = 6 V, IS = 3 A (Test Circuit 4)
RSS(on)1
IS = 5 A, VGS = 4.5 V (Test Circuit 5)
1.8
2.3
3.2
mW
RSS(on)2
IS = 5 A, VGS = 4.0 V (Test Circuit 5)
1.9
2.4
3.2
mW
RSS(on)3
IS = 5 A, VGS = 3.8 V (Test Circuit 5)
2.0
2.6
3.2
mW
RSS(on)4
IS = 5 A, VGS = 3.1 V (Test Circuit 5)
2.1
3.3
4.4
mW
RSS(on)5
IS = 5 A, VGS = 2.5 V (Test Circuit 5)
2.7
4.0
6.3
mW
−
80
−
ns
−
570
−
ns
td(off)
−
38,000
−
ns
tf
−
17,700
−
ns
td(on)
tr
Turn−OFF Delay Time
VSS = 6 V, IS = 1 mA (Test Circuit 3)
VSS = 6 V, VGS = 4.5 V, IS = 3 A
(Test Circuit 6)
Qg
VSS = 6 V, VGS = 4.5 V, IS = 27 A
(Test Circuit 7)
−
100
−
nC
VF(S−S)
IS = 3 A, VGS = 0 V (Test Circuit 8)
−
0.75
1.2
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
ORDERING INFORMATION
Device
EFC8811R−TF
Marking
Package
Shipping (Qty / Packing)†
ML
CSP6, 1.77 × 3.54
EFCP3517−6DGH−020
(Pb−Free / Halogen Free)
5,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
2
EFC8811R
TEST CIRCUITS ARE EXAMPLE OF MEASURING FET1 SIDE
S2
S2
G2
G2
A
VSS
G1
G1
A
VGS
S1
Figure 1. Test Circuit 1 − VSSS/ISSS
When FET1 is measured,
Gate and Source of FET2
are short−circuited.
S1
Figure 2. Test Circuit 2 − IGSS
S2
S2
G2
G2
A
When FET1 is measured,
Gate and Source of FET2
are short−circuited.
VSS
G1
A
VSS
G1
VGS
VGS
S1
When FET1 is measured,
Gate and Source of FET2
are short−circuited.
S1
Figure 3. Test Circuit 3 − VGS(th)
Figure 4. Test Circuit 4 − gFS
S2
S2
IS
G2
RL
G2
When FET1 is measured,
Gate and Source of FET2
are short−circuited.
V
V
G1
G1
VSS
VGS
S1
PG
Figure 6. Test Circuit 6 − td(on), tr, td(off), tf
Figure 5. Test Circuit 5 − RSS(on)
When FET1 is measured,
Gate and Source of FET2
are short−circuited.
S2
S2
G2
G2
RL
V
VSS
G1
VGS = 0 V G1
S1
S1
Figure 7. Test Circuit 7 − Qg
NOTE:
IS
A
IG = 1 mA
PG
S1
When FET1 is
measured, +4.5 V is
added to VGS of FET2.
Figure 8. Test Circuit 8 − VF(S−S)
When FET2 is measured, the position of FET1 and FET2 is switched.
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3
EFC8811R
TYPICAL CHARACTERISTICS
4.0
3.0
2.5
2.0
1.5
VGS = 1.0 V
1.0
16
0
0.1
0.2
0.3
0.4
12
8
6
4
4
6
RSS(on), Static Source to Source
On State Resistance (mW)
8
1.6
3
VGS = 4.0 V
2
VGS = 4.5 V
1
0
20
40
60
80 100 120 140 160
TA, Ambient Temperature (5C)
Figure 11. RSS(on) − VGS
Figure 12. RSS(on) − TA
100
7
5
2
TA = −25°C
3
2
0.1 7
75°C
5
10
7
5
VGS = 0 V
7
5
3
2
1.0
25°C
7
5
3
2
TA = 75°C
0.1 7
5
25°C
5 7
1.8 2.0
VGS = 2.5 V
4
2
3
1.4
VGS = 3.1 V
5
3
2
1.2
VGS = 3.8 V
6
2
0.01
0.001
1.0
VGS, Gate to Source Voltage (V)
VSS = 6 V
2
0.8
IS = 5 A
7
0
−60 −40 −20
10
IS, Source Current (A)
RSS(on), Static Source to Source
On State Resistance (mW)
gFS, Forward Transconductance (s)
2
3
0.6
8
3
7
5
0.4
Figure 10. IS − VGS
3
1.0
0.2
Figure 9. IS − VSS
5
10
0
VGS, Gate to Source Voltage (V)
TA = 25°C
IS = 5 A
0
0
VSS, Source to Source Voltage (V)
10
7
5
−25°C
10
0.5
15
100
TA = 75°C
2
20
0
25°C
14
0.5
0
VSS = 6 V
18
4.5 V
2.5 V
1.3 V
IS, Source Current (A)
IS, Source Current (A)
3.5
20
TA = 25°C
10.0 V
−25°C
3
2
0.01
2
3
5 7
0.1
2
3
5 7
1.0
2
3
5 7
0.01
10
0
0.2
0.4
0.6
0.8
1.0
VF(S−S), Forward Source to Source Voltage (V)
IS, Source Current (A)
Figure 13. gFS − IS
Figure 14. IS − VF(S−S)
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4
1.2
EFC8811R
TYPICAL CHARACTERISTICS (Continued)
100K 7
VGS, Gate to Source Voltage (V)
Switching Time, S / W Time (ns)
4.5
td(off)
5
3
2
10K
tf
7
5
3
2
1K
tr
7
5
3
2
td(on)
100 7
5
3
2
10
3.5
3.0
2.5
2.0
1.5
1.0
0.5
VDD = 6 V, VGS = 4.5 V
2
0.01
3
5
7
2
0.1
3
5
7
2
1
3
5
7
VSS = 6 V
IS = 27 A
4.0
0
10
0
10
20
30
Figure 15. S / W Time − IS
Figure 16. VGS − Qg
3.0
ISP = 100 A (PW ≤ 100 ms)
1 ms
IS = 27 A
PT, Total Dissipation (W)
IS, Source Current (A)
7
5
10 ms
3
2
100 ms
10 7
5
3
2
Operation in this area
is limited by RSS(on).
1.0 7
5
3
2
0.1 7
5
3
2
DC
operation
TA = 25°C
Single Pulse
Source mounted on ceramic
substrate (5000 mm2 × 0.8 mm)
0.01
0.01
2
3
5 7
70
Qg, Total Gate Charge (nC)
0.1
2
3
5 7
2
1.0
3
5 7
10
2
3
5 7
80
90
2.5
2.0
1.5
1.0
0.5
0
100
0
20
40
60
80
120
100
VSS, Source to Source Voltage (V)
TA, Ambient Temperature (5C)
Figure 17. SOA
Figure 18. PT − TA
140
RqJA, Thermal Resistance (5C/W)
100
Duty Cycle = 0.5
10
1
0.1
0.01
0.02
0.05
0.2
Single Pulse
0.01
0.001
0.1
Surface mounted on ceramic substrate
(5000 mm2 × 0.8 mm)
2
0.000001
3
5
7
0.00001
2
3
5
7
0.0001
2
3
5
7
0.001
2
3
5
7
0.01
2
PT, Pulse Time (s)
Figure 19. RqJA − Pulse Time
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5
100
Surface mounted on ceramic substrate
(5000 mm2 × 0.8 mm)
5
100
60
50
IS, Source Current (A)
1000 7
3
2
40
3
5
7
0.1
2
3
5
7
1
2
3
5
7
10
160
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
CSP6, 1.77x3.54 / EFCP3517−6DGH−020
CASE 568AL
ISSUE O
DATE 23 OCT 2013
SCALE 4:1
E
ÈÈ
ÈÈ
PIN A1
REFERENCE
2X
0.05 C
2X
A B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
DIM
A
b
b1
D
E
e
e2
L
D
0.05 C
TOP VIEW
A
0.03 C
RECOMMENDED
SOLDERING FOOTPRINT*
0.03 C
C
SIDE VIEW
e2
2X
b
1
e2
2
SEATING
PLANE
2X
8X
R0.125
4X
1.25
0.25
PACKAGE
OUTLINE
0.50
PITCH
e/2
3
0.05 C A B
e
1
0.03 C
4X
MILLIMETERS
MIN
MAX
0.22
−−−
0.22
0.28
0.22
0.28
1.77 BSC
3.54 BSC
0.50 BSC
1.00 BSC
1.22
1.28
2.00
PITCH
b1
6
5
4
L
BOTTOM VIEW
DOCUMENT NUMBER:
DESCRIPTION:
98AON79069F
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
CSP6, 1.77X3.54 / EFCP3517−6DGH−020
PAGE 1 OF 1
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