ESD11B5.0ST5G

ESD11B5.0ST5G Transient Voltage Suppressors Micro−Packaged Diodes for ESD Protection The ESD11B Series is designed to protect voltage sensitive components from ESD. Excellent clamping capability, low leakage, and fast response time provide best in class protection on designs that are exposed to ESD. Because of its small size, it is suited for use in cellular phones, MP3 players, digital cameras and many other portable applications where board space comes at a premium. Specification Features http://onsemi.com • • • • • • • • • • Low Capacitance 12 pF Low Clamping Voltage Small Body Outline Dimensions: 0.60 mm x 0.30 mm Low Body Height: 0.3 mm Stand−off Voltage: 5.0 V Low Leakage Response Time is < 1 ns IEC61000−4−2 Level 4 ESD Protection IEC61000−4−4 Level 4 EFT Protection These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant MARKING DIAGRAM PIN 1 DSN2 CASE 152AA XXXX YYY XXXX YYY = Specific Device Code = Year Code ORDERING INFORMATION Device ESD11B5.0ST5G Package DSN2 (Pb−Free) Shipping† 5000/Tape & Reel Mechanical Characteristics MOUNTING POSITION: Any QUALIFIED MAX REFLOW TEMPERATURE: 260°C Device Meets MSL 1 Requirements MAXIMUM RATINGS Rating IEC 61000−4−2 (ESD) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Unit kV mW °C/W °C °C Symbol Contact Air °PD° RqJA TJ, Tstg TL Value ±8.0 ±15 250 400 −40 to +125 260 Total Power Dissipation on FR−5 Board (Note 1) @ TA = 25°C Thermal Resistance, Junction−to−Ambient Junction and Storage Temperature Range Lead Solder Temperature − Maximum (10 Second Duration) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR−5 = 1.0 x 0.75 x 0.62 in. See Application Note AND8308/D for further description of survivability specs. © Semiconductor Components Industries, LLC, 2009 July, 2009 − Rev. 2 1 Publication Order Number: ESD11B5.0S/D ESD11B5.0ST5G ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol IPP VC VRWM IR VBR IT Parameter Maximum Reverse Peak Pulse Current Clamping Voltage @ IPP Working Peak Reverse Voltage Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current IPP IT VC VBR VRWM IR IR VRWM VBR VC IT IPP I V *See Application Note AND8308/D for detailed explanations of datasheet parameters. Bi−Directional TVS ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) VRWM (V) Device ESD11B5.0ST5G Device Marking 11B5 Max 5.0 IR (mA) @ VRWM Max 1.0 VBR (V) @ IT (Note 2) Min 5.8 IT mA 1.0 C (pF) Typ 12 Max 13.5 VC Per IEC61000−4−2 (Note 4) Figures 1 and 2 See Below 2. VBR is measured with a pulse test current IT at an ambient temperature of 25°C. 3. Surge current waveforms per Figure 5. 4. For test procedure see Figures 3 and 4 and Application Note AND8307/D. Figure 1. ESD Clamping Voltage Screenshot Positive 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage Screenshot Negative 8 kV Contact per IEC61000−4−2 http://onsemi.com 2 ESD11B5.0ST5G IEC 61000−4−2 Spec. Test Voltage (kV) 2 4 6 8 First Peak Current (A) 7.5 15 22.5 30 Current at 30 ns (A) 4 8 12 16 Current at 60 ns (A) 2 4 6 8 I @ 60 ns 10% tP = 0.7 ns to 1 ns I @ 30 ns IEC61000−4−2 Waveform Ipeak 100% 90% Level 1 2 3 4 Figure 3. IEC61000−4−2 Spec ESD Gun TVS Oscilloscope 50 W Cable 50 W Figure 4. Diagram of ESD Test Setup The following is taken from Application Note AND8308/D − Interpretation of Datasheet Parameters for ESD Devices. ESD Voltage Clamping For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger 100 % OF PEAK PULSE CURRENT 90 80 70 60 50 40 30 20 10 0 0 20 tP tr systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to AND8307/D. PEAK VALUE IRSM @ 8 ms PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8 ms HALF VALUE IRSM/2 @ 20 ms Figure 5. 8 X 20 ms Pulse Waveform 40 t, TIME (ms) 60 80 http://onsemi.com 3 ESD11B5.0ST5G PACKAGE DIMENSIONS DSN2, 0.6x0.3, 0.4P, (0201) CASE 152AA−01 ISSUE O D A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. DIM A A1 b D E e L MILLIMETERS MIN MAX 0.24 0.30 0.00 0.01 0.22 0.28 0.30 BSC 0.60 BSC 0.40 BSC 0.12 0.18 2X 0.06 C 2X E 0.06 C TOP VIEW 0.05 C A CATHODE BAND MONTH CODING DEC C SEATING PLANE NOV OCT 2X 0.05 C A1 SIDE VIEW e SEP JUN MAR FEB JAN XXXX YYY XXXX Y09 INDICATES AUG 2009 DEVICE CODE YEAR CODE 1 2X L 2 2X b 0.05 C A B (EXAMPLE) BOTTOM VIEW MOUNTING FOOTPRINT* 0.28 0.75 0.28 0.30 DIMENSIONS: MILLIMETERS See Application Note AND8398/D for more mounting details *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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