ESD Protection Diode
Ultra−Low Capacitance
Micro−Packaged Diodes for ESD Protection
ESD7241, SZESD7241
The ESD7241 is designed to protect voltage sensitive components
that require ultra−low capacitance from ESD and transient voltage
events. It has industry leading capacitance linearity over voltage
making it ideal for RF applications. This capacitance linearity
combined with the extremely small package and low insertion loss
makes this part well suited for use in antenna line applications for
wireless handsets and terminals.
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Features
•
•
•
•
•
•
•
•
Industry Leading Capacitance Linearity Over Voltage
Ultra−Low Capacitance: < 1.0 pF Max
Insertion Loss: 0.15 dB at 1 GHz; 0.60 dB at 3 GHz
Low Leakage: < 0.5 mA
Protection for the following IEC Standards:
♦ IEC61000−4−2 (ESD): Level 4 ±28 kV Contact
♦ IEC61000−4−4 (EFT): 40 A −5/50 ns
♦ IEC61000−4−5 (Lightning): 2.5 A (8/20 ms)
SZESD7241MXWT5G − Wettable Flank Package for Optimal
Automated Optical Inspection (AOI)
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
• RF Signal ESD Protection
• Near Field Communications
• USB 3.x Vbus Protection
Symbol
Value
Unit
±28
kV
°PD°
RqJA
300
400
mW
°C/W
TJ, Tstg
−55 to
+150
°C
TL
260
°C
IEC 61000−4−2 (ESD) (Note 1)
Junction and Storage Temperature Range
Lead Solder Temperature − Maximum
(10 Second Duration)
2
M
2M
= Specific Device Code
= Date Code
X2DFNW2
CASE 711BG
A
M
AM
= Specific Device Code
= Date Code
Package
Shipping†
ESD7241N2T5G
X2DFN2
(Pb−Free)
8000 / Tape &
Reel
SZESD7241N2T5G
X2DFN2
(Pb−Free)
8000 / Tape &
Reel
SZESD7241MXWT5G X2DFNW2
(Pb−Free)
8000 / Tape &
Reel
Device
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Total Power Dissipation (Note 2) @ TA = 25°C
Thermal Resistance, Junction−to−Ambient
X2DFN2
CASE 714AB
ORDERING INFORMATION
Typical Applications
Rating
MARKING
DIAGRAM
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Non−repetitive current pulse at TA = 25°C, per IEC61000−4−2 waveform.
2. Mounted with recommended minimum pad size, DC board FR−4
© Semiconductor Components Industries, LLC, 2016
April, 2020 − Rev. 3
1
Publication Order Number:
ESD7241/D
ESD7241, SZESD7241
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
IPP
Parameter
Symbol
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IT
VC VBR VRWM IR
IR VRWM VBR VC
IT
Working Peak Reverse Voltage
IR
I
V
Maximum Reverse Leakage Current @ VRWM
VBR
Breakdown Voltage @ IT
IT
IPP
Test Current
Bi−Directional
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Parameter
Symbol
Reverse Working Voltage
Condition
Min
Typ
VRWM
Breakdown Voltage
VBR
IT = 1 mA (Note 3)
24.3
25
Max
Unit
24
V
28
V
0.5
mA
Reverse Leakage Current
IR
VRWM = 24 V
Clamping Voltage TLP
VC
IPP = 8 A (Note 4)
38
V
Clamping Voltage TLP
VC
IPP = 16 A (Note 4)
48
V
Junction Capacitance
CJ
VR = 0 V, f = 1 MHz
VR = 0 V, f = 1 GHz
Dynamic Resistance
RDYN
Insertion Loss
1.0
0.7
pF
TLP Pulse
0.84
W
f = 1 GHz
f = 3 GHz
0.15
0.58
dB
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.
4. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model.
TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns.
140
20
120
0
100
−20
VOLTAGE (V)
VOLTAGE (V)
TYPICAL CHARACTERISTICS
80
60
40
−40
−60
−80
20
−100
0
−120
−20
−25
0
25
50
75
100
125
−140
−25
150
0
25
50
75
100
125
150
TIME (ns)
TIME (ns)
Figure 1. Typical IEC61000−4−2 + 8 kV Contact
ESD Clamping Voltage
Figure 2. Typical IEC61000−4−2 − 8 kV Contact
ESD Clamping Voltage
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2
ESD7241, SZESD7241
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
Ipeak
Level
Test Voltage (kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1
2
7.5
4
2
2
4
15
8
4
3
6
22.5
12
6
4
8
30
16
8
100%
90%
I @ 30 ns
I @ 60 ns
10%
tP = 0.7 ns to 1 ns
Figure 3. IEC61000−4−2 Spec
Device
ESD Gun
Under
Oscilloscope
Test
50 W
50 W
Cable
Figure 4. Diagram of ESD Clamping Voltage Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
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3
20
−20
18
−18
16
−16
14
−14
CURRENT (A)
CURRENT (A)
ESD7241, SZESD7241
12
10
8
6
−12
−10
−8
−6
4
−4
2
−2
0
0
NOTE:
10
20
30
40
50
0
60
0
−10
−20
−30
−50
−40
VOLTAGE (V)
VOLTAGE (V)
Figure 5. Pin 1 to Pin 2 TLP IV Curve
Figure 6. Pin 2 to Pin 1 TLP IV Curve
−60
TLP parameter: Z0 = 50 W, tp = 100 ns, tr = 300 ps, averaging window: t1 = 30 ns to t2 = 60 ns.
Transmission Line Pulse (TLP) Measurement
L
Transmission Line Pulse (TLP) provides current versus
voltage (I−V) curves in which each data point is obtained
from a 100 ns long rectangular pulse from a charged
transmission line. A simplified schematic of a typical TLP
system is shown in Figure 7. TLP I−V curves of ESD
protection devices accurately demonstrate the product’s
ESD capability because the 10s of amps current levels and
under 100 ns time scale match those of an ESD event. This
is illustrated in Figure 8 where an 8 kV IEC 61000−4−2
current waveform is compared with TLP current pulses at
8 A and 16 A. A TLP I−V curve shows the voltage at which
the device turns on as well as how well the device clamps
voltage over a range of current levels.
S Attenuator
÷
50 W Coax
Cable
10 MW
IM
50 W Coax
Cable
VM
DUT
VC
Oscilloscope
Figure 7. Simplified Schematic of a Typical TLP
System
Figure 8. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms
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4
ESD7241, SZESD7241
TYPICAL CHARACTERISTICS
1.0
1.E−03
0.9
1.E−04
0.8
CAPACITANCE (pF)
1.E−02
CURRENT (A)
1.E−05
1.E−06
1.E−07
1.E−08
1.E−09
0.6
0.5
0.4
0.3
0.2
1.E−10
0.1
1.E−11
−30 −25 −20 −15 −10 −5
0
5
10
15
20
25
0
−24 −20 −16 −12 −8
30
0
4
8
12 16
VBias (V)
Figure 9. Typical IV Characteristics
Figure 10. Typical CV Characteristics
1
1.0
0
0.9
−1
0.8
CAPACITANCE (pF)
−3
−4
−5
−6
−7
20 24
0.7
0.6
0.5
0.4
0.3
0.2
−8
−9
−10
1.E+07
−4
VOLTAGE (V)
−2
S21 (dB)
0.7
0.1
1.E+08
1.E+09
0
0.E+00
1.E+10
1.E+09
2.E+09
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 11. Typical Insertion Loss
Figure 12. Typical Capacitance over
Frequency
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5
3.E+09
ESD7241, SZESD7241
PACKAGE DIMENSIONS
X2DFN2 1.0 x 0.6, 0.65P
CASE 714AB
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. EXPOSED COPPER ALLOWED AS SHOWN.
0.10 C
ÉÉ
ÉÉ
A B
D
PIN 1
INDICATOR
E
DIM
A
A1
b
D
E
e
L
0.05 C
TOP VIEW
A
NOTE 3
0.10 C
0.10 C
A1
C
SIDE VIEW
RECOMMENDED
SOLDER FOOTPRINT*
SEATING
PLANE
1.20
2X
e
b
e/2
MILLIMETERS
MIN
NOM MAX
0.34
0.37
0.40
−−−
0.03
0.05
0.45
0.50
0.55
0.95
1.00
1.05
0.55
0.60
0.65
0.65 BSC
0.20
0.25
0.30
0.05
M
0.47
2X
0.60
PIN 1
C A B
DIMENSIONS: MILLIMETERS
1
2X
L
0.05
M
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
C A B
BOTTOM VIEW
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6
ESD7241, SZESD7241
PACKAGE DIMENSIONS
X2DFNW2 1.0x0.6, 0.65P
CASE 711BG
ISSUE C
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