ESD8101FCT5G

DATA SHEET www.onsemi.com ESD Protection Diodes MARKING DIAGRAMS Ultra Low Capacitance ESD Protection Diode for High Speed Data Line ESD8101, ESD8111 The ESD81x1 Series ESD protection diodes are designed to protect high speed data lines from ESD. Ultra−low capacitance and low ESD clamping voltage make this device an ideal solution for protecting voltage sensitive high speed data lines. T ESD8111 (0201) WLCSP2 CASE 567AV F ESD8111P (0201) X4DFN2 CASE 152AX Q T, F, Q = Device Code Features • Low Capacitance (0.20 pF Typ, I/O to GND) • Protection for the Following IEC Standards: • • ESD8101 (01005) DSN2 CASE 152AK IEC 61000−4−2 (Level 4) Low ESD Clamping Voltage These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant PIN CONFIGURATION AND SCHEMATIC 1 2 Typical Applications • USB 3.0/3.1 • MHL 2.0 • eSATA = MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit ORDERING INFORMATION Operating Junction Temperature Range TJ −55 to +150 °C Storage Temperature Range Tstg −55 to +150 °C See detailed ordering and shipping information on page 2 of this data sheet. Lead Solder Temperature − Maximum (10 Seconds) TL 260 °C ±23 ±23 kV kV ±30 ±30 kV kV ESD8101: IEC 61000−4−2 Contact IEC 61000−4−2 Air ESD8111: IEC 61000−4−2 Contact IEC 61000−4−2 Air ESD Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. See Application Note AND8308/D for further description of survivability specs. © Semiconductor Components Industries, LLC, 2016 March, 2022 − Rev. 6 1 Publication Order Number: ESD8101/D ESD8101, ESD8111 ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) Symbol VRWM IR VBR IPP Parameter RDYN Working Peak Voltage IHOLD Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT VBR VCVRWMVHOLD IT IR V Test Current IR IT VHOLD Holding Reverse Voltage IHOLD IHOLD Holding Reverse Current RDYN Dynamic Resistance IT VBR VHOLDVRWMVC RDYN IPP Maximum Peak Pulse Current VC Clamping Voltage @ IPP VC = VHOLD + (IPP * RDYN) −IPP VC = VHOLD + (IPP * RDYN) ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Reverse Working Voltage Symbol VRWM Breakdown Voltage VBR Conditions Min Typ I/O Pin to GND IT = 1 mA, I/O Pin to GND 5.5 7.9 VRWM = 3.3 V, I/O Pin to GND Max Unit 3.3 V 8.6 V 1.0 mA Reverse Leakage Current IR Reverse Holding Voltage VHOLD I/O Pin to GND 2.1 V Holding Reverse Current IHOLD I/O Pin to GND 17 mA ESD8111 Clamping Voltage VC IPP = 7.1 A, (8/20 ms pulse) ESD8101, ESD8111 Clamping Voltage TLP (Note 1) VC IPP = 8 A IEC 61000−4−2 Level 2 equivalent (±4 kV Contact, ±4 kV Air) 6.5 IPP = 16 A IEC 61000−4−2 Level 4 equivalent (±8 kV Contact, ±15 kV Air) 10 Dynamic Resistance RDYN Junction Capacitance CJ 8.0 I/O Pin to GND 0.46 VR = 0 V, f = 1 MHz 0.2 V V W 0.4 pF Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 4 ns, averaging window; t1 = 30 ns to t2 = 60 ns. ORDERING INFORMATION Package Shipping† ESD8101FCT5G DSN2 (Pb−Free) 10,000 / Tape & Reel ESD8111FCT5G WLCSP2 (Pb−Free) 10,000 / Tape & Reel WLCSP2 Side wall Isolated 0201 (Pb−Free) 10,000 / Tape & Reel Device ESD8111PFCT5G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 2 ESD8101, ESD8111 1.0 0.9 0.9 0.8 0.8 0.7 0.7 0.6 0.6 C (pF) 1.0 0.5 0.4 0.4 0.3 0.2 0.2 0.1 0 −3.5 0.1 0 −3.5 −2.5 −1.5 −0.5 0.5 1.5 2.5 3.5 −2.5 −1.5 −0.5 0.5 1.5 2.5 VBIAS (V) VBIAS (V) Figure 1. ESD8101 CV Characteristics Figure 2. ESD8111 CV Characteristics 2 2 0 0 −2 −2 −4 −6 −8 −8 1E8 1E9 −10 1E7 1E10 3E10 1E8 1E10 3E10 1E9 FREQUENCY (Hz) FREQUENCY (Hz) Figure 3. ESD8101 S21 Insertion Loss Figure 4. ESD8111 S21 Insertion Loss 1.0 3.5 −4 −6 −10 1E7 1.0 0.9 0.9 0.8 0.8 CAPACITANCE (pF) CAPACITANCE (pF) 0.5 0.3 (dB) (dB) C (pF) TYPICAL CHARACTERISTICS 0.7 0.6 0.5 0.4 0.3 0.7 0.6 0.5 0.4 0.3 0.2 0.2 0.1 0 0.1 0 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6 7 8 FREQUENCY (GHz) FREQUENCY (GHz) Figure 5. ESD8101 Capacitance over Frequency Figure 6. ESD8111 Capacitance over Frequency www.onsemi.com 3 9 10 ESD8101, ESD8111 TYPICAL CHARACTERISTICS 20 20 10 18 16 12 TLP CURRENT (A) TLP CURRENT (A) 14 6 10 8 4 6 4 2 0 2 4 6 8 10 12 14 16 18 8 VIEC, EQUIVALENT (kV) 8 VIEC, EQUIVALENT (kV) 16 2 0 10 18 14 12 6 10 8 4 6 4 2 0 0 20 2 0 2 4 6 VC, VOLTAGE (V) −20 12 14 16 18 20 0 Figure 8. ESD8111 Positive TLP I−V Curve 10 −20 10 −18 −18 6 −10 −8 4 −6 −4 TLP CURRENT (A) −14 −12 2 0 2 4 6 8 10 12 14 16 18 −16 −14 −12 6 −10 −8 4 −6 −4 −2 0 0 20 8 VIEC, EQUIVALENT (kV) 8 VIEC, EQUIVALENT (kV) −16 TLP CURRENT (A) 10 VC, VOLTAGE (V) Figure 7. ESD8101 Positive TLP I−V Curve −2 0 8 2 0 VC, VOLTAGE (V) 2 4 6 8 10 12 14 16 18 20 VC, VOLTAGE (V) Figure 9. ESD8101 Negative TLP I−V Curve Figure 10. ESD8111 Negative TLP I−V Curve www.onsemi.com 4 0 ESD8101, ESD8111 IEC61000−4−2 Waveform IEC 61000−4−2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Figure 11. IEC61000−4−2 Spec Transmission Line Pulse (TLP) Measurement L Transmission Line Pulse (TLP) provides current versus voltage (I−V) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 12. TLP I−V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 13 where an 8 kV IEC 61000−4−2 current waveform is compared with TLP current pulses at 8 A and 16 A. A TLP I−V curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. 50 W Coax Cable S Attenuator ÷ 50 W Coax Cable 10 MW IM VM DUT VC Oscilloscope Figure 12. Simplified Schematic of a Typical TLP System Figure 13. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DSN2, 0.435x0.23, 0.27P, (01005) CASE 152AK ISSUE A DATE 17 FEB 2015 SCALE 16:1 D PIN 1 INDICATOR 0.02 C 2X 2X ÉÉ ÉÉ 0.02 C 2X 0.05 C 2X 0.02 C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. A B MILLIMETERS DIM MIN MAX A 0.165 0.195 A1 −−− 0.030 b 0.177 0.193 D 0.435 BSC E 0.230 BSC e 0.270 BSC L 0.112 0.128 E TOP VIEW A A1 C SIDE VIEW GENERIC MARKING DIAGRAM* SEATING PLANE X e 2X 0.05 b M C A B X = Specific Device Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G”, may or not be present. 1 0.05 M 2X L C A B RECOMMENDED SOLDER FOOTPRINT* BOTTOM VIEW 0.44 2X 1 2X 0.23 0.16 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON82198E Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. DSN2, 0.435X0.23, 0.27P (01005) PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS X4DFN2, 0.60x0.30, 0.36P CASE 152AX ISSUE G SCALE 8:1 D PIN 1 INDICATOR ÈÈ DATE 12 APR 2019 A B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. E DIM A A1 b D E e L TOP VIEW A 0.02 C A1 GENERIC MARKING DIAGRAM* 0.01 C C SIDE VIEW MILLIMETERS MIN NOM MAX 0.175 0.200 0.225 0.018 REF 0.205 0.215 0.225 0.575 0.600 0.625 0.275 0.300 0.325 0.36 BSC 0.145 0.155 0.165 SEATING PLANE X e X b X = Specific Device Code 1 0.05 M 2X L C A B 0.05 M C A B BOTTOM VIEW *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G”, may or not be present. Some products may not follow the Generic Marking. RECOMMENDED SOLDER FOOTPRINT* 0.65 2X 1 2X 0.27 0.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON06808G X4DFN2, 0.60x0.30, 0.36P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WLCSP2, 0.6x0.3 CASE 567AV ISSUE C DATE 22 SEP 2017 SCALE 12:1 D 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. A B 0.02 C 2X DIM A A1 b D E e L E 0.02 C TOP VIEW 0.02 C A 0.02 C A1 C SIDE VIEW MILLIMETERS MIN NOM MAX 0.250 0.275 0.300 0.000 0.025 0.050 0.140 0.155 0.170 0.570 0.600 0.630 0.270 0.300 0.330 0.36 BSC 0.190 0.215 0.240 GENERIC MARKING DIAGRAM* SEATING PLANE X e 2X L 2X b 0.05 C A B BOTTOM VIEW X = Specific Device Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. RECOMMENDED SOLDER FOOTPRINT* 2X 0.33 2X 0.28 0.81 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON49805E WLCSP2, 0.6X0.3 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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